Plastic Packages for Integrated Circuits Package Outline Drawing P6.064 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 4, 2/10 0-8° 1.90 0.95 0.08-0.22 D A 6 5 4 2.80 PIN 1 INDEX AREA 1.60 +0.15/-0.10 3 3 (0.60) 1 2 3 0.20 C 2x 0.40 ±0.10 B SEE DETAIL X 3 0.20 M C A-B D END VIEW TOP VIEW 10° TYP (2 PLCS) 3 2.90 ±0.10 1.15 +0.15/-0.25 C 0.10 C SEATING PLANE 0.00-0.15 SIDE VIEW (0.25) GAUGE PLANE 1.45 MAX DETAIL "X" 0.45±0.1 4 (0.95) (0.60) (1.20) (2.40) TYPICAL RECOMMENDED LAND PATTERN 1 NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. Package conforms to JEDEC MO-178AB.