Low Voltage, Single-Channel Level Translator ADG3231* FEATURES Operates from 1.65 V to 3.6 V Supply Rails Unidirectional Signal Path, Bidirectional Level Translation Tiny 6-Lead SOT-23 Package Short Circuit Protection LVTTL/CMOS Compatible Inputs FUNCTIONAL BLOCK DIAGRAM VCC1 VCC2 A1 APPLICATIONS Level Translation Low Voltage ASIC Translation Serial Interface Translation Y1 GND GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG3231 is a level translator designed on a submicron process that operates from supplies as low as 1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supply voltages, allowing bidirectional level translation, i.e., it translates low voltages to higher voltages and vice versa. The signal path is unidirectional, meaning data may flow only from A1 to Y1. 1. Bidirectional level translation matches any voltage level from 1.65 V to 3.6 V. 2. The device offers high performance and is fully guaranteed across the supply range. 3. Short circuit protection. 4. Tiny SOT-23 package. This type of device may be used in applications requiring communication between devices operating from different supply levels. The level translator is packaged in one of the smallest footprints available for its pin count. The 6-lead SOT-23 package requires only a maximum of 5.28 mm ⫻ 5.28 mm board space. *Patent Pending REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. ADG3231–SPECIFICATIONS1 Parameter (VCC1 = VCC2 = 1.65 V to 3.6 V, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted.) Symbol Conditions Min Output Low Voltage VOL VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V IOH = –100 µA, VCC2 = 3.0 V to 3.6 V VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = –4 mA, VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = –8 mA, VCC2 = 3.0 V to 3.6 V IOH = +100 µA, VCC2 = 3.0 V to 3.6 V VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = +4 mA, VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = +8 mA, VCC2 = 3.0 V to 3.6 V 1.35 1.35 0.65 VCC Output High Voltage VIH VIH VIH VIL VIL VIL VOH LOGIC INPUTS/OUTPUTS3 Input High Voltage4 Input Low Voltage4 SWITCHING CHARACTERISTICS4, 5 Propagation Delay, tPD A1 to Y1 tPHL, tPLH tPHL, tPLH Propagation Delay, tPD A1 to Y1 tPHL, tPLH Propagation Delay, tPD A1 to Y1 Input Leakage Current II Output Leakage Current IO POWER REQUIREMENTS Power Supply Voltages Quiescent Power Supply Current VCC1 VCC2 ICC1 ICC2 Max 0.4 0.4 0.45 0.4 0.45 0.4 6.5 6.5 10.25 ±1 ±1 ns ns ns µA µA 3.6 3.6 2 2 V V µA µA 2.4 2.0 VCC – 0.45 2.0 VCC – 0.45 2.4 4 4.5 6.5 1.65 1.65 Unit V V V V V V V V V V V V V V V V V V 0.8 0.7 0.35 VCC 3.3 V ± 0.3 V, CL = 30 pF, VT = VCC/2 2.5 V ± 0.2 V, CL = 30 pF, VT = VCC/2 1.8 V ± 0.15 V, CL = 30 pF, VT = VCC/2 0 ⱕ VIN ⱕ 3.6 V 0 ⱕ VIN ⱕ 3.6 V Digital Inputs = 0 V or VCC Digital Inputs = 0 V or VCC Typ2 NOTES 1 Temperature range is as follows: B Version: –40°C to +85°C. 2 All typical values are at VCC1 = VCC2, TA = 25°C, unless otherwise stated. 3 VIL and VIH levels are specified with respect to VCC1; VOH and VOL levels are with respect to VCC2. 4 Guaranteed by design, not subject to production test. 5 See Test Circuit and Waveforms. Specifications subject to change without notice. –2– REV. 0 ADG3231 ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATION (TA = 25°C, unless otherwise noted.) VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V A1 Input Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to VCC1 +0.3 V DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .150°C 6-Lead SOT-23, qJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 229°C/W Lead Temperature, Soldering (10 seconds) . . . . . . . . . . . 300°C IR Reflow, Peak Temperature (<20 seconds) . . . . . . . . . . 235°C VCC1 1 6 VCC2 ADG3231 NC 2 (Not to Scale) 5 Y1 A1 3 4 GND *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. ORDERING GUIDE Model Temperature Range Package Description Branding Package Option ADG3231BRJ-REEL ADG3231BRJ-REEL7 –40°C to +85°C –40°C to +85°C SOT-23 SOT-23 W2B W2B RJ-6 RJ-6 PIN FUNCTION DESCRIPTIONS Pin Mnemonic Description 1 2 3 4 5 6 VCC1 NC A1 GND Y1 VCC2 Supply Voltage 1, can be any supply voltage from 1.65 V to 3.6 V. Not Internally Connected. Digital Input Referred to VCC1. Device Ground Pin. Digital Output Referred to VCC2. Supply Voltage 2, can be any supply voltage from 1.65 V to 3.6 V. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG3231 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. 0 –3– ADG3231–Typical Performance Characteristics 5.0 30 TA = 25ⴗC 4.5 4.0 3.5 3.5 3.0 2.5 2.0 VCC2 = 3.3V TA = 25ⴗC 25 ICC1 – nA 4.0 ICC2 – nA ICC1 – nA 5.0 TA = 25ⴗC 4.5 3.0 2.5 VCC1 = 3.3V 20 VCC1 = 2.5V 15 VCC1 = 1.8V 2.0 1.5 VCC2 = 2.5V 1.0 10 1.5 VCC2 = 3.3V VCC1 = 3.3V 1.0 VCC2 = 1.8V 0.5 0 1.5 VCC1 = 2.5V 5 0.5 VCC1 = 1.8V 0 2.0 2.5 3.0 VCC1 – V 3.5 4.0 1.5 2.0 2.5 3.0 VCC2 – V 3.5 0 0 4.0 TA = 25ⴗC VCC1 = 3.3V TA = 25ⴗC 25 30 40 50 60 70 TEMPERATURE – ⬚C 80 2000 80 30 20 TPC 3. ICC1 vs. Temperature TPC 2. ICC2 vs. VCC2 TPC 1. ICC1 vs. VCC1 10 TA = 25ⴗC 1800 70 VCC1 = V CC2 = 3.3V 1600 60 1400 15 VCC2 = 2.5V 10 VCC2 = 1.8V 50 ICC2 – A VCC2 = 3.3V ICC1 – A ICC2 – nA 20 40 30 VCC1 = V CC2 = 3.3V 1200 1000 800 600 5 VCC1 = V CC2 = 1.8V 20 400 VCC1 = V CC2 = 1.8V 10 0 –5 0 10 20 30 40 50 60 70 TEMPERATURE – ⬚C 200 0 10k 80 100k 10M 1M FREQUENCY – Hz 0 10k 100M 6 10 16 5 tEN RISE/FALL TIME – ns 12 TIME – ns TIME – ns 4 6 tEN 4 tDIS 3 1 TA = 25ⴗC VCC1 = VCC2 0 10 tDIS 2 2 1.5 2.0 3.5 4.0 TPC 7. Enable, Disable Time vs. Supply tPLH, LOW-TO-HIGH TRANSITION 8 6 4 tPHL, HIGH-TO-LOW TRANSITION 2 VCC1 = VCC2 = 3.3V 2.5 3.0 SUPPLY – V 100M VCC1 = 3.3V VCC2 = 1.8V TA = 25ⴗC DATA RATE 10Mbps 14 8 1M 10M FREQUENCY – Hz TPC 6. ICC2 vs. Frequency TPC 5. ICC1 vs. Frequency TPC 4. ICC2 vs. Temperature 100k 0 –40 –20 0 20 40 60 TEMPERATURE – ⴗC TPC 8. Enable, Disable Time vs. Temperature –4– 0 80 22 32 42 52 62 72 82 92 102 CAPACITIVE LOAD – pF TPC 9. Rise/Fall Time vs. Capacitive Load, A1–Y1 REV. 0 ADG3231 7 6 5 4 3 2 tHL, HIGH-TO-LOW TRANSITION 1 VCC1 = 3.3V VCC2 = 3.3V TA = 25ⴗC DATA RATE 10Mbps 7 PROPAGATION DELAY – ns 8 RISE/FALL TIME – ns 8.0 8 VCC1 = 1.8V VCC2 = 3.3V TA = 25ⴗC DATA RATE 10Mbps tLH, LOW-TO-HIGH TRANSITION 9 6 tPLH, LOW-TO-HIGH TRANSITION 5 4 tPHL, HIGH-TO-LOW TRANSITION 3 2 PROPAGATION DELAY – ns 10 6.0 tPHL, A1–Y2 4.0 tPLH , A1–Y2 2.0 TA = 25ⴗC VCC1 = VCC2 1 0 1.5 0 0 22 32 42 52 62 72 82 92 102 22 32 CAPACITIVE LOAD – pF 42 52 62 72 82 92 102 CAPACITIVE LOAD – pF TPC 11. Propagation Delay vs. Capacitive Load, A1–Y1 TPC 10. Rise/Fall Time vs. Capacitive Load, A1–Y1 2.0 2.5 3.0 SUPPLY – V 3.5 4.0 TPC 12. Propagation Delay vs. Supply, Bypass Mode 4.0 TA = 25ⴗC DATA RATE = 10MHz PROPAGATION DELAY – ns tPHL, A1–Y2 3.0 tPLH, A1–Y2 3.3V A1 A1 Y1 1.8V Y2 3.3V 3 2 2.0 3 1 2 1.0 TA = 25ⴗC DATA RATE = 10MHz TA = 25ⴗC VCC1 = VCC2 = 3.3V 0 –40 –20 0 20 40 60 TEMPERATURE – ⴗC 80 TPC 13 Propagation Delay vs. Temperature 3.5 TPC 14. Input/Output VCC1 = 3.3 V, VCC2 = 1.8 V TA = 25ⴗC VCC = VCC1 = VCC2 3 VCC = 3.3V 2.5 VOLTAGE – V 1.8V SOURCE VCC = 2.5V 2 1.5 VCC = 1.8V VCC = 3.3V 1 VCC = 1.8V VCC = 2.5V 0.5 SINK 0 0 5 10 15 20 CURRENT – mA TPC 16. Y1 Sink and Source Current REV. 0 –5– TPC 15. Input/Output VCC1 = 1.8 V, VCC2 = 3.3 V ADG3231 TEST CIRCUIT A1 Input The A1 input is capable of accepting inputs outside the VCC1 supply range. For example, the VCC1 supply applied to the device could be 1.8 V while the preceding device could be supplied from a 2.5 V or 3.3 V supply rail. There are no internal diodes to the supply rails, so the ADG3231 can handle inputs above the supply but inside the absolute maximum ratings stated. VCC1 INPUT VT tPLH 0V tPHL VOH OUTPUT VL VOL Normal Operation The signal path is from A1 to Y1. The device will level translate the signal applied to A1 to a VCC1 logic level (this level translation can be to either a higher or a lower supply) and route the signal to the Y1 output, which will have standard VOL/VOH levels for VCC2 supplies. Figure 1. Propagation Delay DESCRIPTION The ADG3231 is a level translating device designed on a submicron process that operates from supplies as low as 1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supply voltages, allowing bidirectional level translation, i.e., it translates low voltages to high voltages and vice versa. The signal path is unidirectional, meaning data may only flow from A to Z. VCC1 The supplies in Figure 2 may be any combination of supplies, e.g., VCC1 and VCC2 may be anywhere in the range of 1.65 V to 3.6 V. VCC1 VCC2 A1 VCC2 Y1 DEVICE 1 DEVICE 2 SIGNAL INPUT SIGNAL OUTPUT ADG3231 GND Figure 2. Typical Operation of the ADG3231 Level Translating Switch –6– REV. 0 ADG3231 OUTLINE DIMENSIONS 6-Lead Small Outline Transistor Package [SOT-23] (RJ-6) Dimensions shown in millimeters 2.90 BSC 6 5 4 1 2 3 2.80 BSC 1.60 BSC PIN 1 0.95 BSC 1.30 1.15 0.90 1.90 BSC 1.45 MAX 0.15 MAX 0.50 0.30 SEATING PLANE 0.22 0.08 10ⴗ 4ⴗ 0ⴗ COMPLIANT TO JEDEC STANDARDS MO-178AB REV. 0 –7– 0.60 0.45 0.30 –8– C03298–0–5/03(0)