12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG About this document Scope and purpose This document is an engineering report that describes universal input 12 W 12 V off-line flyback converter power supply using Infineon CoolSET™ F3R80 family, ICE3AR4780JG (DSO16/12). The converter is operated in Discontinuous Conduction Mode, 100 kHz fixed frequency, low standby power, brownout and various mode of protections for a high reliable system. This demo board is designed to evaluate the performance of ICE3AR4780JG in ease of use. Intended audience This document is intended for power supply design/application engineer, students, etc.) who wish to design low cost and high reliable systems of off-line Switched Mode Power Supply (SMPS) for enclosed adapter, bluray/DVD player, set-top box, game console, smart meter, auxiliary power supply of white goods, PC, server, etc. Table of Contents About this document ...................................................................................................... 1 1 Abstract ........................................................................................................................ 3 2 Demonstrator board ...................................................................................................... 4 3 Specifications of Demonstrator Board.............................................................................. 5 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 Circuit description ......................................................................................................... 6 Line input ....................................................................................................................................................... 6 Brownout (Line under voltage protection) ................................................................................................. 6 Start up ........................................................................................................................................................... 6 Operation mode ............................................................................................................................................ 6 Soft start ......................................................................................................................................................... 6 RCD clamper circuit ....................................................................................................................................... 6 Peak current control of primary current ..................................................................................................... 6 Output stage .................................................................................................................................................. 7 Feedback and regulation .............................................................................................................................. 7 Active burst mode ......................................................................................................................................... 7 Jittering and soft gate drive ......................................................................................................................... 7 Protection function ....................................................................................................................................... 7 5 Circuit diagram.............................................................................................................. 9 6 6.1 PCB layout ...................................................................................................................11 Top side ........................................................................................................................................................ 11 7 Bill of material..............................................................................................................12 8 Transformer construction ..............................................................................................13 9 9.1 9.2 9.3 Test results ..................................................................................................................14 Efficiency, regulation and output ripple ................................................................................................... 14 Standby power............................................................................................................................................. 16 Line regulation ............................................................................................................................................. 16 Application Note www.infineon.com Please read the Important Notice and Warnings at the end of this document Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Abstract 9.4 9.5 9.6 9.7 9.8 9.9 Load regulation ........................................................................................................................................... 17 Maximum input power ................................................................................................................................ 17 ESD immunity (EN61000-4-2) ..................................................................................................................... 17 Surge immunity (EN61000-4-5) .................................................................................................................. 17 Conducted emissions (EN55022 class B) .................................................................................................. 18 Thermal measurement ............................................................................................................................... 20 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 10.11 10.12 10.13 Waveforms and scope plots ...........................................................................................21 Startup at low/high AC line input voltage with maximum load ............................................................. 21 Soft start ....................................................................................................................................................... 21 Frequency jittering ...................................................................................................................................... 22 Drain and current sense voltage at maximum load................................................................................. 22 Load transient response (Dynamic load from 10% to 100%) ................................................................. 23 Output ripple voltage at maximum load .................................................................................................. 23 Output ripple voltage at burst mode 1 W load ......................................................................................... 24 Active burst mode ....................................................................................................................................... 24 VCC over voltage protection (Odd skip auto restart mode).................................................................... 25 Over load protection (Odd skip auto restart mode) ................................................................................ 25 VCC under voltage/Short optocoupler protection (Auto restart mode)................................................ 26 External protection enable (Non switch auto restart mode).................................................................. 26 Brownout Mode (Non switch auto restart mode) .................................................................................... 27 11 References ...................................................................................................................28 Revision History ...........................................................................................................28 Application Note 2 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Abstract 1 Abstract This document is an engineering report of an universal input 12 W 12 V off-line flyback converter power supply utilizing F3R80 CoolSET™ ICE3AR4780JG. The application demo board is operated in Discontinuous Conduction Mode (DCM) and is running at 100 kHz fixed switching frequency. It has a single output voltage with secondary side control regulation. It is especially suitable for small power supply such as enclosed adapter, blu-ray/DVD player, set-top box, game console, smart meter or open frame auxiliary power supply of white goods, PC, server, etc. Besides having the basic features of the F3R CoolSET™ such as active burst mode, propagation delay compensation, soft gate drive, auto restart protection for major faults (Vcc over voltage, Vcc under voltage, over temperature, over-load, open loop and short opto-coupler), it also has the BiCMOS technology design, selectable entry and exit burst mode level, adjustable brownout feature, built-in soft start time, built-in and extendable blanking time, frequency jitter feature and external auto-restart enable, etc. The particular features need to be stressed are the best-in-class low standby power and the good EMI performance. Application Note 3 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Demonstrator board 2 Demonstrator board This document contains the list of features, the power supply specification, schematic, bill of material and the transformer construction documentation. Typical operating characteristics such as performance curve and scope waveforms are showed at the rear of the report. Figure 1 DEMO-3AR4780JG (Top View) ICE3AR4780JG Figure 2 Application Note DEMO-3AR4780JG (Bottom view) 4 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Specifications of Demonstrator Board 3 Table 1 Specifications of Demonstrator Board Specifications of DEMO-3AR4780JG Input voltage and frequency 85 VAC (60 Hz) ~ 282 VAC (50Hz) Output voltage, current and power 12 V, 1 A, 12 W Dynamic load response (10% to 100% load, slew rate at 1 A/µs, 100 Hz) ±3% of nominal output voltage (Vripple_p_p < 150 mV) Output ripple voltage (full load, 85 VAC ~ 282 VAC) ±1% of nominal output voltage (Vripple_p_p< 50 mV) Active mode four point average efficiency (25%, 50%, 75%, 100% load) (EU CoC Version 5, Tier 2 and EPS of DOE USA) > 84% at 115 VAC and 230 VAC 10% load efficiency (EU CoC Version 5, Tier 1) > 75% at 115 VAC and 230 VAC No load power consumption (EU CoC Version 5, Tier 1) < 75 mW at 115 VAC and 230 VAC Conducted emissions (EN55022 class B) Pass with 9 dB margin ESD immunity (EN61000-4-2) Special Level (±16 kV for both contact and air discharge) Surge immunity (EN61000-4-5) Installation class 4 (±2 kV for line to line and ±4 kV for line to earth) Form factor case size (L x W x H) (103 x 44 x 24) mm3 Application Note 5 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Circuit description 4 Circuit description 4.1 Line input The AC line input side comprises the input fuse F1 as over-current protection. The choke L11, X-capacitors C11, and Y-capacitor C12 act as EMI suppressors. Optional spark gap device SA1, SA2 and varistor VAR can absorb high voltage stress during lightning surge test. After the bridge rectifier BR1 and the input bulk capacitor C13, a voltage of 90 to 400 VDC is present which depends on input line voltage. 4.2 Brownout (Line under voltage protection) To avoid the system damaged due to line under voltage, brownout feature is implemented by sensing the voltage level at BBA pin through the resistors divider from the bulk capacitor. Once the voltage level at BBA pin falls below 0.9V, the controller stops switching and enters into brownout mode. It is until the input level goes back to input voltage range and the Vcc hits 17V, the brownout mode is released. 4.3 Start up Since there is a built-in startup cell in the ICE3AR4780JG, no external start up resistor is required. The startup cell is connecting the drain pin of the IC. Once the voltage is built up at the drain pin of the ICE3AR4780JG, the startup cell will charge up the VCC capacitor C16 and C17. When the VVCC exceeds the on-threshold (VVCC =17 V), the IC starts up. Then the VCC voltage is bootstrapped by the auxiliary winding to sustain the operation. 4.4 Operation mode During operation, the VCC pin is supplied via a separate transformer winding with associated rectification D12 and buffering C16 and C17.In order not to exceed the maximum voltage at VCC pin due to poor coupling of transformer winding, an external zener diode ZD11 and resistor R13 can be added. 4.5 Soft start The soft start is a built-in function and is set at 10 ms. 4.6 RCD clamper circuit While turns off the CoolMOS™, the clamper circuit R11, C15 and D11 absorbs the current caused by transformer leakage inductance once the voltage exceeds designed clamp voltage. Finally drain to source voltage is lower than the maximum break down voltage of CoolMOS™. 4.7 Peak current control of primary current The CoolMOS™ drain source current is sensed via external shunt resistors R14 and R14A which determine the tolerance of the current limit control. Since ICE3AR4780JG is a current mode controller, it would have a cycleby-cycle primary current and feedback voltage control which can make sure the maximum power of the converter is controlled in every switching cycle. Besides, the patented propagation delay compensation is implemented to ensure the maximum input power can be controlled in an even tighter manner. The demo board shows approximately ±3.67% of average maximum input power (Figure 12). Application Note 6 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Circuit description 4.8 Output stage On the secondary side the power is coupled out by a schottky diode D21. The capacitor C22 provides energy buffering following with the LC filter L21 and C24 to reduce the output voltage ripple considerably. Storage capacitors C22 is selected to have a very small internal resistance (ESR) to minimize the output voltage ripple. 4.9 Feedback and regulation The output voltage is controlled using a TL431 (IC21). This device incorporates the voltage reference as well as the error amplifier and a driver stage. Compensation network C25, C26, R24, R25 and R26 constitutes the external circuitry of the error amplifier of IC21. This circuitry allows the feedback to be precisely matched to dynamically varying load conditions and provides stable control. The maximum current through the optocoupler diode and the voltage reference is set by using resistors R22 and R23. Optocoupler IC12 is used for floating transmission of the control signal to the “Feedback” input via capacitor C18. The optocoupler used meets DIN VDE 884 requirements for a wider creepage distance. 4.10 Active burst mode At light load condition, the system enters into active burst mode. The entry and exit burst mode level can be selected in ICE3AR4780JG CoolSET™ by adding different capacitance values of capacitor at FBB pin. After entering into active burst mode, the controller is always active and thus the VCC must always be kept above the switch off threshold VVCCoff ≥ 10.5 V. During the active burst mode, the efficiency maintains in a very high level and at the same time it supports low ripple on VOUT and fast response to load jump. To avoid mis-triggering of the burst mode, there is a 20ms internal blanking time. Once the FBB pin voltage drops below VFB_burst, the internal blanking timer starts to count. When it reaches the built-in 20 ms blanking time, it then enters active burst mode. During active burst mode, the current sense voltage limit is reduced from 1.06 V to Vcsth_burst so as to reduce the conduction losses and audible noise. All the internal circuits are switched off except the reference and bias voltages to reduce the total VCC current consumption to below 0.62 mA. At active burst mode, the FBB voltage is changing like a sawtooth from 3.2 V to 3.5 V. To leave the active burst mode, FBB voltage must exceed 4 V. It will reset the active burst mode and turn the system into normal operating mode. 4.11 Jittering and soft gate drive In order to reduce the emissions of electromagnetic interference (EMI) due to switching noise, the ICE3AR4780JG is implemented with frequency jittering, soft gate drive and 50 Ω gate turn on resistor. The jitter frequency is internally set to 100 kHz (± 4 kHz) and the jitter period is 4 ms. 4.12 Protection function Protection is one of the major factors to determine whether the system is safe and robust. Therefore sufficient protection is necessary. ICE3AR4780JG provides all the necessary protections to ensure the system is operating safely. The protections include VCC over voltage, over load/open loop, VCC under voltage/short optocoupler, over temperature, external protection enable and brownout. When those faults are found, the system will go into auto restart which means the system will stop for a short period of time and restart again. If the fault persists, the system will stop again. It is then until the fault is removed, the system resumes to normal operation. A list of protections and the failure conditions are showed in the below table. Application Note 7 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Circuit description Table 2 Protection function of ICE3AR4780JG Protection function Failure condition Vcc Overvoltage 1. VCC > 20.5 V and FB > 4.5 V & during soft start period 2. VCC > 25.5 V Odd skip Auto Restart Overtemperature (controller junction) TJ > 130°C Odd skip Auto Restart Overload / Open loop VFBB > 4.5 V, last for 20 ms and extended blanking time (extended blanking time counted as 256 times of VBBA charging and discharging from 0.9 V to 4.5V ) Odd skip Auto Restart Vcc Undervoltage / Short Optocoupler VCC < 10.5 V Auto Restart Overtemperature (controller junction) TJ > 130°C Odd skip non switch Auto Restart External protection enable VAE < 0.4 V Non switch Auto Restart Brownout VBO_ref < 0.9 V and last for 30 ~ 60 µs Non switch Auto Restart Application Note Protection Mode 8 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Circuit diagram 5 Figure 3 Application Note Circuit diagram Schematic of DEMO-3AR4780JG 9 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Circuit diagram Note: 1. 2. 3. 4. 5. General guideline for layout design of Printed Cirduit Board (PCB): Star ground at bulk capacitor C13: all primary grounds should be connected to the ground of bulk capacitor C13 seperately in one point. It can reduce the switching noise going into the sensitive pins of CoolSET™ device effectively. The primary star ground can be split into five groups as follows, i. Signal ground includes all small signal grounds connecting to the CoolSET™ GND pin such as filter capacitor ground C17, C18, C19 and opto-coupler ground. ii. VCC ground includes the VCC capacitor ground C16 and the auxiliary winding ground, pin 5 of the power transformer. iii. Current Sense resistor ground includes current sense resistor R14 and R14A. iv. EMI return ground includes Y capacitor C12. v. DC ground from bridge rectifier, BR1 Filter capacitor close to the controller ground: Filter capacitors, C17, C18 and C19 should be placed as close to the controller ground and the controller pin as possible so as to reduce the switching noise coupled into the controller. High voltage traces clearance: High voltage traces should keep enough spacing to the nearby traces. Otherwise, arcing would incur. i. 400 V traces (positive rail of bulk capacitor C13) to nearby trace: > 2.0 mm ii. 600V traces (drain voltage of CoolSET™ IC11) to nearby trace: > 2.5 mm Recommended minimum 232mm2 copper area at drain pin to add on PCB for better thermal performance. Power loop area (bulk capacitor C13, primary winding of the transformer TR1 (Pin 1 and 3), IC11 Drain pin, IC11 CS pin and current sense resistor R14/R14A) should be as small as possible to minimize the switching emission. Application Note 10 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG PCB layout 6 PCB layout 6.1 Top side Figure 4 Top side component legend Figure 5 Bottom side copper and component legend Application Note 11 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Bill of material 7 Bill of material Table 3 Bill of material (V0.3) No. Designator Description Part Number Manufacturer 1 BR1 600V/1A S1VBA60 Shindengen 1 2 C11 0.1µF/305V B329221C3104K Epcos 1 3 C12 2.2nF/250V DE1E3KX222MA4BN01F Murata 1 4 C13 33µF/450V 450BXC33MEFC16X25 Rubycon 1 5 C15 1nF/600V GRM31A7U2J102JW31D9 Murata 1 6 C16 22µF/50V 50PX22MEFC5X11 Rubycon 1 7 C17 100nF/50V GRM188R71H104KA93D Murata 1 8 C18, C26 1nF/50V GRM1885C1H102GA01D Murata 2 9 C19 22nF/50V GRM188R71H223KA01D Murata 1 10 C22 1000uF/16V 16ZLH1000MEFC10X16 Rubycon 1 11 C24 680uF/16V 16ZLH680MEFC8X16 Rubycon 1 12 C25 220nF/50V GRM188R71H224KAC4D Murata 1 13 D11 0.8A/600V D1NK60 Shindengen 1 14 D12 0.25A/200V BAS21-03W Infineon 1 15 D21 30A/100V STPS30M100SFP 1 16 F1 1.6A/300V 36911600000 1 17 HS1 Heat Sink(D21) 577202B00000G 1 18 IC11 ICE3AR4780JG ICE3AR4780JG 19 IC12 SFH617A-3(DIP-4) SFH617A-3 1 20 IC21 TL431BVLPG(T0-92) TL431BVLPG 1 21 L11 68mH/0.4A B82731M2401A033 Epcos 1 22 L21 2.2uH/4.3A 744 746 202 2 Wurth Electronics 1 23 R11 150kΩ /2W/500V PR02000201503JR500 24 R12 10Ω(0603) 1 25 R13 10Ω(0603) 1 26 R14 2.7Ω/0.33W/1206/±1% ERJ8BQF2R7V 1 27 R14A 2.4Ω/0.33W/1206/±1% ERJ8BQF2R4V 1 28 R15 1.8MΩ/1%/1206 1 29 R15A, R15B 1MΩ/1%/1206 2 30 R16 43kΩ/1%(0603) 1 31 R22 820Ω/0603 1 32 R23 1.2kΩ/0603 1 33 R24 68kΩ/0603 1 34 R25 38kΩ/1%/0603 1 35 R26 10kΩ/1%/0603 1 36 TR1 467µH (54:9:12) 37 Test point BBA,FBB,CS,Drain,Vcc,Gnd 38 VAR 0.25W/300V B72207S2301K101 39 ZD1 22V Zener UDZS22B 40 (L N), (+12V Com) Connector 691102710002(WE) Application Note 750343050 Infineon Quantity 1 1 Wurth Electronics 1 1 12 Epcos 1 1 Wurth Electronics 2 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Transformer construction 8 Transformer construction Core and material: EE20/10/6(EF20), TP4A (TDG) Bobbin: 14-Pins, THT, horizontal version (070-5643) Primary Inductance: LP = 467 µH (±10%), measured between pin 1 and pin 3 Manufacturer and part number: Wurth Electronics Midcom (750343050) Figure 6 Application Note Start Stop No. of turns Wire size 3 14 2 12 27 9 1XAWG#28 1 x Litz TIW(7 X AWG#31) 1 Layer 2 1 27 1XAWG#28 1 6 5 12 1XAWG#28 /2 Primary Secondary /2 Primary Auxiliary Transformer structure 13 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results 9 Test results 9.1 Efficiency, regulation and output ripple Table 4 Efficiency, regulation and output ripple Input (VAC/Hz) 85 VAC/60 Hz 115 VAC/60 Hz 230 VAC/50 Hz 282 VAC/50 Hz Application Note Pout (W) Efficiency (η) (%) 28.67 1.21 78.31 0.25 8.22 3.02 82.60 12.06 0.50 11.2 6.03 84.57 10.77 12.06 0.75 14.13 9.05 83.98 14.59 12.06 1.00 22.62 12.06 82.66 0.04050 12.06 0.00 22.36 1.56 12.06 0.10 29.2 1.21 77.31 3.64 12.06 0.25 8.18 3.02 82.83 7.03 12.06 0.50 11.16 6.03 85.78 10.54 12.06 0.75 13.42 9.05 85.82 14.16 12.06 1.00 16.84 12.06 85.17 0.06769 12.06 0.00 25.38 1.58 12.06 0.10 33.91 1.21 76.33 3.80 12.06 0.25 8.84 3.02 79.34 7.12 12.06 0.50 11.47 6.03 84.69 10.48 12.06 0.75 13.38 9.05 86.31 13.92 12.06 1.00 15.29 12.06 86.64 0.09027 12.06 0.00 28.27 1.67 12.06 0.10 36.71 1.21 72.22 3.94 12.06 0.25 8.71 3.02 76.52 7.31 12.06 0.50 11.51 6.03 82.49 10.71 12.06 0.75 13.2 9.05 84.45 14.15 12.06 1.00 15.16 12.06 85.23 Pin (W) Vout (VDC) Iout (A) VOutRPP (mV) 0.03679 12.06 0.00 21.96 1.54 12.06 0.10 3.65 12.06 7.13 14 Average η (%) OLP Pin (W) OLP Iout (A) 15 1.02 14.68 1.03 15.29 1.09 15.98 1.14 83.45 84.90 84.24 82.17 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results Figure 7 Efficiency vs AC line input voltage Figure 8 Efficiency vs output power at 115 VAC and 230 VAC line Application Note 15 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results 9.2 Figure 9 9.3 Figure 10 Application Note Standby power Standby power at no load vs AC line input voltage (measured by Yokogawa WT210 power meter - integration mode) Line regulation Line regulation Vout at full load vs AC line input voltage 16 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results 9.4 Figure 11 9.5 Figure 12 9.6 Load regulation Load regulation Vout vs output power Maximum input power Maximum input power (before over-load protection) vs AC line input voltage ESD immunity (EN61000-4-2) Pass EN61000-4-2 Special Level (±16 kV for both contact and air discharge). 9.7 Surge immunity (EN61000-4-5) Pass EN61000-4-5 Installation class 4 (±2 kV for line to line and ±4 kV for line to earth). Application Note 17 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results 9.8 Conducted emissions (EN55022 class B) The conducted EMI was measured by Schaffner (SMR4503) and followed the test standard of EN55022 (CISPR 22) class B. The demo board was set up at maximum load (12 W) with input voltage of 115 VAC and 230 VAC. Figure 13 Conducted emissions(Line) at 115 VAC and maximum Load Figure 14 Conducted emissions(Neutral) at 115 V AC and maximum Load Application Note 18 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results Figure 15 Conducted emissions(line) at 230 VAC and maximum Load Figure 16 Conducted emissions(Neutral) at 230 V AC and maximum Load Pass conducted emissions EN55022 (CISPR 22) class B with 9 dB margin for quasi peak limit. Application Note 19 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Test results 9.9 Thermal measurement The thermal test of open frame demo board was done using an infrared thermography camera (TVS-500EX) at ambient temperature 25°C. The measurements were taken after two hours running at full load. Table 5 Hottest temperature of demo board No. Major component 85 VAC (°C) 282 VAC (°C) 1 IC11 (ICE3AR4780JG) 62.1 59.1 2 R14 (current sense resistor) 37.7 37.9 3 TR1 (transformer) 43.5 47.0 4 BR1 (bridge diode) 46.3 33.8 5 R11(clamper resistor) 40.9 39.7 6 L11 (EMI choke) 59.2 32.0 7 D21 (secondary diose) 41.4 41.7 8 Ambient 25 25 85 VAC full load and 25⁰C ambient 282 VAC full load and 25⁰C ambient PCB top side PCB top side PCB bottom side PCB bottom side Figure 17 Application Note Infrared thermal image of DEMO-3AR4780JG 20 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10 Waveforms and scope plots All waveforms and scope plots were recorded with a TELEDYNELECROY 606Zi oscilloscope. 10.1 C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) Startup at low/high AC line input voltage with maximum load : Drain voltage (VD) : Supply voltage (VVCC) : Feedback voltage (VFBB) : BBA voltage (VBBA) Startup time at 85 VAC and maximum load ≈ 440 ms Figure 18 10.2 C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) : Drain voltage (VD) : Supply voltage (VVCC) : Feedback voltage (VFBB) : BBA voltage (VBBA) Startup time at 282 VAC and maximum load ≈ 440 ms Startup Soft start Entry/exit burst power selection C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) : Current sense voltage (VCS) : Supply voltage (VVCC) : Feedback voltage (VFBB) : BBA voltage (VBBA) Softstart time at 85 VAC and maximum load ≈ 10 ms Figure 19 Application Note Startup 21 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10.3 C1 (Yellow) F1 (Yellow) Frequency jittering : Drain voltage (VDrain) : Frequency track of C1 Frequency jittering at 85 VAC and maximum load ≈ 95 kHz ~ 103 kHz, Jitter period is ≈ 4 ms Figure 20 10.4 Frequency jittering Drain and current sense voltage at maximum load C1 (Yellow) C2 (Purple) : Drain voltage (VDrain) : Current sense voltage (VCS) C1 (Yellow) C2 (Purple) : Drain voltage (VDrain) : Current sense voltage (VCS) At 85 VAC : VDrain_peak at ≈ 240 V : On duty cycle ≈ 40% At 282VAC : VDrain_peak at ≈ 545 V : On duty cycle ≈ 9.4% Figure 21 Drain and current sense voltage at maximum load Application Note 22 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10.5 Load transient response (Dynamic load from 10% to 100%) C1 (Yellow) : Output ripple voltage (Vout) C2 (Purple) : Output current (Iout) Vripple_pk_pk at 85 VAC ≈ 125 mV (Load change from 10% to 100% at 85 VAC,100 Hz,0.4 A/μs slew rate) Probe terminal end with decoupling capacitor of 0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz filter Figure 22 10.6 C1 (Yellow) C2 (Purple) Load transient response Output ripple voltage at maximum load : Output ripple voltage (Vout) : Output current (Iout) Vripple_pk_pk at 85 VAC ≈ 28 mV Probe terminal end with decoupling capacitor of 0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz filter Figure 23 Application Note C1 (Yellow) : Output ripple voltage (Vout) C2 (Purple) : Output current (Iout) Vripple_pk_pk at 85 VAC ≈ 125 mV (Load change from10% to 100% at 282 VAC,100 Hz,0.4 A/μs slew rate) Probe terminal end with decoupling capacitor of 0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz filter C1 (Yellow) C2 (Purple) : Output ripple voltage (Vout) : Output current (Iout) Vripple_pk_pk at 282 VAC ≈ 15 mV Probe terminal end with decoupling capacitor of 0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz filter Output ripple voltage at maximum load 23 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10.7 C1 (Yellow) C2 (Purple) Output ripple voltage at burst mode 1 W load : Output ripple voltage (Vout) : Output current (Iout) C1 (Yellow) C2 (Purple) : Output ripple voltage (Vout) : Output current (Iout) Vripple_pk_pk at 85 VAC ≈ 28 mV Vripple_pk_pk at 282 VAC ≈ 35 mV Probe terminal end with decoupling capacitor of 0.1 Probe terminal end with decoupling capacitor of 0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz filter μF(ceramic) and 1 μF(Electrolytic), 20 MHz filter Figure 24 Output ripple voltage at burst mode 1 W load 10.8 C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) Active burst mode : Current sense voltage (VCS) : Supply voltage (VVCC) : Feedback voltage (VFBB) : BBA voltage (VBBA) C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) : Current sense voltage (VCS) : Supply voltage (VVCC) : Feedback voltage (VFBB) : BBA voltage (VBBA) Condition to enter burst: VFB < 1.42 V and last for 20 ms Condition to leave burst: VFB > 4.5 V (load change form full load to 0.5 W load at 85 VAC) (load change form 0.5 W load to full load at 85 VAC) Figure 25 Application Note Active burst mode 24 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10.9 VCC over voltage protection (Odd skip auto restart mode) VCC OVP 2 C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) : Drain voltage (VD) : Supply voltage (VVCC) : Feedback voltage (VFBB) : BBA voltage (VBBA) Condition to enter VCC over voltage protection: VCC > 25.5 V (VCC OVP 2) VCC > 20.5 V and VFB > 4.5 V and during soft start (VCC OVP 1) (Short the diode of optocoupler(Pin 1 and 2 of IC12) during system operating at no load and 85 V AC) Figure 26 10.10 VCC overvoltage protection Over load protection (Odd skip auto restart mode) extended blanking Built-in 20 ms blanking C1 (Yellow) : Drain voltage (VD) C2 (Purple) : Supply voltage (VVCC) C2 (Blue) : Feedback voltage (VFBB) C2 (Green) : BBA voltage (VBBA) Condition to enter over load protection: VFBB > 4.5 V, last for 20 ms and extended blanking time (output load change from 1 A to 1.5 A at 85 VAC) Figure 27 Application Note Over load protection 25 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10.11 VCC under voltage/Short optocoupler protection (Auto restart mode) C1 (Yellow) : Drain voltage (VD) C2 (Purple) : Supply voltage (VVCC) C2 (Blue) : Feedback voltage (VFBB) C2 (Green) : BBA voltage (VBBA) Condition to enter VCC under voltage protection: VCC < 10.5 V (short the transistor of optocoupler(Pin 3 and 4 of IC12) during system operating at full load and release at 85 VAC) Figure 28 10.12 VCC under voltage/short optocoupler protection External protection enable (Non switch auto restart mode) C1 (Yellow) : Drain voltage (VD) C2 (Purple) : Supply voltage (VVCC) C2 (Blue) : Feedback voltage (VFBB) C2 (Green) : BBA voltage (VBBA) Condition to enter external protection enable: VBBA < 0.4 V (short BBA pin to Gnd by 10 Ω resistor during system operating at full load and 85 VAC) Figure 29 Application Note External protection enable 26 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG Waveforms and scope plots 10.13 C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) Brownout Mode (Non switch auto restart mode) : Bulk voltage(Vbulk) : Supply voltage (VVCC) : Current sense voltage (VCS) : BBA voltage (VBBA) Condition to enter brownout: VBBA < 0.9 V (brownin: VBBA > 0.9 V ) Brownout: Vbulk ≈ 120 VDC (85 VAC) Brownin : Vbulk ≈ 107 VDC (76 VAC) (gradually increase AC line voltage at full load till system start and reduce line till brownout enter) Figure 30 Application Note C1 (Yellow) C2 (Purple) C2 (Blue) C2 (Green) : Bulk voltage(Vbulk) : Supply voltage (VVCC) : Current sense voltage (VCS) : BBA voltage (VBBA) Condition to enter brownout: VBBA < 0.9 V (brownin: VBBA>0.9 V ) Brownout: Vbulk ≈ 120 VDC (85 VAC) Brownin : Vbulk ≈ 79VDC (56 VAC) (gradually increase AC line voltage at no load till system start and reduce line till brownout enter) Brownout mode 27 Revision 1.0 2016-04-15 1st release to r evie w 12W 12V SMPS Demo Board with ICE3AR4780JG AN-DEMO-3AR4780JG References 11 References [1] ICE3AR4780JG datasheet, Infineon Technologies AG [2] AN-PS0044-CoolSET F3R80 DIP-7 brownout/input OVP and frequency jitter version design guide-V1.5 Revision History Major changes since the last revision Page or Reference -- Application Note Description of change First release. 28 Revision 1.0 2016-04-15 Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CoolGaN™, CoolMOS™, CoolSET™, CoolSiC™, CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, Infineon™, ISOFACE™, IsoPACK™, i-Wafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™, POWERCODE™, PRIMARION™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, SPOC™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. 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