INTERSIL CD4016BMS

CD4016BMS
CMOS Quad Bilateral Switch
November 1994
Features
Applications
• Transmission or Multiplexing of Analog or Digital Signals
• Analog Signal Switching/Multiplexing
• High Voltage Type (20V Rating)
• Signal Gating
• 20V Digital or ±10V Peak-to-Peak Switching
• Squelch Control
• 280Ω Typical On-State Resistance for 15V Operation
• Chopper
• Switch On-State Resistance Matched to Within 10Ω
Typ. Over 15V Signal Input Range
• Modulator
• High On/Off Output Voltage Ratio: 65dB Typ. at FIS =
10kHz, RL = 10kΩ
• High Degree of Linearity: <0.5% Distortion Typ. at FIS
= 1kHz, VIS = 5Vp-p, VDD-VSS ≥ 10V, RL = 10kΩ
• Extremely Low Off State Switch Leakage Resulting in
Very Low Offset Current and High Effective Off State
Resistance: 100pA Typ. at VDD-VSS = 18V, TA = 25oC
• Extremely High Control Input Impedance (Control circuit Isolated from Signal Circuit: 1012Ω Typ.
• Low Crosstalk Between Switches: -50dB Typ. at FIS =
0.9MHz, RL = 1kΩ
• Matched
Control
Input
to
Signal
Output
Capacitance: Reduces Output Signal Transients
• Frequency Response, Switch On = 40MHz (Typ.)
• Demodulator
• Commutating Switch
• Digital Signal Switching/Multiplexing
• CMOS Logic Implementation
• Analog to Digital & Digital to Analog Conversion
• Digital Control of Frequency, Impedance, Phase, and
Analog Signal Gain
Description
CD4016BMS Series types are quad bilateral switches intended
for the transmission or multiplexing of analog or digital signals.
Each of the four independent bilateral switches has a single control signal input which simultaneously biases both the p and n
device in a given switch on or off.
The CD4016BMS is supplied in these 14 lead outline packages:
• 100% Tested for Quiescent Current at 20V
Braze Seal DIP
H4Q
Frit Seal DIP
H1B
• 5V, 10V and 15V Parametric Ratings
Ceramic Flatpack
H3W
Pinout
Functional Diagram
• Maximum Control Input Current of 1µA at 18V Over Full
Package Temperature Range; 100nA at 18V at +25oC
CD4016BMS
TOP VIEW
IN/OUT
1
SIG A IN 1
14 VDD
SIG A OUT 2
13 CONTROL A
SIG B IN 3
12 CONTROL D
SIG B OUT 4
CONTROL B 5
CONTROL C 6
VSS 7
OUT/IN
2
OUT/IN
3
SIG B
IN/OUT
11 SIG D IN
14
VDD
13
CONTROL A
12
CONTROL D
SW
A
SIG A
SW
D
11
4
10 SIG D OUT
CONTROL B
5
CONTROL C
6
SW
B
IN/OUT
SIG D
10
OUT/IN
9 SIG C OUT
8 SIG C IN
9
SW
C
VSS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-733
7
OUT/IN
SIG C
8
IN/OUT
File Number
3296
Specifications CD4016BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
o
Maximum Package Power Dissipation (PD) at +125 C
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
Input Leakage Current
SYMBOL
IDD
IIL
CONDITIONS (NOTE 1)
VDD = 20V, VIN = VDD or GND
IIH
Input/Output Leakage
Current (Switch Off)
N Threshold Voltage
P Threshold Voltage
On-State Resistance
RL = 10K Returned to
VDD-VSS/2
IOZL
IOZH
VNTH
VPTH
RON10
RON10
RON15
RON15
Functional
(Note 3)
Switch Threshold
RL = 100K to VDD
F
oC
MIN
MAX
UNITS
-
0.5
µA
-
50
µA
1
+25
+125oC
VDD = 18V, VIN = VDD or GND
3
-55oC
-
0.5
µA
VC = VDD or GND
1
+25oC
-100
-
nA
2
+125o
VDD = 20
-1000
-
nA
3
-55oC
-100
-
nA
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
3
-55oC
-
100
nA
1
+25oC
-100
-
nA
2
+125oC
-1000
-
nA
3
-55oC
-100
-
nA
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
3
-55oC
-
100
nA
1
+25oC
-2.8
-0.7
V
VSS = 0V, IDD = 10µA
1
+25oC
0.7
2.8
V
VIS = VDD or VSS, VDD = 10V
1
+25oC
-
660
Ω
2
+125oC
-
960
Ω
3
-55oC
-
600
Ω
1
+25oC
-
2000
Ω
2
+125oC
-
2600
Ω
3
-55oC
-
1870
Ω
1
+25oC
-
400
Ω
2
+125oC
-
600
Ω
3
-55oC
-
360
Ω
1
+25oC
-
850
Ω
2
+125oC
-
1230
Ω
3
-55oC
-
775
Ω
7
+25oC
VDD = 20V, VIN = VDD or GND
7
+25oC
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
-55oC
1, 2, 3
+25oC, +125oC, -55oC
4.1
-
V
1, 2, 3
+25oC,
14.1
-
V
VC = VDD or GND
VDD = 20
VDD = 18V
Input/Output Leakage
Current (Switch Off)
LIMITS
TEMPERATURE
2
VDD = 18V
Input Leakage Current
GROUP A
SUBGROUPS
VDD = 18V, VC = 0V, VIS = 18V,
VOS = 0V
VDD = 18V, VIS = 18V, VOS = 0V
VDD = 10V, ISS = -10µA
VIS = 4.75V or 5.75V, VDD = 10V
VIS = VDD or VSS, VDD = 15V
VIS = 7.25 or 7.75, VDD = 15V
VDD = 2.8V, VIN = VDD or GND
SWTHRH5 VDD = 5V, VC = 1.5V, VIS = GND
SWTHRH15 VDD = 15V, VC = 2V, VIS = GND
7-734
C
+125oC,
VOH > VOL <
VDD/2 VDD/2
-55oC
V
Specifications CD4016BMS
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
Input Voltage Control,
Low (Note 2)
Control Input High
Voltage
(Note 2, Figure 12)
VIS = VSS, and
VIS = VDD
SYMBOL
VILC
CONDITIONS (NOTE 1)
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
0.7
V
2
+125oC
-
0.4
V
VDD = 5V, VOS = VDD, VIS = VSS,
and VDD = 5V, VOS = VSS, VIS =
VDD, |IIS| < 10µA
VIHC
VIHC
LIMITS
GROUP A
SUBGROUPS
3
-55oC
-
0.9
V
VDD = 5V, |IIS| = .16mA, 4.6V <
VOS < 0.4V
1
+25oC
3.5
-
V
VDD = 5V, |IIS| = .14mA, 4.6V <
VOS < 0.4V
2
+125oC
3.5
-
V
VDD = 5V, |IIS| = .25mA, 4.6V <
VOS < 0.4V
3
-55oC
3.5
-
V
VDD = 15V, |IIS| = 1.2mA, 13.5V <
VOS < 1.5V
1
+25oC
11
-
V
VDD = 15V, |IIS| = 1.1mA, 13.5V <
VOS < 1.5V
2
+125oC
11
-
V
VDD = 15V, |IIS| = 1.8mA, 13.5V <
VOS < 1.5V
3
-55oC
11
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented.
2. Go/No Go test with limits applied to inputs
3. VDD = 2.8V/3V, RL = 100K to VDD
VDD = 20V/18V, RL = 10K to VDD
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
GROUP A
SUBGROUPS TEMPERATURE
CONDITIONS
Propagation Delay
Signal Input to Signal
Output
TPHL
TPLH
VDD = 5V, VIN = VDD or GND
(Notes 1, 2)
Propagation Delay
Turn On
TPZH
TPZL
VDD = 5V, VIN = VDD or GND
(Notes 2, 3)
9
10, 11
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
100
ns
-
135
ns
9
+25oC
-
70
ns
10, 11
+125oC, -55oC
-
95
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
3. CL = 50pF, RL = 1K, TR, TF < 20ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55oC, +25oC
-
0.25
µA
+125oC
-
7.5
µA
-
0.5
µA
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
Input Voltage Control,
Low
VILC
VDD = 10V, VOS = VDD, VIS =
VSSand VOS = VSS, VIS = VDD
|IIS| < 10µA
7-735
1, 2
1, 2
1, 2
-55oC,
+25oC
+125oC
-
15
µA
-55oC, +25oC
-
0.5
µA
+125oC
-
30
µA
+25oC-55oC
-
0.7
V
+125oC
-
0.4
V
-55oC
-
0.9
V
Specifications CD4016BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
VIHC
VDD = 10V, VIS = VDD or GND
1, 2
+25oC-55oC
7
-
V
1, 2
+125oC
7
-
V
1, 2
-55oC
7
-
V
VDD = 10V
1, 2, 3
+25oC
-
40
ns
VDD = 15V
1, 2, 3
+25oC
-
30
ns
1, 2, 4
+25oC
-
40
ns
1, 2, 4
+25oC
-
30
ns
1, 2
+25oC
-
7.5
pF
Input Voltage Control,
High (See Figure 12)
Propagation Delay Signal
Input to Signal Output
TPHL
TPLH
Propagation Delay
Turn On
TPZH
TPZL
Input Capacitance
VDD = 10V
VDD = 15V
CIN
Any Input
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K. Input TR, TF < 20ns.
4. CL = 50pF, RL = 1K
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
Supply Current
IDD
CONDITIONS
NOTES
TEMPERATURE
VDD = 20V, VIN = VDD or GND
1, 4
+25oC
VDD = 10V, ISS = -10µA
1, 4
+25oC
VDD = 10V, ISS = -10µA
1, 4
+25oC
MIN
MAX
UNITS
-
2.5
µA
-2.8
-0.2
V
-
±1
V
N Threshold Voltage
VNTH
N Threshold Voltage
Delta
∆VNTH
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
P Threshold Voltage
Delta
∆VPTH
VSS = 0V, IDD = 10µA
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
Functional
F
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
Supply Current - SSI
SYMBOL
±0.1µA
IDD
ON Resistance
DELTA LIMIT
RONDEL10
± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
CONFORMANCE GROUP
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
100% 5004
1, 7, 9, Deltas
PDA (Note 1)
7-736
READ AND RECORD
Specifications CD4016BMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
CONFORMANCE GROUP
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
GROUP A SUBGROUPS
1, 7, 9
100% 5004
1, 7, 9, Deltas
100% 5004
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
Group D
READ AND RECORD
IDD, IOL5, IOH5A
Sample 5005
Group A
Group B
METHOD
100% 5004
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE GROUPS
READ AND RECORD
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
Static Burn-In 1
Note 1
2, 3, 9, 10
1, 4-8, 11-13
14
Static Burn-In 2
Note 1
2, 3, 9, 10
7
1, 4-6, 8, 11-14
Dynamic BurnIn Note 1
-
7
14
2, 3, 9, 10
7
1, 4-6, 8, 11-14
Irradiation
Note 2
9V ± -0.5V
50kHz
25kHz
2, 3, 9, 10
5, 6, 12, 13
1, 4, 8, 11
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Schematic Diagram
VDD
CONTROL
VC
n
IN/OUT
VSS
OUT/IN
p
FIGURE 1. 1 OF 4 IDENTICAL SECTIONS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
737
CD4016BMS
Typical Performance Characteristics
SUPPLY VOLTS: VDD = +15V; VSS = 0
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTS: VDD = +10V; VSS = 0
AMBIENT TEMPERATURE (TA) = +25oC
10kΩ
OUTPUT SIGNAL VOLTS (VOS)
12.5
OUTPUT SIGNAL VOLTS (VOS)
RL = 100kΩ
1kΩ
10.0
7.5
VIS
n
5.0
p
VC = VDD
10
RL = 100kΩ
8
10kΩ
1kΩ
6
VIS
4
n
p
VC = VDD
2
VOS
RL
VOS
RL
2.5
0
2.5
5.0
7.5
10.0
12.5
15.0
0
2
4
6
8
10
INPUT SIGNAL VOLTS (VIS)
INPUT SIGNAL VOLTS (VIS)
FIGURE 2. TYPICAL ON-STATE CHARACTERISTICS FOR 1 OF
4 SWITCHES WITH VDD = +15V, VSS = 0V
FIGURE 3. TYPICAL ON-STATE CHARACTERISTICS FOR 1 OF
4 SWITCHES WITH VDD = +10V, VSS = 0V
SUPPLY VOLTS: VDD = +7.5 V; VSS = -7.5V
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT SIGNAL VOLTS (VOS)
OUTPUT SIGNAL VOLTS (VOS)
SUPPLY VOLTS: VDD = +5;V VSS = 0
AMBIENT TEMPERATURE (TA) = +25oC
5
RL = 100kΩ
4
10kΩ
3
1kΩ
VIS
2
n
p
VC = VDD
5
1kΩ
2.5
0
VIS
-2.5
n
1
VOS
RL
1
2
3
4
5
-7.5
FIGURE 4. TYPICAL ON-STATE CHARACTERISTICS FOR 1 OF
4 SWITCHES WITH VDD = +5V, VSS = 0V
-5
OUTPUT SIGNAL VOLTS (VOS)
OUTPUT SIGNAL VOLTS (VOS)
RL = 100kΩ
1kΩ
2
0
VIS
n
p
VC = VDD
-4
-2
0
2
3
2
RL = 100kΩ
10kΩ
1
1kΩ
0
VIS
n
-1
p
VC = VDD
-2
4
RL
VOS
RL
-4
7.5
SUPPLY VOLTS: VDD = +2.5V; VSS = -2.5V
AMBIENT TEMPERATURE (TA) = +25oC
10kΩ
-2
-2.5
0
2.5
5
INPUT SIGNAL VOLTS (VIS)
FIGURE 5. TYPICAL ON-STATE CHARACTERISTICS FOR 1 OF
4 SWITCHES WITH VDD = +7.5V, VSS = -7.5V
SUPPLY VOLTS: VDD = +5V; VSS = -5V
AMBIENT TEMPERATURE (TA) = +25oC
4
VOS
RL
INPUT SIGNAL VOLTS (VIS)
6
p
VC = VDD
-5
0
10kΩ
RL = 100kΩ
-3
6
-2
-1
0
1
2
VOS
3
INPUT SIGNAL VOLTS (VIS)
INPUT SIGNAL VOLTS (VIS)
FIGURE 6. TYPICAL ON-STATE CHARACTERISTICS FOR 1 OF
4 SWITCHES WITH VDD = +5V, VSS = -5V
7-738
FIGURE 7. TYPICAL ON-STATE CHARACTERISTICS FOR 1 OF
4 SWITCHES WITH VDD = +2.5V, VSS = -2.5V
CD4016BMS
Typical Performance Characteristics (Continued)
SUPPLY VOLTS: VDD = +5V, VSS = -5V
CONTROL VOLTS (VC) = -5V
INPUT SIGNAL VOLTS (VIS) = 5VP-P SINE WAVE (1.77 RMS)
*LOAD CAPACITANCE (CL) = CFIXTURE+CMETER=2.3+2.5=4.8pF
FIXTURE AND METER NULLED OUT
CIOS (FIXTURE) = 0.8pF
-55oC
4
+125oC
2
0
VIS
VC = +5V
-2
+125oC
n
p
VOS
RL = 10k
-55oC
-4
30
RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
OR EQUIV.
VOS
p
100kΩ
25
VIS n
37
RL
CL
VC = VSS
10kΩ
20
15
LOAD RESISTANCE
(RL) = 1MΩ
39
41.5
1kΩ
10
45
5
51
ATTENUATION (db)
SUPPLY VOLTS: VDD = +5V; VSS = -5V
OUTPUT SIGNAL RMS MILLIVOLTS (VOS)
OUTPUT SIGNAL VOLTS (VOS)
6
0
-4
-2
10-1
0
2
4
6
INPUT SIGNAL VOLTS (VIS)
FIGURE 8. TYPICAL ON-STATE CHARACTERISTICS AS A
FUNCTION OF TEMPERATURE FOR 1 OF 4
SWITCHES WITH VDD = +5V, VSS = -5V
20
1kΩ
p
37
39
1kΩ
41.5
15
n
10
1kΩ
5
p
VC = VSS
VOS (B)
45
1kΩ
OUTPUT SIGNAL RMS VOLTS (VOS)
25
ATTENUATION (db)
OUTPUT SIGNAL RMS MILLIVOLTS (VOS)
35.5
5V
VC = VDD RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
VIS (A) n
OR EQUIV.
51
10-1
1
10
102
2
103
2
4 68
2
4 68
2
4 68
2
1
10
102
103
INPUT SIGNAL FREQUENCY (fis) kHz
SUPPLY VOLTS:
VDD = +5V, VSS = -5V
INPUT SIGNAL VOLTS
(VIS) = 5Vp-p
SINE WAVE (1.77 RMS)
CONTROL VOLTS
(VC) = +5V
*LOAD CAPACITANCE
= (CFIX + CMETER) =
2.3 + 2.5 = 4.8pF
4 68 4
10
CIOS = 0.8pF
RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
OR EQUIV.
VOS
p
VIS n
(RMS)
RL
CL*
VC = VDD
2.0
LOAD RESISTANCE (RL) = 1MΩ
1.5
10kΩ
1kΩ
-3dB
POINTS
100kΩ
1.0
0.5
0.1
0
4 68
FIGURE 9. TYPICAL FEEDTHRU vs FREQUENCY - SWITCH
OFF
SUPPLY VOLTS: VDD = +5V; VSS = -5V
INPUT SIGNAL VOLTS (VIS) = 5Vp-p SINE WAVE (1.77RMS)
FIXTURE AND METER NULLED OUT
30
2
4 68
2
4
6 8
1
2
4
6 8
10
2
4
6 8
100
INPUT SIGNAL FREQUENCY (FIS) MHz
104
INPUT SIGNAL FREQUENCY (fis) (kHz)
FIGURE 10. TYPICAL CROSSTALK BETWEEN SWITCH
CIRCUITS IN THE SAME PACKAGE
FIGURE 11. TYPICAL FREQUENCY RESPONSE - SWITCH ON
Iis
Vis
CD4016BMS
1 OF 4 SWITCHES
ron =
VOS
[ Vis - Vos ]
[ Iis ]
FIGURE 12. DETERMINATION OF RON AS A TEST CONDITION FOR
CONTROL INPUT HIGH VOLTAGE (VIHC) SPECIFICATION
7-739
CD4016BMS
TYPICAL ON-STATE RESISTANCE CHARACTERISTICS, TA = +25oC
LOAD CONDITIONS
SUPPLY
CONDITIONS
CHARACTERISTICS*
RON
RL = 1kΩ
RL = 10kΩ
RL = 100kΩ
VDD
(V)
VSS
(V)
VALUE
(Ω)
Vis
(V)
VALUE
(Ω)
Vis
(V)
VALUE
(Ω)
Vis
(V)
+15
0
200
+15
200
+15
180
+15
200
0
200
0
200
0
RON (max.)
+15
0
300
+11
300
+9.3
320
+9.2
RON
+10
0
290
+10
250
+10
240
+10
290
0
250
0
300
0
RON (max.)
+10
0
500
+7.4
560
+5.6
610
+5.5
RON
+5
0
860
+5
470
+5
450
+5
600
0
580
0
800
0
RON (max.)
+5
0
1.7k
+4.2
7k
+2.9
33k
+2.7
RON
+7.5
-7.5
200
+7.5
200
+7.5
180
+7.5
200
-7.5
200
-7.5
180
-7.5
RON (max.)
+7.5
-7.5
290
±0.25
280
±0.25
400
±0.25
+5
-5
260
+5
250
+5
240
+5
310
-5
250
-5
240
-5
RON
RON (max.)
RON
RON (max.)
+5
-5
600
±0.25
580
±0.25
760
±0.25
+2.5
-2.5
590
+2.5
450
+2.5
490
+2.5
720
-2.5
520
-2.5
520
-2.5
232k
±0.25
300k
±0.25
870k
±0.25
+2.5
-2.5
*Variation from perfect switch, ron = 0Ω
Typical Wave Response
FIGURE 13. TYPICAL SINE WAVE RESPONSE OF VDD = +7.5V,
VSS = -7.5V
FIGURE 14. TYPICAL SINE WAVE RESPONSE OF VDD = +5V,
VSS = -5V
Scale X = 0.2ms/Div Y = 2.0V/Div
VDD = VC = +7.5V, RL = 10KΩ
CL = 15pF
fis = 1kHz VIS = 5Vp-p
Distortion = 0.2%
Scale X = 0.2ms/Div Y = 2.0V/Div
VDD = VC = +5V, RL = 10KΩ
CL = 15pF
fis = 1kHz VIS = 5Vp-p
Distortion = 0.4%
7-740
CD4016BMS
Typical Wave Response
(Continued)
FIGURE 15. TYPICAL SINE WAVE RESPONSE OF VDD = +2.5V,
VSS = -2.5V
Scale: X = 0.2ms/Div
FIGURE 16. TYPICAL SQUARE WAVE RESPONSE AT VDD = VC
= +15V, VSS = GND
Y = 2.0V/Div
Scale: X = 100ns/Div Y = 5.0V/Div
FIGURE 17. TYPICAL SQUARE WAVE RESPONSE AT VDD = VC
= +10V, VSS = GND
FIGURE 18. TYPICAL SQUARE WAVE RESPONSE AT VDD = VC
= +5V, VSS = GND
Scale: X = 100ns/Div Y = 5.0V/Div
Scale: X = 100ns/Div Y = 2.0V/Div
+10V
0
tr = tf = 20ns
VC
VC
Vis
VDD = +10V
CD4016BMS
Vos
VOS WITH TEST UNIT
(1 SWITCH OF
CD4016BMS PLUGGED
IN TEST FIXTURE)
VOS FIXTURE ALONE
(NO UNIT. . .TERM
5 TO 3 OF SOCKET)
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
(a)
(b)
VC = 10V/Div
VOS = 0.2V/Div
t = 100ns/Div
FIGURE 19. CROSSTALK-CONTROL INPUT TO SIGNAL OUTPUT
7-741
CD4016BMS
REP
RATE
VC
VDD
+10V
0
tr = tf = 20ns
Vis
Vos
CD4016BMS
tr = tf = 20ns
VDD
VC
Vos
CD4016BMS
CL
200KΩ
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
VDD
0
tr = tf = 20ns
Vis = VDD
CL
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
VSS
RL = 10KΩ
VSS
FIGURE 20. PROPAGATION DELAY TIME SIGNAL INPUT (VIS)
TO SIGNAL OUTPUT (VOS)
VC
FIGURE 21. MAXIMUM CONTROL-INPUT REPETITION RATE
MEASURED ON BOONTON CAPACITANCE
BRIDGE MODEL 75A (1MHz)
(13)
±
Vos
(1)
VC = -5V
VSS = -5V
VDD = +5V
CD4016BMS
Vis = VDD
I
VSS
I = 10µA
Vos
Vis
CIOS
Cis
SWITCH THRESHOLD VOLTAGE IS DEFINED AS THE VOLTAGE
APPLIED TO A TRANSMISSION GATE CONTROL WHICH CAUSES
10µA OF TRANSMISSION GATE CURRENT
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
FIGURE 22. SWITCH THRESHOLD VOLTAGE
VDD
0
tr = tf = 20ns
Cos
FIGURE 23. CAPACITANCE CIOS AND COS
VDD
VC
VC
50%
tPZH
Vos
CD4016BMS
Vis = VDD OR VSS
Vos
RL
CL
10%
VSS
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
tPZL
Vos
10%
VSS
RL TO VSS
Vis TO VDD
RL TO VDD
Vis TO VSS
VDD
FIGURE 24. TURN-ON PROPAGATION DELAY CONTROL INPUT
Chip Dimensions and Pad Layout
METALLIZATION:
PASSIVATION:
Thickness: 11kÅ − 14kÅ,
AL.
10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS:
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
-3
7-742
0.0198 inches - 0.0218 i