AN054: Display Driver Family Combines Convenience of Use with Microprocessor Interfaceability

Display Driver Family Combines Convenience of
Use with Microprocessor Interfaceability
Application Note
AN054
Authors: Peter Bradshaw and Dan Watson
Introduction
For some time now Intersil has manufactured a line of
display drivers oriented toward convenience of interface to
the displays themselves and to the microprocessor bus or
other digital system from which the displayed data comes.
These devices have been mainly intended for numeric data
(including hexadecimal and similar codes), and have been
designed to drive Liquid Crystal (LCD), Light Emitting (LED)
and Vacuum Fluorescent (VF) displays. Most have offered
full-time drive, limiting the total number of segments that
could be driven by each device to 28. The recent growth in
popularity of alphanumeric displays, fueled by intelligent
typewriters, language translators, Point of Sale Equipment,
intelligent test equipment, and so on, has led to the
development of a series of alphanumeric display drivers for
LCDs and LEDs. The large number of segments involved
means that any useful multi-character driver must use a
multiplexing scheme, and fortunately LCD technology has
reached a point where suitable multiplexable fluids are now
becoming widely available. As for LEDs, the circuit and
layout technology to handle the higher currents involved in a
suitable LSI process has also been developed at the right
time. A brief glance at the earlier products will lead us to a
closer look at these new display drivers.
Advantages of IC Drivers
Decoding and driving circuits for various types of numeric
and alphanumeric displays have been greatly simplified by
large scale integration. These new display drivers
dramatically exhibit the following benefits and advantages
over discrete designs:
• more circuit functions in less space
• simpler design effort for the user
• more flexible operation
• reduced circuit expense
Consider, for example, the design of an ASCII 8-character
alphanumeric multiplexed LED display system. The block
diagram for such a system constructed with discrete and
MSI components is shown in Figure 2. Included as one of
the blocks is an 8 word by 6-bit memory which stores the 6bit ASCII word for each of the characters to be displayed.
The addresses for the memory are selected either from the
input circuitry, when writing to the display, or from the 3-bit
counter, which generates the addresses for the 3 line to 8
line decoder. The NPN transistors drive the common
cathode display for each character. The data from the
memory is sent to a decoder which determines the correct
segments to be turned on and must be a specially
programmed ROM or PLA with an output for each of the 14or 16-character segments. The PNP transistors serve as
1
individual segment drivers, and the resistors in each of their
collectors serve to set the current for that segment.
By contrast, Figure 1 shows an ASCII 8-character
alphanumeric multiplexed LED display system in which all of
the decoding, multiplexing, and driving is accomplished by a
single integrated circuit, Intersil’s ICM7243. The savings in
board space, design time by the user, and cost are easy to
see. Additionally, this single chip approach offers several
additional features, such as built-in microprocessor
compatibility, low power shutdown mode, and automatic
interdigit blanking. These features would require extra
circuitry in the discrete design and increase the cost of the
system.
One advantage frequently not fully appreciated is the offloading of microprocessor software into the display driver.
This can free up both memory and time for other tasks, as
compared to designs using software-derived display
decoding and timing.
The integrated circuits now available provide a wide selection
of display driving capability and can be divided into several
categories. Most numeric display drivers also provide a few
alphabetic characters for displaying hexadecimal values. True
alphanumeric display devices have numbers, letters,
punctuation marks, and other symbols in their character sets.
The interconnection to display driver ICs also varies from
multiplexed BCD inputs to serial bit-stream arrangements or
parallel microprocessor bus compatible input schemes.
Non-Multiplexed Displays
One important category of driver circuit is the nonmultiplexed, or direct drive type. In this case, direct drive
means that there is one line for each segment of the display
(e.g., 4 digits x 7 segments = 28 lines).
In many applications the use of a full-time or non-multiplexed
configuration has a number of advantages. For relatively high
current displays such as LEDs and VF, the absence of
continuous and somewhat unpredictable display current
changes can be a major advantage. Current spikes and level
changes, reflected usually on supply lines to other circuitry,
are minimized, and generally occur only when the display is
changed, thus being under the control of the rest of the
system. As for LCDs, multiplexable displays, though widely
used in calculators, have not been available on the general
market.
The IMC7211, ICM7212 and ICM7235 series of full time
display drivers come in a number of versions. The ICM7211
drives liquid crystal displays (LCD), the ICM7212 drives light
emitting diode displays (LED) and the ICM7235 drives vacuum
fluorescent display panels (VF). These three display drivers are
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© Intersil Corporation 1999
Application Note 054
identical except for the output driver structure. Multiplexed BCD
or microprocessor bus compatible input configurations are
available. As shown in the Functional Diagram of Figure 3, they
all drive 4 digits of 7 segments each. The data input is fed
through a decoder into the latch, from which the segment
outputs are derived. This particular part is an LCD driver, and
so includes a backplane oscillator and driver, which is also fed
to the segment drivers. The oscillator is arranged so that the
backplane driver can be disabled by tying the oscillator pin to
the negative supply. Once this is done, the associated pin,
together with the segment drivers keyed from it, can then be
externally driven. Several display drivers can thus drive a
multidigit display, with one backplane. The digit into which the
incoming data is loaded is determined by individual select lines,
for ready interface with the multiplexed BCD signals widely
used in instrumentation, etc.
Another version is shown in Figure 4. This part, the
ICM7121M is oriented to microprocessor bus interface, with
binary-coded digit select lines and active low CHIP SELECT
lines. The device is an LED driver, and the backplane
oscillator and control is replaced by a brightness control.
to be constructed, and if desired separate decodes can be
arranged for each digit. Two standard patterns are provided,
as shown in Table 1. The hexadecimal code is widely used in
microprocessor and other binary digital systems, while
“Code B” is popular in instruments and equipment where
certain test and warning messages can be provided readily.
Both provide standard BCD decoding for numerals.
Some typical applications of these devices are shown in the
next few figures. Figure 5 shows the ICM7211 interfaced to
the ICL7135, a new single chip 41/2 digit A/D converter. This
device provides a multiplexed BCD output, together with
polarity and overrange information. The circuit shown uses a
CD4054 to drive the half digit, polarity, and overrange flags.
A similar circuit for driving VF displays is shown in Figure 6,
using the ICM7235. Brightness control is achieved by pulsed
duty cycle using a CMOS 7555 timer on the ON/OFF input.
The identical circuit (with a lower display voltage) can be
used with common cathode LEDs, while substituting an
ICM7212 will allow the use of common anode LEDs.
The output is set to drive common anode displays, with
segment currents of typically 8mA. The Functional Diagram
of the ICM7335M VF display driver is virtually identical,
except for the polarity of the outputs. These outputs can
withstand up to 30V when off, more than adequate for the
standard VF displays available. The segment current is
typically 2.5mA, which also allows the devices to be used for
driving common cathode LEDs.
WRITE
CONTROL
INPUT
Another variation in this family of parts concerns the display
font. The 4 line binary input data is decoded to 7-segment
format in a mask programmable ROM, allowing any pattern
FIGURE 1. 8-CHARACTER ALPHANUMERIC LED DISPLAY
SYSTEM (SINGLE CHIP DESIGN)
WRITE
WRITE
LOGIC
CONTROL
INPUT
14-/16-SEGMENT
DATA
INPUT
6
ADDRESS
INPUT
3
8 CHARACTER
14- OR 16-SEGMENT
LED DISPLAY
ICM7243A/B
8
ASCII TO 14- OR
16-SEGMENT DECODER
6
VCC
DATA
INPUT
6
6x8
MEMORY
SEGMENT
DRIVE
3
ADDRESS
INPUT
3
ADDRESS
MUX
8-CHARACTER 14- OR
16-SEGMENT LED DISPLAY
3
CHARACTER
DRIVE
3-BIT
COUNTER
OSC
3
3 LINE TO 8 LINE
DIGIT DECODER
FIGURE 2. 8-CHARACTER ALPHANUMERIC LED DISPLAY SYSTEM (DISCRETE DESIGN)
2
Application Note 054
D4
SEGMENT OUTPUTS
D3
SEGMENT OUTPUTS
D2
SEGMENT OUTPUTS
D1
SEGMENT OUTPUTS
7 WIDE DRIVER
7 WIDE DRIVER
7 WIDE DRIVER
7 WIDE DRIVER
7 WIDE LATCH EN
7 WIDE LATCH EN
7 WIDE LATCH EN
7 WIDE LATCH EN
PROGRAMMABLE
4 TO 7 DECODER
PROGRAMMABLE
4 TO 7 DECODER
PROGRAMMABLE
4 TO 7 DECODER
PROGRAMMABLE
4 TO 7 DECODER
VDD
VSS
DATA
INPUTS
DIGIT
SELECT
INPUTS
OSCILLATOR
6kHz
FREE
RUNNING
OSCILLATOR
INPUT
+128
BACKPLANE
DRIVER
ENABLE
INPUT/
BP OUTPUT
ENABLE
DETECTOR
FIGURE 3. FUNCTIONAL DIAGRAM OF ICM7211
D4
SEGMENT OUTPUTS
D3
SEGMENT OUTPUTS
D2
SEGMENT OUTPUTS
D1
SEGMENT OUTPUTS
7 WIDE DRIVER
7 WIDE DRIVER
7 WIDE DRIVER
7 WIDE DRIVER
7 WIDE LATCH EN
7 WIDE LATCH EN
7 WIDE LATCH EN
7 WIDE LATCH EN
PROGRAMMABLE
4 TO 7 DECODER
PROGRAMMABLE
4 TO 7 DECODER
PROGRAMMABLE
4 TO 7 DECODER
PROGRAMMABLE
4 TO 7 DECODER
VDD
VSS
DATA
INPUTS
2-BIT
DIGIT SELECT
CODE INPUT
CHIP SELECT 1
CHIP SELECT 2
4-BIT
LATCH
ENABLE
2-BIT
LATCH
2 TO 4
DECODER
ENABLE
ENABLE
ONE
SHOT
FIGURE 4. FUNCTIONAL DIAGRAM OF ICM7212M/ICM7235M
3
BRIGHTNESS
Application Note 054
Figure 7 shows a pair of ICM7211M devices set up on an 8048
bus and accessed by port lines to form an 8-digit LCD display
for a microcomputer based system. In this arrangement, any
digit can be changed independently from the others and the
display used for system values in decimal or hexadecimal
notation. The lines B0-B3 are the data input lines of the display
drivers; data on these lines is decoded from BCD to 7-segment
format when the chip select (CS1 and CS2) conditions are met
for that device. The digit to be written is determined by the
select lines, DS1 and DS2. The 56 segment drive lines from the
two ICM7211s are synchronized by use of the OSC INPUT (pin
36) on the right-hand ICM7211. When this pin is tied low, the
backplane output (pin 5) is transformed into an input and can
be driven by the backplane output of the lefthand ICM7211. In
this way a single 8-digit LCD display with one backplane
connection can be driven by two LCD display drivers.
TABLE 1. OUTPUT CODES FOR 7-SEGMENT DISPLAYS
BINARY
B3
B2
B1
B0
HEXADECIMAL
ICM7211(M)
ICM7212(M)
CODE B
ICM7211A(M)
ICM7212A(M)
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
2
2
0
0
1
1
3
3
0
1
0
0
4
4
0
1
0
1
5
5
0
1
1
0
6
6
0
1
1
1
7
7
1
0
0
0
8
8
1
0
0
1
9
9
1
0
1
0
A
-
1
0
1
1
B
E
1
1
0
0
C
H
1
1
0
1
D
L
1
1
1
0
E
P
1
1
1
1
F
(BLANK)
A similar interface can easily be designed for MCS-80/85/86
systems and the Motorola MC680X and MOS
Technology/Rockwell MCS650X devices. Although the LCD
devices are shown, the same arrangement can also be used
with the ICM7212M and ICM7235M.
The ICM7211, ICM7212 and ICM7235 display drivers are
directly related to a family of counter/display drivers, the
ICM7224, ICM7225, and ICM7236. These devices are 41/2digit counters that directly drive LCD, LED or VF displays.
They handle counting rates as high as 25MHz, display
results up to 19999, and are easily cascadable to form
higher resolution counters. Evaluation kits for these counters
and display drivers, and the ICL7135 A/D converter, are
available from Intersil.
4
Multiplexed LED Displays
LEDs can be multiplexed quite easily, and the ICM7218 will
run 8 digits of 7 segments plus decimal point. The advantage
of multiplexing is immediately apparent, as most versions of
this device require only 28 pins, compared to 40 for the
devices just covered, and they drive twice as many digits.
Versions are available to operate common cathode and
common anode type displays. A further division is made
between devices where the basic access mode is serial, i.e.,
each digit location must be loaded in sequence, and those
where digit locations are individually addressable. The serial
access devices have latches to control certain operating
modes, whereas the random access parts select these via
full-time control pins. These modes include a “shutdown”
operation where the digit and segment drivers are turned off,
and the multiplex scan oscillator is halted. Data can continue
to be loaded, but the power drain is typically only 10µA. Other
operating modes control the data decoding function. The 8
data input lines can be used to directly control the segment
and decimal point outputs, without decoding at all (the
decimal point input is inverted). Alternatively, the lowest 4 data
bits can be decoded according to either of the hexadecimal
and “Code B” fonts shown in Table 1. The device provides
interdigit blanking for about 10µs between digit drive times to
avoid ghosting. The peak drive current for the common anode
device is about 40mA per segment, averaging to 5mA with a
12.2% duty cycle. The common cathode drivers offer about
half the current, suitable for the smaller displays of this type.
A 16-digit microprocessor display application is shown in
Figure 8 using two ICM7218C devices connected to the data
and address lines of an 8048 microcomputer. Note that the
individual 7-segment displays are interleaved to simplify the
addressing of the two driver chips. The 3 digit address lines
of each ICM7218 are tied to the same 3 address lines of the
8048. When data appears on the data output lines of the
8048 and the write command is given, the display drivers will
be addressed simultaneously and the 2 digits addressed by
DA0, DA1, and DA2 will be written simultaneously. The
decimal point inputs come from the 8048 address lines. The
code selected by pin 9 of the ICM7218 is hexadecimal.
Independent addressing and the no-decode mode of the
ICM7218A, B, and E allow them to be used in non-numeric
applications. Since each LED segment is independently
addressable by way of 8 data input lines and 8 segments per
digit (7 + decimal point), it is possible to use them as LED
system status panel drivers or as 64-segment bar graph
drivers. Two LED system status panel examples are shown in
Figure 9, one with 32 channels of red and green LEDs, and
one with 21 channels of red, yellow, and green LEDs. Each of
these status panels can be driven by one ICM7218 display
driver with individual LEDs arranged in groups of 8 for each of
the 8 digit outputs.
4-1/2 DIGIT LCD DISPLAY
5
REF
VOLTAGE
+5V
-5V
ANALOG
GND
0.47µF
1.0µF
1µF
100kΩ
INPUT
0.1µF
+5V
28
OR
27
STROBE
26
5 AZIN
6 BUF OUT
R/H
25
DIG GND
24
POL
23
7 RC1
CLOCK
22
8 RC2
1 16 15 14 12 5 3 4
CD4064A
7 8 13 11 10 9 2 6
BACKPLANE
120kC = 3 READINGS/SEC
CLOCK IN
BUSY
21
5 BP
9 INPUT LO
D1
20
31 D1
10 INPUT HI
D2
19
32 D2
11 V+
D3
18
33 D3
12 D5
D4
17
34 D4
13 B1
B8
16
30 B3
14 B2
B4
15
29 B2
28 B1
ICM7211A
2,3,4
6-26
37-40
OPTIONAL
CAPACITOR
35 VSS
0V
FIGURE 5. 41/2 DIGIT A/D CONVERTER WITH LCD DISPLAY
+5V
OSC 36
22-100pF
27 B0
VDD 1
+5V
Application Note 054
100kΩ
UR
ICL7135
2 REF
ANALOG
3 COMMON
4 INT OUT
27Ω
100kΩ
1 V-
28 SEGMENTS D1-D4
6
4.7kΩ
41/2 DIGIT LCD DISPLAY
+5V
2N3702
POL
D1-D4
+5V
28
SEGMENTS
+5V
1/ CD4042
4
POL
CL
Q
D
4.7kΩ
1 GND
2
4.7kΩ
+5V
2N3702
V+ 8
ICM7555
3 OUT
-15V
+5V
5
ON/OFF
4 RESET
7
50kΩ
6
5
4.7kΩ
31
D1
32
0.1µF
D2
D1-D5
33
2,3,4
6-26
37-40
D3
34
D4
ICM7235A
30
B3
29
B2
B1-B4
VDD
35
28
B1
27
B0
36
0V
VSS
VDD
1
+5V
FIGURE 6. VACUUM FLORESCENT DISPLAY DRIVER
0V
Application Note 054
0V
0V
8-DIGIT LCD DISPLAY
V+ +5V
7
ICM7211M
HIGH ORDER DIGITS
INPUT
V+ +5V
I/O
2,3,4
BP 5
SEGMENTS 6-26
37-40
DATA
B0-B3
36 OSC
DS1DS2CS1 CS2
27 28 29 30 31 32 33 34
1 VDD
35
VSS 1
2,3,4
6-26 SEGMENTS
35
37-40
DATA
36 OSC
B0-B3
DS1 DS2 CS1 CS2
27 28 29 30 31 32 33 34
V+ +5V
BP 5
V+ +5V
NC
I/O
NOTE:
EA SHOULD GO TO +5V FOR 80(C) 35 DEVICES
8355/8755 NOT NECESSARY
TO ICM7211 INTERFACE
5 20
40
VCC VDD VSS
21 A8
22 A9
23 A10
PA0 24
2 CE
25
4 RESET
26
27
1 PROG
28
29
12 AD0
30
13 AD1
PA7 31
14 AD2
15 AD3
PB0 32
16 AD4
33
17 AD5
34
18 AD6
35
19 AD7
36
37
38
PB7 39
8 IOR
10 IOW
8355/8755
9 RD
ROM/EPROM
11 ALE
WITH I/O
EXPANDER
7
3
6
NC
FIGURE 7. 8-DIGIT LCD MICROCOMPUTER DISPLAY
NC
I/O
I/O
Application Note 054
NC
40 26 20
VCC VDD VSS P10 27
28
29
IM80C48
30
8048
31
2 XTAL 1 8748
32
µCOMPUTER 33
P17 34
3 XTAL 2
P20 21
22
4 RESET
23
7 EA
24
(NOTE)
35
36
37
5 SS
P27 38
DB0 12
13
1 T0
14
15
39 T1
16
6 INT
17
18
DB7 19
ALE PSEN PROG WR RD
11
9
25
10 8
ICM7211M
LOW ORDER DIGITS
Application Note 054
Figure 10 shows a functional diagram of an ICM7218E used
in a 6-bit binary to 64-segment bar graph application. The
write control block generates the write command and
address of the group of 8 segments to be written. The
address is compared with the 3 MSBs of the input binary
value. If the address to be written is less than the 3 MSBs,
then the data is to be all “ones”, turning on those 8 segments
corresponding to the 3 MSBs. If the address is greater than
the 3 MSBs, the data is to be all “zeros”. When the address
is equal to the 3 MSBs, the data generator uses the 3 LSBs
of the input word to determine the point at which the bar
graph changes from on to off. The data is found by: data
value = (2n) - 1 where n is the 3-bit LSB value (0 to 8).
Note that the data sent to the decimal point input (pin 8)
needs to be inverted.
Alphanumeric LED display systems have recently been
simplified in the same way that the numeric-only LED display
system has been simplified by the ICM7218 family (Figures 1
and 2). A pair of integrated circuits dedicated to 14- and
16-segment alphanumeric LED displays have been
developed - the ICM7243A and B. These devices accept a
6-bit parallel ASCII code, decode it, and drive the appropriate
segments of an 8-character common cathode display. The
mask programmable character sets and corresponding ASCII
codes are shown in Figures 11 and 12 for the 14-and
16-segment versions.
The ICM 7243 has 2 input data modes. The Random Access
(RA) mode allows independent addressing of characters by
way of 3-digit address lines. The RA mode writes only the
character addressed. The Serial Access (SA) mode writes
characters from left to right on the display without having to
externally address each character. Right to left writing can be
done by wiring the digits in reverse order. The OSC/OFF pin
on the ICM7243 provides a shutdown mode which, when
grounded, will put the display driver in a low-power mode,
blanking the displays while the memory reaction is kept active.
The DISPLAY FULL and SERIAL ENABLE lines combine to
make cascading display drivers easy. An example of a
24-character LED display is shown in Figure 13. The MODE
lines are all tied high to set up serial input, and DISPLAY
FULL is connected to SEN of the next device to enable
cascading. When CHIP SELECT is high, the WRITE line is
active-low. If however, active-high is desired, WRITE can be
tied low and CHIP SELECT used as an active-high write line.
The characters will be written from left to right as new ASCII
data is presented to the 6-bit input bus and the WRITE
command is given.
Figure 14 shows the use of the OSC/OFF pin to get the
shutdown mode. In this example two ICM7243s are dedicated
to the same 8 characters of the LED display. The drivers are
enabled alternately, performing a message select function.
When the OSC/OFF pin is brought low by the open-collector
inverter, all outputs of that driver are turned off, freeing its group
8
of 8 LED characters to be driven by the other ICM7243. The
display driver is turned on by allowing the OSC/OFF pin to float.
The average segment current of the ICM7243 is 3mA
maximum (24mA/8 digits). This is quite enough current to give
good contrast to the 0.375 or 0.4 inch high displays. If larger
displays are to be driven it is an easy task to add a simple
transistor current boost circuit to each character and segment
output. The current boost circuit shown in Figure 15 will provide
an average segment current of about 12mA. This current
should be sufficient to drive larger alphanumeric LED displays.
Multiplexed Liquid Crystal Displays
The benefits of multiplexing have been slow in coming to LCD
systems, outside of a few consumer items. Much of the reason
lies with the display. A reverse biased LED (or VF device) will
not display anything, so part-time forward bias control is
enough to control the overall result. But LCDs require an AC
drive, and continuously look at the voltage between backplane
and segment. Thus, multiplexing LCDs require waveforms that
rely on a threshold in the RMS voltage-vs contrast
characteristics. The result is that until recently no multiplexed
LCD displays were commercially available (off-the-shelf), and
naturally it is hard to justify building display drivers for
unavailable displays! Nevertheless, Intersil had introduced the
ICM7231/32/33/34 family of Triplex Multiplexed LCD drivers
and several matching LCD displays have become available.
Figure 16 shows a block diagram of the ICM7233 display driver
for 4 characters of 18 segments.
The 6 data input lines are decoded into 18 segment lines
according to the font shown in Table 2. These are then
latched in the character location selected by the two address
lines at the rising edge of one of the Chip Select inputs. The
segments are arranged on 6 segment lines against 3
common (backplane) lines as shown in Figure 17. The
resistive divider sets up a total of 4 voltage levels and the
COMmon and SEGment lines are switched between these
levels as shown in Figure 18. The resulting voltages between
one segment in the display and its common backplane are
shown in Figure 19. The ratio of RMS voltages for ON and
OFF conditions of the segment is 1.92:1 as shown. The
relationship between contrast and applied voltage for a
typical multiplexed LCD display is shown in Figure 20, and
indicates that the viewing angle for adequate contrast at this
level is satisfactory. Figure 21 shows the variation with
temperature of the voltage margins (expressed as peak
voltage) above and below which the display will begin to
malfunction.
The ICM7231 uses 4 of the input data lines for binary display
data, and 2 more for annunciator inputs. The segment
latches are divided into 8 groups (digits) of 9 (7 segments
plus 2 annunciators) with 1 extra address input provided for
selection. Several different versions offer hexadecimal or
Code B fonts (Table 1) and different annunciator connections
(see Figure 22 for patterns).
8
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
8
8
+5V
GND
9
40
2
VCC
26
VDD
+5V
VSS
XTAL1
3
XTAL2
4
P20
P21
P22
P23
P24
P25
P26
P27
RESET
IM80C48
8048
8748
µCOMPUTER
7
EA
5
NC
SS
D80
D81
D82
D83
D84
D85
D86
D87
1
T0
39
T1
INPUT
6
INT
ALE PSEN PROG WR
11
9
25
10
RD
8
GND
V+
27
28
29
30
31
32
33
34
28
V+
GND
DIGITS
DIGITS
SEGMENTS
SEGMENTS
21
22
23
24
35
36
37
38
5
DA0
6
DA1
10
DA2
12
13
14
15
16
17
18
19
12
11 ID0
ID1
13
ID2
14
ID3
7
V+
5
6
10
ICM7218C/D
7
DA0
DA1
DA2
ICM7218C/D
ID7 (DEC. PT.)
ID7 (DEC. PT.)
12
11
13
14
9 THREE
LEVEL
V+
WR
8
FIGURE 8. 16-DIGIT LED MICROCOMPUTER DISPLAY
9
ID0
ID1
ID2
ID3
THREE
LEVEL
WR
8
Application Note 054
P10
P11
P12
P13
P14
P15
P16
P17
19
8
28
19
20
GND
+5V
GND
CHANNELS
CHANNELS
A B C D E F G H J K L M N P Q R S T U V W
RED LEDS
OFF
GREEN LEDS
DIGIT
DRIVE LINES
YELLOW LEDs
CAUTION
GREEN LEDs
GO
SEGMENT
8 DRIVE LINES
8
RED LEDs
STOP
A B C D E F G H J K L M N P Q R S T U V W X Y Z 1 2 3 4 5 6 7 8
ON
DIGIT
DRIVE LINES
SEGMENT
8 DRIVE LINES
8
10
ICM7218A/B/E
ICM7218A/B/E
32 CHANNEL x 2 INDICATORS
STATUS PANEL
21 CHANNEL x 3 INDICATORS
STATUS PANEL
FIGURE 9. STATUS PANEL EXAMPLES FOR ICM7218
3
DATA
GENERATOR
8
8
DP
7
“<“
BINARY
DATA
(MSBs)
3
“=”
“>”
SEGMENT
DATA
ICM7218A/B/E
64-SEGMENT
BAR GRAPH
3-BIT
COMPARATOR
3
3
ADDRESS
WR
ADDRESS
GENERATOR
AND WRITE
CONTROL
FIGURE 10. 6-BIT BINARY TO BAR GRAPH APPLICATION
8
DIGIT
Application Note 054
BINARY
DATA
(LSBs)
a1
f
h
a2
i
g1
e
m
11
l
0
1
1
0
1
1
k
c
d1
DP
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FIGURE 11. ICM7243A 16-SEGMENT CHARACTER FONT WITH DECIMAL POINT
Application Note 054
D5, D4
0
b
g2
d2
0
j
f
a1
a
a2
h
i
j
g1
e
12
0
0
1
1
0
1
1
g2
m
l
k
d2
d
d1
c
DP
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
NOTE: Segments a and d appear as 2 segments each, but both halves are driven together.
FIGURE 12. ICM7243B 14-SEGMENT CHARACTER FONT WITH DECIMAL POINT
Application Note 054
D5, D4
0
b
13
8-CHARACTER LED DISPLAY
8-CHARACTER LED DISPLAY
8-CHARACTER LED DISPLAY
CLR
V+
V+
CHAR
MODE
CLR
SEG
CHAR
MODE
ICM7243A
SEN
D0-D5
CS
CLR
SEG
CHAR
MODE
DISPLAY
FULL
WR
SEN
SEN
D0-D5
CS
SEG
ICM7243A
ICM7243A
DISPLAY
FULL
WR
CLR
6-BIT
INPUT DATA
CHIP SELECT
WRITE
FIGURE 13. 24-CHARACTER LED MICROCOMPUTER DISPLAY
D0-D5
CS
WR
Application Note 054
V+
8
8
14
CHAR
SEQ
CHAR
16
DISPLAY
FULL
ICM7243
SEQ
ICM7243
SEN
16
OSC/OFF CS
WR D0-D5
OSC/OFF CS
WR D0-D5
Application Note 054
6
CHAR
SEQ
CHAR
DISPLAY
FULL
ICM7243
SN7405
SEQ
ICM7243
SEN
6
OSC/OFF D0-D5
CS
WR
6
MESSAGE
SELECT
CSA
WRA
DATA
CSB
WRB
FIGURE 14. ICM7243 MESSAGE SELECT APPLICATION
OSC/OFF D0-D5
6
CS
WR
Application Note 054
+5V
+5V
VDD
+5V
SEGMENT
DRIVER
VLED = 1.6V
RTYPICAL = 100Ω
100Ω
1mA
2N2219
R
SEG
SEG x
DISPLAY
ICM7243
CHARACTER
DRIVER
CHAR
SEGMENT LEDs
CHARN
RON ~ 4Ω
14Ω (100mAPEAK)
14mA
R ON = 4Ω
2N6034
1.4 AMP PEAK
GND
GND
FIGURE 15A. STANDARD DISPLAY CONNECTION
GND
FIGURE 15B. LED CURRENT BOOST CONNECTION
FIGURE 15. DISPLAY CURRENT BOOST CIRCUIT FOR ICM7243
The serial input versions, the ICM7232 and ICM7234,
exchange the 6 data input lines for 6 more SEGment lines,
allowing 2 digits or one character extra per driver. The
Address and Chip Select Lines are replaced by 4 serial input
control lines (Figure 23) which clock data and address
information into a shift register before writing it into the
display. A DATA ACCEPTED flag output indicates when
enough data has been entered into the shift register, and
enables the writing operation. WRite pulses also reset the
shift register and DATA ACCEPTED flag. The two
annunciator locations need not be filled, and clocking more
data into the shift register than it can accept causes an
automatic reset. This minimizes the chance of displaying
incorrect information.
The serial input format on the ICM7234 is similar (Figure 24)
except that all bits need to be loaded into the shift register to
determine the character code and location. Data to be
written into nonexistent addresses is ignored.
The initial setup of the optimum display voltage, and its
variation with temperature, shown in Figure 21, is
accommodated in the ICM7231/32/33/34 devices by
separating the display driving voltage from the logic voltage,
and also allowing the input signals to exceed the logic supply
in one direction. The display voltage can be controlled by the
use of the ICL7663, as shown in Figure 25.
The device pinouts are arranged to simplify the board layout
of display systems. The basic layout for the ICM7231 and a
corresponding display, for example, is shown in Figure 26,
and the others are similar.
The convenient interface with microprocessors is indicated
in Figure 27. Here the 8-bit bus of an MCS-48
microcomputer is used to provide the 6 data bits and the 2
address bits for writing to a series of 4-character drivers, the
ICM7233. Port lines select specific drivers via one of the
15
CHIP SELECT lines, while the other provides WR cycle
timing. A similar arrangement can be used with any
microprocessor that provides a WR line, such as the
MCS-80/85. A slightly more complex interface to an
MC680X processor is shown in Figure 28. Here, address
lines are used for character and chip selection, enabled by a
port line from another peripheral chip. Note that in both
these circuits, and any other multiple chip systems of this
kind, the 3 common lines must be separated for each group
of digits or characters. Several displays organized in this
manner are now available from some vendors (notable
Epson), and more are expected soon.
An example of the serial interface connection can be seen in
Figure 29 where a COPS420C microcomputer has been fitted
with a 10-character alphanumeric LCD display. The display
and drivers can easily be located at some remote point in the
system and communicate with the microcomputer via the 4
data lines, serial data, serial clock, WRITE 1, and WRITE 2.
The microcomputer controls which character is being written
by sending the appropriate write pulse and by sending the
digit address bits. The last 3 bits in the string of 9 sent to the
ICM7234s are the digit address bits. Since the digit
addressing is sent with each data word, the display may be
written in random access mode.
Summary
The display drivers mentioned here are examples of how
CMOS technology is being used to simplify the design of
numeric and alphanumeric display systems. The method of
driving (direct, multiplex, triplex) is not usually as important to
a system designer as the questions regarding the type of
display (LCD, LED, Vacuum Fluorescent, Gas Discharge), the
size of display, and the number of digits or characters. The
actual construction of display systems is easier now that there
is a wide selection of decoder/drivers from which to choose.
Application Note 054
CHAR 4
U V WX Y Z
CHAR 3
U V WX Y Z
CHAR 2
U V WX Y Z
CHAR 1
U V WX Y Z
SEGMENT
LINE
DRIVERS
6 WIDE
V+
OUTPUT
LATCHES
16 WIDE
VH
18
18
18
VL
18
18
VDISP
ON CHIP
DISPLAY
VOLTAGE
LEVEL
GENERATOR
PIN 2 (INPUT)
DISPLAY
TIMING
GENERATOR
CHARACTER
ADDRESS
DECODER
DATA
DECODER
EN
ONE
SHOT
COM 1
COMMON
LINE
DRIVER
COM 2
COM 3
DATA INPUT
LATCHES
ADDRESS
INPUT
EN
LATCHES
EN
D0 D1 D2 D3 D4 D5
A0
ASCII DATA
INPUTS
A1
ADDRESS
INPUTS
CS1 CS2
CHIP SELECT
INPUTS
FIGURE 16. ICM7233 FUNCTIONAL DIAGRAM
16
Application Note 054
TABLE 2. 6-BIT ASCII 18-SEGMENT FONT
(ICM7233, ICM7234) (Continued)
TABLE 2. 6-BIT ASCII 18-SEGMENT FONT
(ICM7233, ICM7234)
DISPLAY OUTPUT
D5, D4
CODE INPUT
DISPLAY OUTPUT
D5, D4
CODE INPUT
D3
D2
D1
D0
0
1
0
0
0
0
1
1
0
0
1
0
1
0
1
0
1
0
0
0
1
1
1
0
1
1
0
1
0
0
1
1
0
0
0
1
0
1
1
1
0
1
0
1
1
0
1
1
1
0
0
1
1
1
1
1
1
1
U
V
D3
D2
D1
D0
0
0
0
0
0
0
0, 0
WX
Y
0, 1
1, 0
Z
1, 1
0, 0
0, 1
1, 0
COM 1
COM 2
COM 3
FIGURE 17A. SEGMENT LINE CONNECTIONS
FIGURE 17B. COMMON LINE CONNECTIONS
FIGURE 17. ICM7233 AND ICM7234 SEGMENT PATTERN 18-SEGMENT ALPHANUMERIC
17
1, 1
Application Note 054
φ1 φ2 φ3 φ1´ φ2´ φ3´
VP = (V+) - VDISP
φ1 φ2 φ3 φ1´ φ2´ φ3´
+
VH
COM 1
+VP
VP
VL
VDISP
ALL OFF
0
+
VH
COM 2
VL
-VP
COMMON LINE
WAVEFORMS
VP
V RMS = -------- = V RMS OFF
3
VDISP
+
ON CHIP
RESISTOR
STRING
VH
COM 3
VL
~75kΩ
VL
ON
VH
VL
VDISP
+
a, g ON
VH
d OFF
+VP
a, g ON
VL
VDISP
a, d OFF
-VP
VH
VH
+
0
g, d OFF
~75kΩ
+
a SEGMENT
a ON
+
VDISP
b SEGMENT
LINE
ALL OFF
+VP
0
d OFF
~75kΩ
PIN 2
VDISP
-VP
INPUT
11 VP
V RMS = ---------- × -------- = V RMS ON
3
3
TYPICAL
SEGMENT LINE
WAVEFORMS
(SEGMENT
LINE “Y”)
+VP
VL
VDISP
ALL ON
0
+
-VP
VH
ALL ON
VL
VDISP
V RMS ON
11
Voltage Contrast Ratio = ------------------------------ = ---------- = 1.92
V RMS OFF
3
NOTES:
NOTES:
1. φ1, φ2, φ3, - Common High with Respect to Segment.
1. φ1, φ2, φ3, - Common High with Respect to Segment.
2. φ1´, φ2´, φ3´, - BP Low with Respect to Segment.
2. φ1´, φ2´, φ3´, - Common Low with Respect to Segment.
3. COM 1 Active during φ1, and φ1´.
3. COM 1 Active during φ1, and φ1´.
4. COM 2 Active during φ2, and φ2´.
4. COM 2 Active during φ2, and φ2´.
5. COM 3 Active during φ3, and φ3´.
5. COM 3 Active during φ3, and φ3´.
FIGURE 18. DISPLAY VOLTAGE WAVEFORMS
18
FIGURE 19. VOLTAGE WAVEFORMS ON SEGMENT
Application Note 054
0+
0-
100
TA = 25oC
90
6
θ=0
θ = -10o
5
80
CONTRAST (%)
70
PEAK VOLTAGE
θ = -30o
60
VOFF =
1.1VRMS
50
40
θ = +10o
PEAK VOLTAGE FOR
90% CONTRAST (ON)
4
3
2
30
20
VON = 2.1V
1
PEAK VOLTAGE FOR
10% CONTRAST (OFF)
0
-10
0
10
0
0
1
2
3
APPLIED VOLTAGE (VRMS)
4
FIGURE 20. CONTRAST vs APPLIED RMS VOLTAGE
X
Y
10
20
30
40
50
AMBIENT TEMPERATURE (oC)
FIGURE 21. TEMPERATURE DEPENDENCE OF LC THRESHOLD
X
Z
Y
Z
(NOTE)
SEGMENT LINE CONNECTIONS
SEGMENT LINE CONNECTIONS
COM 1
(NOTE)
a
f
COM 1
b
COM 2
g
e
COM 2
AN1
(NOTE)
AN2
b
g
c
d
a
f
e
AN2
(NOTE)
COM 3
COMMON LINE CONNECTIONS
(“A” AND “B” SUFFIX VERSIONS)
c
d
AN1
(NOTE)
COM 3
COMMON LINE CONNECTIONS
“C” SUFFIX DEVICES
NOTE: Annunciators can be: STOP , GO ,
,
-arrows that point to information printed around the display opening etc., whatever the
designer display opening etc., whatever the designer chooses to incorporate in the liquid crystal display.
FIGURE 22. ICM7231 AND ICM7232 DISPLAY PATTERNS
19
Application Note 054
D10
D9
D8
D7
D6
D5
D4
D3
X Y Z
X Y Z
X Y Z
X Y Z
X Y Z
X Y Z
X Y Z
X Y Z
D2
X Y Z
D1
X Y Z
V+
SEGMENT
LINE
DRIVERS
3 WIDE
ON CHIP
VH DISPLAY
VOLTAGE
LEVEL
V GENERATOR
OUTPUT
LATCHES
9 WIDE
L
VDISP
9
9
9
9
9
9
9
9
9
9
PIN 2 (INPUT)
COM 1
DIGIT
ADDRESS
DECODER
9
DATA
DECODER
COMMON
LINE
DRIVERS
EN
COM 3
SERIAL INPUT
CONTROL LOGIC
CLOCK
AN1 AN2 BD0 BD1 BD2 BD3
A0
A1
SHIFT REGISTER
SHIFTS RIGHT TO LEFT
ON RISING EDGE OF DATA CLOCK
A2
A3
DATA
DATA DATA
INPUT CLOCK
INPUT
WRITE
DATA
INPUT ACCEPTED
OUTPUT
FIGURE 23. ICM7232 FUNCTIONAL DIAGRAM
20
COM 2
DISPLAY
TIMING
GENERATOR
WRITE ORDER
21
DATA
CLOCK
INPUT
D1
D0
WRITE
FIRST
D2
D3
1
D4
D5
2
A0
A1
A2
WRITE
LAST
3
= DON’T CARE
8
9
TENTH CLOCK
WITH NO WRITE
PULSE RESETS
SR AND LOGIC
tDH
D0
DATA
VALID
DATA
ACCEPTED
OUTPUT
D1
DATA
VALID
D2
DATA
VALID
A1
DATA
VALID
A2
DATA
VALID
tODI
tWP
tWLL
tCWS
tWP
WRITE
INPUT
tODI
RESETS SHIFT REGISTER
AND CONTROL LOGIC IF
DATA ACCEPTED IS HIGH
tODH
DECODES AND STORES
DATA, RESETS SHIFT
REGISTER AND LOGIC
WHEN DATA ACCEPTED
IS LOW
FIGURE 24. ICM7234 ONE CHARACTER INPUT TIMING DIAGRAM
Application Note 054
tDS
DATA
INPUT
Application Note 054
+5V
+VIN
SEN
VOUT1
VOUT2
LOGIC
SYSTEM,
PROCESSOR,
ETC.
VDD
1.8MΩ
MUX’D LCD DISPLAY
ICL7663
VSET
300kΩ
VTC
SHDN GND
ICM7233
2.7MΩ
VDISP
VSS
DATA BUS
FIGURE 25. DRIVING A MULTIPLEXED LCD DISPLAY
D8
D7
D6
D5
D4
D3
D2
D1
COM 1
COM 2
COM 3
XYZ
XYZ
XYZ
XYZ
XYZ
XYZ
XYZ
XYZ
ICM7231AF/BF
TOP VIEW
TO INPUT
FIGURE 26. PIN ORIENTATION AND DISPLAY CONNECTIONS
22
23
8048
MICROCOMPUTER
V+ V+
VDD
VCC
26 40
20 VSS P10 27
20pF
27
2 OSC1
2N2222
V+
1µF
V+
1 TO
INPUTS
GND
I/O PORT 2
40 VDD
36 VSS
D0
30
3-29
2
VDISP
ICM7233A
D5 A0 A1CS2 CS2
35 37 38 39 1
V+
GND
2
3-29
40 VDD
36 VSS
D0
30
VDISP
200kΩ
VDISP
ADJ.
ICM7233A
D5 A0 A1CS2 CS2
35 37 38 39 1
6.8kΩ
BUS TO
EXTERNAL
MEMORY AND
OTHER PERIPHERALS
BUS
39 T1
6 INT
DB7 19
11 9 25 10 3
ALE
RD
(NOTE)
PSEN
PROG
V+
WR
1MΩ
NOTE: PULL-UP RECOMMENDED ON CS1
FIGURE 27. 8048/IM80C40 MICROCOMPUTER WITH 8-CHARACTER 16-SEGMENT FULL ASCII TRIPLEX LIQUID CRYSTAL DISPLAY
Application Note 054
3 OSC2 P17 34
P20 21
22
23
4 RESET
24
35
36
7 EA
P26 37
P27 38
5 SS
DB0 12
+
27
I/O PORT
6MHz
20pF
TEMPERATURE
COMPENSATION
V+
MC6802
MICROPROCESSOR
WITH RAM
V+
24
1.21
VSS
39 EXTAL
V+
4MHz
V+
RE 36
V+
2
40 VDD 3-29
DISPLAY VDISP
36 VSS
CS1
DATA ADD CS2
30-35 37,38 39
V+
GND
40 RESET
3 MR
V+ 10kΩ
6 NMI
7 BA
IRQ
4
ADD 9-20
BUS 22-25
E37
R/W
34
VMA
5
27
D0-D5
2
A0,
A1
1
A2
ICM7233AIPL
6
D0-D5
2
A0,
A1
ICM7233AIPL
1
A2
6
D0-D5
2
A0,
A1
ICM7233AIPL
1
A2
6
D0-D5 A0,
A1
2
TO OTHER
PARTS OF
SYSTEM
8
16
1
A2
2-5, 16, 30-33, 38-40
1/ 74LS00
4
V+
V+
29 VCC
ADDRESS
21-28
PORT
CP2 35
8-15
DATA DATA CP1 34
20 E
CTO 19
6 CS0 CTC 18
CTG 17
7 R/W
36 VSS
IRQ
1MΩ
1 P7 DISPLAY STORAGE ENABLE
OTHER I/O
8
7
CONTROL
COUNTER/TIMER
MC6846
ROM-I/O-TIMER
FIGURE 28. MC6502 MICROPROCESSOR WITH 16-CHARACTER 16-SEGMENT FULL ASCII LIQUID CRYSTAL DISPLAY
Application Note 054
6
DATA
BUS
26-33
27
ICM7233AIPL
VCC 35
SB
38 XTAL
2 HALT
27
27
8
VCC
Application Note 054
10-CHARACTER
TRIPLEXED LCD DISPLAY
COPS420C
33
33
ICM7234
ICM7234
S0
DATA IN
SK
CLOCK
D0
WRITE
VDISP
D1
VDISP
DATA IN
CLOCK
WRITE
FIGURE 29. 10-CHARACTER ALPHANUMERIC TRIPLEXED LCD DISPLAY WITH SERIAL MICROCOMPUTER INTERFACE
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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