[ /Title (HS26C31 RH) /Subje ct (Radia tion Harde ned Quad Differe ntial Line Driver) /Autho r () /Keyw ords (Inters il Corpo ration, semic onduc tor, Radiat ion Harde ned, RH, Rad Hard, QML, Satellit e, SMD, Class V, Data HS-26C31RH-T ® Data Sheet August 1, 2008 Radiation Hardened Quad Differential Line Driver Intersil’s Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. FN4591.2 Features • QML Class T, Per MIL-PRF-38535 • Radiation Performance - Gamma Dose . . . . . . . . . . . . . . . . . . . . 1 x 105 RAD(Si) - SEU and SEL . . . . . . . . . . Immune to 100MeV/mg/cm2 • EIA RS-422 Compatible Outputs (Except for IOS) • CMOS Compatible Inputs The Intersil HS-26C31RH-T is a Quad Differential Line Driver designed for digital data transmission over balanced lines and meets the requirements of EIA Standard RS-422. Radiation Hardened CMOS processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments. • High Impedance Outputs when Disabled or Powered Down The HS-26C31RH-T accepts CMOS inputs and converts them to RS-422 compatible outputs. This circuit uses special outputs that enable the drivers to power-down without loading down the bus. Enable and disable pins allow several devices to be connected to the same data source and addressed independently. • Full -55°C to +125°C Military Temperature Range • Low Power Dissipation 2.75mW Standby (Max) • Single 5V Supply • Low Output Impedance 10Ω or Less Applications • Line Transmitter for MIL-STD-1553 Serial Data Bus Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the HS-1840ARH-T are contained in SMD 5962-96663. A “hot-link” is provided from our website for downloading. www.intersil.com/military/ Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. http://rel.intersil.com/reports/search.php Ordering Information ORDERING NUMBER INTERNAL MKT. NUMBER PART MARKING # TEMP. RANGE (°C) PACKAGE PKG. DWG. # 5962R9666301TEC HS1-26C31RH-T Q 5962R96 66301TEC -55 to +125 16 LD SBDIP D16.3 HS1-26C31RH/PROTO HS1-26C31RH/PROTO HSI - 26C31RH/PROTO -55 to +125 16 LD SBDIP D16.3 5962R9666301TXC HS9-26C31RH-T Q 5962R96 63201TEC -55 to +125 16 LD FLATPACK K16.A HS9-26C31RH/PROTO HS9-26C31RH/PROTO HS9 - 26C31RH/PROTO -55 to +125 16 LD FLATPACK K16.A 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2000, 2008. All Rights Reserved Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation. All other trademarks mentioned are the property of their respective owners. HS-26C31RH-T Pinouts HS1-26C31RH-T (16 LD SBDIP), CDIP-T16 TOP VIEW HS9-26C31RH-T (16 LD FLATPACK), CDFP4-F16 TOP VIEW AIN 1 16 VDD AO 2 15 DIN AO 3 14 DO ENABLE 4 13 DO AIN 1 16 VDD AO 2 15 DIN AO 3 14 DO ENABLE 4 13 DO BO 5 12 ENABLE BO 5 12 ENABLE BO 6 11 CO BO 6 11 CO BIN 7 10 CO BIN 7 10 CO 9 CIN GND 8 9 CIN GND 8 Logic Diagram ENABLE ENABLE DIN CIN BIN AIN DO DO CO CO BO BO AO AO TRUTH TABLE INPUTS OUTPUT DEVICE POWER ON/OFF ENABLE ENABLE IN OUT OUT ON 0 1 X HI-Z HI-Z ON 1 X 0 0 1 ON X 0 0 0 1 ON 1 X 1 1 0 ON X 0 1 1 0 OFF (0V) X X X HI-Z HI-Z All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 2 FN4591.2 August 1, 2008 HS-26C31RH-T Die Characteristics BACKSIDE FINISH: DIE DIMENSIONS: Silicon 2450µm x 4950µm x 533µm ±25.4µm (97 x 195 x 21mils ±1mil) PASSIVATION: METALLIZATION: Type: SiO2 Thickness: 8kÅ ±1kÅ M1: Mo/Tiw Thickness: 5800Å M2: Al/Si/Cu Thickness: 10kÅ ±1kÅ WORST CASE CURRENT DENSITY: < 2.0e5 A/cm2 TRANSISTOR COUNT: SUBSTRATE POTENTIAL: 285 Internally connected to VDD. May be left floating. PROCESS: Radiation Hardened CMOS, AVLSI Metallization Mask Layout (15) DIN (16) VDD (16) VDD (1) AIN HS-26C31RH AO (2) (14) DO AO (3) (13) DO (12) ENABLE ENABLE (4) 3 CIN (9) (10) CO GND (8) BO (6) GND (8) (11) CO BIN (7) BO (5) FN4591.2 August 1, 2008