[ /Title (HS26C31 RH) /Subje ct (Radia tion Harde ned Quad Differe ntial Line Driver) /Autho r () /Keyw ords (Inters il Corpo ration, semic onduc tor, Radiat ion Harde ned, RH, Rad Hard, QML, Satellit e, SMD, Class V, Data HS-26CLV31RH ® Data Sheet May 28, 2009 Radiation Hardened 3.3V Quad Differential Line Driver The Intersil HS-26CLV31RH is a radiation hardened 3.3V quad differential line driver designed for digital data transmission over balanced lines, in low voltage, RS-422 protocol applications. CMOS processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments. The HS-26CLV31RH accepts CMOS level inputs and converts them to differential outputs. Enable pins allow several devices to be connected to the same data source and addressed independently. The device has unique outputs that become high impedance when the driver is disabled or powered-down, maintaining signal integrity in multi-driver applications. Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-96663. A “hot-link” is provided on our homepage for downloading. www.intersil.com/military/ FN4898.2 Features • Electrically Screened to SMD # 5962-96663 • QML Qualified per MIL-PRF-38535 Requirements • 1.2 Micron Radiation Hardened CMOS - Total Dose. . . . . . . . . . . . . . . . . . . . . 300 krad(Si)(Max) - Single Event Upset LET . . . . . . . . . . . 100MeV/mg/cm2) - Single Event Latch-up Immune • Extremely Low Stand-by Current . . . . . . . . . .100µA (Max) • Operating Supply Range . . . . . . . . . . . . . . . . 3.0V to 3.6V • CMOS Level Inputs . . .VIH > (0.7)(VDD); VIL < (0.3)(VDD) • Differential Outputs. . . . . . . . . . . VOH > 1.8V; VOL < 0.5V • High Impedance Outputs when Disabled or Powered Down • Low Output Impedance . . . . . . . . . . . . . . . . . 10Ω or Less • Full -55°C to +125°C Military Temperature Range • Pb-Free (RoHS Compliant) Applications • Line Transmitter for MIL-STD-1553 Serial Data Bus Ordering Information ORDERING NUMBER (Note) INTERNAL MKT. NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. # 5962F9666302QEC HS1-26CLV31RH-8 Q 5962F96 66302QEC -55 to +125 16 LD SBDIP D16.3 5962F9666302QXC HS9-26CLV31RH-8 Q 5962F96 66302QXC -55 to +125 16 LD FLATPACK K16.A 5962F9666302VEC HS1-26CLV31RH-Q Q 5962F96 66302VEC -55 to +125 16 LD SBDIP D16.3 5962F9666302VXC HS9-26CLV31RH-Q Q 5962F96 66302VXC -55 to +125 16 LD FLATPACK K16.A HS1-26CLV31RH/PROTO HS1-26CLV31RH/PROTO HS1- 26CLV31RH /PROTO -55 to +125 16 LD SBDIP D16.3 HS9-26CLV31RH/PROTO HS9-26CLV31RH/PROTO HS9- 26CLV31RH /PROTO -55 to +125 16 LD FLATPACK K16.A NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2000, 2008, 2009. All Rights Reserved Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation. All other trademarks mentioned are the property of their HS-26CLV31RH Pinouts HS9-26CLV31RH (16 LD FLATPACK) CDFP4-F16 TOP VIEW HS1-26CLV31RH (16 LD SBDIP) CDIP2-T16 TOP VIEW AIN 1 16 VDD AIN 1 16 VDD AO 2 15 DIN AO 2 15 DIN 14 DO AO 3 14 DO ENABLE 4 13 DO BO 5 12 ENABLE AO 3 13 DO ENABLE 4 BO 5 12 ENABLE BO 6 11 CO BIN 7 10 CO GND 8 9 CIN BO 6 11 CO BIN 7 10 CO GND 8 9 CIN Logic Diagram ENABLE ENABLE DIN CIN BIN AIN DO DO CO CO BO BO AO AO All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 2 FN4898.2 May 28, 2009 HS-26CLV31RH Die Characteristics DIE DIMENSIONS: Substrate: 96.5 mil x 195 mils x 21 mils (2450 x 4950) AVLSI1RA Backside Finish: INTERFACE MATERIALS: Silicon Glassivation: ASSEMBLY RELATED INFORMATION: Type: PSG (Phosphorus Silicon Glass) Thickness: 8kÅ ±1kÅ Substrate Potential (Powered Up): VDD Metallization: ADDITIONAL INFORMATION: Bottom: Mo/TiW Thickness: 5800Å ±1kÅ Top: AlSiCu (Top) Thickness: 10kÅ ±1kÅ Worst Case Current Density: <2.0 x 105A/cm2 Bond Pad Size: 110µm x 100µm Metallization Mask Layout TABLE 1. HS26CLV31RH PAD COORDINATES (15) DIN (16) VDD (16) VDD (1) AIN HS-26CLV31RH RELATIVE TO PIN 1 (14) DO AO (2) (13) DO AO (3) (12) ENABLE ENABLE (4) (11) CO BO (5) (10) CO 3 CIN (9) GND (8) GND (8) BIN (7) BO (6) PIN NUMBER PAD NAME X Y COORDINATES COORDINATES 1 AIN 0 0 2 A0 0 -570.7 3 A0 0 -1483.5 4 ENABLE 0 -2124.8 5 B0 0 -2873.5 6 B0 0 -3786.3 7 BIN 0 -4357 8 GND 852.4 -4357 8 GND 1062.4 -4357 9 CIN 1912.8 -4357 10 C0 1912.8 -3786.3 11 C0 1912.8 -2873.5 12 ENABLE 1912.8 -2124.8 13 D0 1912.8 -1483.5 14 D0 1912.8 -570.7 15 DIN 1912.8 0 16 VIN 1062.4 0 16 VIN 852.4 0 NOTE: Dimensions in microns FN4898.2 May 28, 2009