Application Note 1851 Single-Event Performance of the ISL75052SEH Introduction Part Description The intense proton and heavy ion environment encountered in space applications can cause a variety of Single-Event Effects (SEE) in electronic circuitry, including Single-Event Upset (SEU), Single-Event Transient (SET), Single-Event Functional Interrupt (SEFI), Single-Event Latch-up (SEL), Single-Event Burnout (SEB) and Single-Event Gate Rupture (SEGR). SEE can lead to system-level performance issues including disruption, degradation and destruction. For predictable and reliable space system operation, individual electronic components should be characterized to determine their SEE response. The ISL75052SEH is a radiation hardened, single output LDO specified for a maximum output current of 1.5A. The device is specified to operate from input voltages over the 4.0V to 13.2V range. Attainable output voltages are bounded by a 0.6V reference on the low end and a 225mV dropout at 1.5A or 75mV at 0.5A. The output is adjustable based on an external resistor divider. The 16-lead dual in-line ceramic flatpack has a metal pad on the bottom to facilitate thermal management. The part has an enable input (EN) and an open-drain power-good (PG) signal. This report discusses the results of Intersil’s SEE testing of the ISL75052SEH LDO. Testing was carried out with two objectives in mind. The first was to establish safe operating limits with regard to input voltage and incident ion linear energy transport (LET). The second was to establish the characteristics of SET under normal operating conditions. Irradiation Test Facility Note: Throughout this document LETEFF is used to indicate effective linear energy transfer in units of MeV*cm2/mg. For brevity the units are omitted and should be understood throughout the rest of the document. Executive Summary of Results Damaging SEE (SEB, SEGR, or SEL) No damage was recorded for parts tested at VIN ≤15.0V, LETEFF = 86 (Au at normal incidence), and case temperature at +125°C ±10°C. Parts were tested both disabled (i.e. VOUT = 0.0V) and with VOUT = 14.0V and IOUT = 1.8A. Testing was performed at the Radiation Effects Facility of Texas A&M University’s (TAMU) Cyclotron Institute in College Station, Texas. The TAMU facility is coupled to a K500 super-conducting cyclotron, which is capable of generating a wide range of ion species with the various energy, flux and fluence levels needed for SEE testing. Details about the facility and the ion beams can be found on the TAMU Cyclotron Institute web site (http://cyclotron.tamu.edu/ref/). The testing reported here was done March 7, 2013. Reference Documents • ISL75052SEH Datasheet • ISL75052SEH Evaluation Board User Guide • ISL75052SEH Radiation Test Report • SMD (5962-13220) Single-Event Functional Interrupt (SEFI) No SEFI were observed during any of the testing, and no SET on power-good (PG) to a 0.5V trigger was captured either. Single-Event Transient (SET) No VOUT SETs were observed in excess of a VOUT deviation window of +35mV and -20mV. No power-good (PG) SET were found for an observational threshold of 0.5V. The output capacitance was composed of two tantalum capacitors (T541X107M025AH6510) with nominal values of 100µF and 60mΩ ESR. November 10, 2014 AN1851.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1851 FIGURE 1. SCHEMATIC USED FOR SEE TESTING SEE Testing Description SEE testing was carried out with samples mounted on the engineering evaluation boards. Loading was provided by an electronic load. The schematic of the board is shown in Figure 1. Digital multimeters monitored input voltage (VIN), output voltage (VOUT) and input current (IIN). In disabled test cases the leakage current to the output (ILK) was monitored. For damaging SEE (SEB, SEGR, SEL) studies the parts were heated with a film heater on the back of the circuit board to +125°C ±10°C case temperature. The heater current to achieve the desired case temperature was determined prior to the TAMU trip and applied during testing. Parameters VOUT, IIN and ILK were monitored before and after irradiation as indications of part damage. For the SET studies the case temperature was left to ambient. VOUT and PG (power-good) were used as the triggering signal for a LeCroy wave Runner 4-channel digital oscilloscope to capture SET. Other channels that were simultaneously captured the reference voltage (BYP), and the parts internally generated low voltage supply (VCCX). Submit Document Feedback 2 Damaging SEE Testing and Results (SEB, SEGR, SEL) The test matrix run for damaging SEE on the ISL75052 appears in Table 1. The same four parts (device under test, DUT) were used for all the testing and accumulated about 55krad(Si) by the end of the testing. The parameters monitored pre and post irradiation to look for damage are listed with the actual measurements. The measurement variations are all within the on-site measurement repeatability so there is no evidence of damage. VIN = 14.7V was the intended goal for passing SEE without damage, while the VIN = 15.0V was an effort to document some margin against that goal. AN1851.0 November 10, 2014 Application Note 1851 TABLE 1. DAMAGING SEE TESTING MATRIX UNIT VIN (V) IOUT (A) PRE DUT1 14.7 14.7 DUT2 1.8 14.011 1.8 14.011 DUT3 1.8 13.978 1.8 13.980 DUT4 1.8 13.973 1.8 13.969 13.969 Disabled 1.8 14.040 15.0 15.0 13.975 Disabled 14.7 14.7 13.979 Disabled 15.0 15.0 13.980 Disabled 14.7 14.7 14.012 Disabled 15.0 15.0 14.012 Disabled 14.7 14.7 POST Disabled 15.0 15.0 IIN (mA) IOUT = 0 VOUT (V) 14.040 Disabled 1.8 14.051 14.051 ILK (nA) VOUT = 0 PRE POST PRE POST 9.5 9.5 200 200 24.8 24.6 9.7 9.8 270 255 24.7 24.8 9.5 9.5 260 260 24.1 24.2 9.7 9.8 290 280 24.4 24.3 9.5 9.5 260 260 23.9 23.7 9.7 9.8 325 332 24.2 24.1 9.5 9.5 330 330 24.0 24.0 9.7 9.7 365 350 24.3 24.1 NOTE: Each of the 16 tests listed was done with Au at 0° (LETEFF = 86), TC = +125°C, and flux of 5x104 ion*cm-2*s-1 to fluence of 1x107 ion/cm2. Submit Document Feedback 3 AN1851.0 November 10, 2014 Application Note 1851 Damaging SEE (SEB, SEGR, SEL) Discussion Conservatively the data in Table 1 represents a fluence of 8x107 ion/cm2 at VIN 14.7V and LETEFF = 86 without a failure. This corresponds to a nominal cross section of 1.25x10-8 cm2, which is smaller than any active device in the product and so is a very strong statement against damage susceptibility at LETEFF = 86. The clean results at VIN = 15.0V provide evidence of extra margin against the 14.7V product claim for SEB, SEGR, and SEL free operation. SET Testing and Results SET testing was done with gold (Au) at zero degrees incidence for LETEFF = 86. The device temperature was left to the ambient conditions. The output voltage (VOUT) was set to 3.5V for all tests. Four units were tested with irradiation runs at each of three different conditions: VIN = 4.0V and IOUT = 0.1A, VIN = 4.0V and IOUT = 1.5A, and VIN = 13.2V and IOUT = 0.1A. The first two conditions cover a load range for low supply headroom (0.5V between VIN and VOUT) and the last condition looks at high supply headroom (9.7V). In the last case, the current was only tested at 0.1A because of thermal considerations. It was anticipated that the high load current and low headroom condition (nearest drop-out) would be the worst case for negative transients, and the low load current and high headroom case would be the worst for positive transients. This was indeed found to be the case. Oscilloscope triggering on VOUT was set to capture transients with ±10mV VOUT deviations and also ±75mV VOUT deviations. The BYP and VCCX were also captured on any VOUT trigger for information on the origin of the SET. The captures were set to start 20µs prior to the trigger and end 80µs after the trigger. No SETs were captured with the ±75mV trigger during 1x107 ion/cm2 of each run. The ±10mV transients were plentiful; capturing was terminated at roughly 200 SET captures for each run. The 200 SET count limit was reached at about 2x106 Composite Plots VOUT (ordinate) is 10mV/div. 4 No SET on PG (power-good, to a -0.5V trigger) was registered. TABLE 2. SUMMARY OF VOUT SET TESTING COUNT TERMINATING FLUENCE 201 1.92E+06 200 1.88E+06 202 1.96E+06 202 2.02E+06 202 1.22E+06 202 1.18E+06 206 8.66E+05 4 272 1.54E+06 423 1 201 2.22E+06 426 2 202 1.89E+06 429 3 202 1.90E+06 432 4 202 1.52E+06 RUN DUT 421 1 424 2 427 3 430 4 422 1 425 2 428 3 431 VIN IOUT 0.1 4.0 1.5 13.2 0.1 SET Composite Plots and Discussion The following plots give a qualitative look at the SET populations captured. For each of the three operating conditions tests has a plot for each of the four DUTs. These plots are composites of the first 200. All SET captured for each DUT at VIN = 4.0V, VOUT = 3.5V, IOUT = 0.1A. Time (abscissa) is 10µs/div and FIGURE 2. DUT1 Submit Document Feedback ion/cm2 for IOUT = 0.1A, but was reached at about 1.3x106 ion/cm2 for the 1.5A load. This reflects the generation of negative transients achieving the trigger value with the higher load current (1.5A); the same SET at the lower load current (0.1A) did not reach the trigger value and so were not captured. FIGURE 3. DUT2 AN1851.0 November 10, 2014 Application Note 1851 Composite Plots All SET captured for each DUT at VIN = 4.0V, VOUT = 3.5V, IOUT = 0.1A. Time (abscissa) is 10µs/div and VOUT (ordinate) is 10mV/div. (Continued) FIGURE 4. DUT3 FIGURE 5. DUT4 The vast majority of the SET for VIN = 4.0V and IOUT = 0.1A are fast, positive transients indicating a rapid increase in the current being supplied by the ISL75052SEH beyond the load demand (0.1A). The fast, positive transients peak about 2µs to 3µs after they start with a small spike at the top. The small spike at top of the SET is due to the excess current encountering the high frequency impedance of COUT. The falling edge of this spike indicates the real SET is over in less than 5µs. However, COUT has been overcharged in that time so that VOUT is now above the setting. Since the ISL75052 has no active pull-down device, the excess VOUT can only decay away through the load and feedback divider. The 0.1A load and the COUT value then set the rate of decay of the VOUT overvoltage (200µF at 0.1A for 0.5mV/µs or 5mV/div in the figures). The few slow, negative transients begin with the characteristic discharge rate of COUT indicating the part has stopped supplying current. A bottom VOUT is reached above -20mV at which time the parts supply of current resumes. A relatively slow (100s of µs) recovery back to the nominal VOUT ensues. These slow, negative VOUT transients correlated to small drops in the reference voltage (BYP) used for regulation. The entire VOUT SET can then be understood on the basis of a slight dropping of BYP due to the ion. For the -20mV events seen here at VOUT = 3.5V, the driving SET deviation in BYP is only about -3mV. All the captured transients in Figures 6 through 9 are bounded by a window of +25mV and -20mV deviation. These correspond to+1% and -0.6% of the 3.5V output. At lower output voltages the absolute magnitudes would be expected to apply; for a 1V output the relative deviations would become +3.5% and -2%. Submit Document Feedback 5 AN1851.0 November 10, 2014 Application Note 1851 Composite Plots 100 SET captured for each of DUTs 1 through 4 at VIN = 4.0V, VOUT = 3.5V, IOUT = 1.5A. Time (abscissa) is 10µs/div and VOUT (ordinate) is 10mV/div. FIGURE 6. DUT1 FIGURE 7. DUT2 FIGURE 8. DUT3 FIGURE 9. DUT4 With 1.5A of load current, the dominant form of SET captured switched to a fast, negative transient. The high loading draws VOUT down rapidly now when the device current being supplied is interrupted. At the lower load (0.1A) the same SET would not have resulted in a VOUT drop large enough to reach the 10mV trigger. So it is not that any new SET form has appeared, it is just that the SET are amplified by the higher load to the point of capture. The fast, negative transient have a duration of only a few microseconds (the precipitous fall in VOUT set by the load current). Then the loop control recovers VOUT in about 20µs. that similar BYP events would look significantly different from those in Figures 10 through 13 other than a more rapid decline followed by the same slow recovery. These captured transients for IOUT = 1.5A are bounded by +15mV and -20mV. This is less in both directions than the previous case. There are still some fast, positive transients. These are actually the same transients seen in Figures 10 through 13, but the higher load demand has modified the captured forms a bit. The rise is not quite as fast and the spike at the top is gone. This is an indication that the charging of COUT is much reduced; this is also supported by the lower VOUT ramp starts. There were no slow, negative transients observed. There is no obvious reason for this to be the case. However, given the correlation to the BYP disturbances, there is no reason to believe Submit Document Feedback 6 AN1851.0 November 10, 2014 Application Note 1851 Composite Plots 200 SET captured for each of DUTs 1 through 4 at VIN = 13.2V, VOUT = 3.5V, IOUT = 0.1A. Time (abscissa) is 10µs/div and VOUT (ordinate) is 10mV/div. FIGURE 10. DUT1 FIGURE 11. DUT2 FIGURE 12. DUT3 FIGURE 13. DUT4 Submit Document Feedback 7 AN1851.0 November 10, 2014 Application Note 1851 For the case of VIN = 13.2V and IOUT = 0.1A the fast, positive transients again dominate as they did in Figures 2 through 5 (VIN = 4.0V, IOUT = 0.1A). However, with more VIN headroom (9.7V above VOUT) both the spike at the top of the SET and the residual charging of COUT are larger. This indicates that more current is being pushed during the SET. Clearly the worst case positive SET are found for low load currents and high headroom on VIN. There is still one slow, negative transient that correlates to a minuscule drop in BYP. Under these conditions the transients are bounded by +35mV and -15mV. Over all three operational conditions the observed transients are bounded by a +35mV and -20mV window. Further SET Discussion No SEFIs, PG SETs, or VOUT SETs in excess of ±75mV were observed to the full 1x107 ion/cm2 in each of the 12 SET runs (4 DUTs, 3 conditions). This puts rather comfortable bounds on any possible cross section for events. At the very least, 4x107 ion/cm2 failed to generate these events for each of the three operating conditions. Taken together, a fluence of 1.2x108 ion/cm2 yielded no events. A MATLAB program was applied to the SET data to extract the peak deviation and the time duration outside the ±10mV deviation window. The deviations were calculated based on the VOUT of that trace prior to triggering, so there is a small offset from the absolute scales of the SET plots. The results are plotted in Figure 14. This clearly shows a SET deviation window (+33mV, -20mV) and highlights two types of SET. Most SETs are a short disturbance followed by a recovery time that depends on the loading conditions. At light loading (0.1A) the positive SET are larger and require time to discharge COUT. At high loading (1.5A) negative SET dominate due to interruption in current, and the recovery proceeds immediately after that SET when control loop reasserts itself and supplies recovery current. The long negative SET are due to small drops in the reference voltage and require a longer time to recover. FIGURE 14. SET DURATION VERSUS SET PEAK DEVIATION FOR ALL CAPTURED DATA Another way to look at the SET population is to consider the cross section presented by the various SET magnitudes. This approach yields the plot in Figure 15. The small population of long, negative SET so obvious in Figure 14 corresponds to the very small cross section negative events in Figure 15. FIGURE 15. SET REPRESENTED AS CROSS SECTION BY EVENT VOUT PEAK DEVIATION Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 8 AN1851.0 November 10, 2014