5962-13220

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Make corrections to figure 2 terminal connections. Pin 10, delete TMODE and
replace with PG. Pin 11, delete GND and replace with TMODE. - ro
13-10-09
C. SAFFLE
REV
SHEET
REV
A
A
A
A
A
A
A
A
A
A
A
A
A
SHEET
15
16
17
18
19
20
21
22
23
24
25
26
27
REV STATUS
REV
A
A
A
A
A
A
A
A
A
A
A
A
A
A
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
RICK OFFICER
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
CHECKED BY
RAJESH PITHADIA
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHARLES F. SAFFLE
DRAWING APPROVAL DATE
MICROCIRCUIT,LINEAR, 1.5 A, LOW DROPOUT
REGULATOR, MONOLITHIC SILICON
13-07-11
REVISION LEVEL
A
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
5962-13220
1 OF 27
5962-E001-14
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and
space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
R
13220
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
V
X
C
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
Circuit function
ISL75052
1.5 amp, low dropout regulator
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Descriptive designator
See figure 1
Terminals
Package style
16
Ceramic metal seal flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
2
1.3 Absolute maximum ratings. 1/
Input voltage (VIN) relative to GND ........................................................................................... -0.3 V to +14.7 V
Output voltage (VOUT) relative to GND .................................................................................... -0.3 V to +14.7 V
Power good (PG), Enable (EN), Overcurrent protection (OCP)/ Adjustment (ADJ),
Compensation (COMP), Reference input (REFIN), reference output (REFOUT) pins,
relative to ground (GND) ...................................................................................................... -0.3 V dc to +6.5 V dc
Power dissipation (PD) ............................................................................................................. 4.8 W
Maximum junction temperature (TJ) ......................................................................................... +175°C
Lead temperature (soldering, 10 seconds) ............................................................................... +300°C
Storage temperature range ....................................................................................................... -65°C to +150°C
Thermal resistance, junction-to-case bottom (θJC) ................................................................... 4.5°C/W 2/
Thermal resistance, junction-to-ambient (θJA) .......................................................................... 26°C/W 3/
1.4 Recommended operating conditions.
Input voltage (VIN) relative to GND ........................................................................................... 4.0 V to +13.2 V
Output voltage (VOUT) range .................................................................................................... 2.5 V to +12.7 V
PG, EN, OCP/ADJ pins, relative to GND .................................................................................. 0 V to +5.5 V
Junction temperature (TJ) ......................................................................................................... +150°C
Ambient operating temperature range (TA) .............................................................................. -55°C to +125°C
1.5 Radiation features.
Maximum total dose available (dose rate = 50 – 300 rads(Si)/s) .............................................. 100 krads(Si) 4/
Maximum total dose available (dose rate ≤ 0.01 rads(Si)/s) .................................................... 50 krads(Si) 4/
Single event phenomenon (SEP) features:
2
No Single event latchup (SEL) occurs at effective LET (see 4.4.4.2) ..................................... ≤ 86 MeV/mg/cm 5/
No Single event burnout (SEB) occur at effective LET (see 4.4.4.2) ...................................... ≤ 86 MeV/mg/cm
2
No Single event transient (SET) (within VOUT = ±35 mV) at effective LET (see 4.4.4.2) ....... ≤ 86 MeV/mg/cm
2
5/
5/ 6/
______
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ For θJC, the “case temperature” location is the center of the package underside.
3/ θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct
attach” features. Contact manufacturer for more information.
4/ Device type 01 radiation end point limits for the noted parameters are guaranteed only for the conditions as specified
in MIL-STD-883, method 1019, condition A to a maximum total dose of 100 krads(Si), and condition D to a maximum total
dose of 50 krads(Si).
5/ Limits are characterized at initial qualification and after any design or process changes which may affect the upset or
latchup characteristics but, not production tested unless specified by the customer through the purchase order or contract.
6/ Output SET tests performed using a parallel combination of a nominally 200 µF tantalum capacitor with ≤ 30 mΩ equivalent
series resistance (ESR) and a 0.1 µF CDR04 X7R capacitor on the input and also the output. VOUT = 3.5 V. Capacitor on
2
BYP using a 0.1 µF CDR04 X7R. The output SET performance measured within ±35 mV at LET = 86 MeV/cm /mg.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract.
ASTM INTERNATIONAL (ASTM)
ASTM F1192
-
Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of semiconductor Devices.
(Copies of these documents are available online at http://www.astm.org or from ASTM International, 100 Barr Harbor Drive,
P.O. Box C700, West Conshohocken, PA, 19428-2959).
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
4
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V.
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Block diagram. The block diagram shall be as specified on figure 3.
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the
full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance
submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the
manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall
be provided with each lot of microcircuits delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
5
TABLE IA. Electrical performance characteristics.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
Min
Max
-1.5
1.5
1
-2.0
2.0
1,2,3
-1.5
1.5
1
-2.0
2.0
-1.5
1.5
1
-2.0
2.0
1,2,3
-1.5
1.5
1
-2.0
2.0
DC characteristics.
DC output voltage accuracy
VOUT
VOUT resistor adjust to: 2.5 V and 5.0 V.
1,2,3
VOUT = 2.5 V,
01
%
4.0 V < VIN < 5.0 V,
0 A < ILOAD < 1.5 A
M,D,P,L,R
VOUT = 5.0 V,
5.5 V < VIN < 6.9 V,
0 A < ILOAD < 1.5 A
M,D,P,L,R
VOUT resistor adjust to: 10 V
1,2,3
VOUT = 10 V,
01
%
10.5 V < VIN < 13.2 V,
ILOAD = 0 A
M,D,P,L,R
VOUT = 10 V,
VIN = 10.5 V, ILOAD = 1.5 A,
VIN = 13.2 V, ILOAD = 1.0 A
M,D,P,L,R
VCCX pin
VVCCX
4.0 V < VIN < 13.2 V,
1,2,3
01
3.7
4.1
V
1,2,3
01
591
609
mV
588
612
588
612
ILOAD = 0 A
Adjustment (ADJ) pin
VADJ
M,D,P,L,R
Bypass (BYP) pin
VBYP
1
1,2,3
4.0 V < VIN < 13.2 V,
01
mV
ILOAD = 0 A
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
6
TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
Unit
Max
DC characteristics - continued.
DC input line regulation
1,2,3
4.0 V < VIN < 13.2 V,
01
8
mV
VOUT = 2.5 V
20
5.5 V < VIN < 13.2 V,
VOUT = 5.0 V
10
10.5 V < VIN < 13.2 V,
VOUT = 10.0 V
DC output load regulation
1,2,3
VOUT = 2.5 V, VIN = 4.0 V,
01
9
mV
0 A < ILOAD < 1.5 A
18
VOUT = 5.0 V, VIN = 5.5 V,
0 A < ILOAD < 1.5 A
36
VOUT = 10.0 V, VIN = 10.5 V,
0 A < ILOAD < 1.5 A
ADJ input current
Ground pin current
IQ
VADJ = 0.6 V
1,2,3
01
1
µA
VOUT = 2.5 V, ILOAD = 0 A,
1,2,3
01
10
mA
4.0 V < VIN < 13.2 V
12
VOUT = 2.5 V, ILOAD = 1.5 A,
4.0 V < VIN < 13.2 V
20
VOUT = 10.0 V, ILOAD = 0 A,
11.0 V < VIN < 13.2 V
25
VOUT = 10.0 V, ILOAD = 1.5 A,
11.0 V < VIN < 13.2 V
Ground pin current shutdown
ISHDNL
ENABLE pin = 0 V, VIN = 4.0 V
ISHDNH
ENABLE pin = 0 V, VIN = 13.2 V
1,2,3
01
120
µA
300
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
7
TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
Unit
Max
DC characteristics – continued.
Dropout voltage 3/
VDO
ILOAD = 0.5 A,
1
VOUT = 3.6 V and 12.7 V
2
160
3
130
1
160
ILOAD = 1.0 A,
1
270
VOUT = 3.6 V and 12.7 V
2
300
3
230
1
300
ILOAD = 1.5 A,
1
350
VOUT = 3.6 V and 12.7 V
2
400
3
300
1
400
M,D,P,L,R
M,D,P,L,R
M,D,P,L,R
Output short circuit
ISCL
1,2,3
VOUTSET = 4.0 V, 4/
01
01
145
0.16
0.32
1.6
3.2
mV
A
VOUT + 0.5 V < VIN < 13. 2 V,
RSET = 3 kΩ
ISCH
VOUTSET = 4.0 V, 4/
VOUT + 0.5 V < VIN < 13. 2 V,
RSET = 300 Ω
Thermal shutdown
temperature
5/
Thermal shutdown hysteresis 5/
TSD
VOUT + 0.5 V < VIN < 13. 2 V
4,5,6
01
154
196
°C
TSDn
VOUT + 0.5 V < VIN < 13. 2 V
4,5,6
01
10
25
°C
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
8
TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
Unit
Max
AC characteristics.
Input supply ripple rejection 5/
PSRR
1,2,3
VPP = 300 mV, f = 1 kHz,
01
55
dB
ILOAD = 1.5 A, VIN = 4.9 V,
VOUT = 4.0 V
60
VPP = 300 mV, f = 120 Hz,
ILOAD = 5 mA, VIN = 4.9 V,
VOUT = 2.5 V
40
VPP = 300 mV, f = 100 kHz,
ILOAD = 1.5 A, VIN = 4.9 V,
VOUT = 4.0 V
Phase margin 5/
PM
VOUT = 2.5 V, 4.0 V, and
4,5,6
01
50
Degrees
4,5,6
01
10
dB
0.5
10 V, COUT = 2 x 100 µF
Gain margin 5/
GM
VOUT = 2.5 V, 4.0 V, and
10 V, COUT = 2 x 100 µF
Device start up characteristics.
Enable pin characteristics.
Turn on threshold
4.0 V < VIN < 13.2 V
1,2,3
01
Enable pin leakage current
VIN = 13.2 V, EN = 5.5 V
1,2,3
Enable pin propagation delay
VIN = 4.5 V, VOUT = 4.0 V,
(EN step 1.2 V to VOUT =
ILOAD = 1.5 A, CBYP = 0.2 µF,
100 mV)
COUT = 22 µF
Enable pin turn on delay
(EN step 1.2 V to PGOOD)
VIN = 4.5 V, VOUT = 4.0 V,
1.2
V
01
1
µA
9,10,11
01
1
ms
9,10,11
01
3
ms
ILOAD = 1.5 A, CBYP = 0.2 µF,
COUT = 2 x 100 µF
2.5
VIN = 4.5 V, VOUT = 4.0 V,
ILOAD = 1.5 A, , COUT = 22 µF,
CBYP = 0.2 µF
Hysteresis (falling threshold)
1,2,3
4.0 V < VIN < 13.2 V
01
75
mV
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
9
TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
Min
Max
83
94
PG pin characteristics.
1,2,3
VOUT error flag rising threshold
01
%
VOUT
1,2,3
VOUT error flag falling threshold
01
80
91
%
VOUT
1,2,3
VOUT error flag hysteresis
01
1.75
%
VOUT
Error flag low voltage
1,2 3
ISINK = 1 mA
01
1/
mV
400
ISINK = 10 mA
Error flag leakage current
100
1,2,3
VIN = 13.2 V, PG = 5.5 V
01
µA
1
RHA device type 01 supplied to this drawing will meet all levels M, D, P, L, and R of irradiation for condition A and
levels M, D, P, and L for condition D. However, device type 01 is only tested at the “R” level in accordance with
MIL-STD-883, method 1019, condition A and tested at the “L” level in accordance with MIL-STD-883, method 1019,
condition D (see 1.5 herein).
Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation
electrical measurements for any RHA level, TA = +25°C.
2/
Unless otherwise specified, VIN = VOUT + 0.5 V, VOUT = 4.0 V, and CIN = COUT = 2 x 100 µF 60 mΩ.
3/
Dropout is defined by the difference in supply VIN and VOUT when the supply produces a 2 % drop in VOUT from its
nominal value.
4/
Minimum cap on VIN and VOUT required for stability.
5/
Limits established by characterization and are not production tested.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
10
TABLE IB. SEP test limits. 1/ 2/
Device
type
SEP
Temperature (TA)
VIN
Effective linear energy
transfer (LET)
01
No SEL 3/
+125°C
14.7 V
Effective LET
2
≤ 86 MeV/mg/cm
No SEB 3/
+125°C
14.7 V
Effective LET
2
≤ 86 MeV/mg/cm
No SET 3/
(within VOUT = ± 35 mV)
+25°C
4 V and 13.2 V
Effective LET
2
≤ 86 MeV/mg/cm
1/ For single event phenomena (SEP) test conditions, see 4.4.4.2 herein.
2/ Technology characterization and model verification supplemented by in-line data may be used in lieu of
end of line testing. Test plan must be approved by the technical review board and qualifying activity.
3/ Limits are characterized at initial qualification and after any design or process changes which may affect the
SEP characteristics but, not production tested unless specified by the customer through the purchase order or
contract.
4/ SET response of the part was tested under 3 sets of conditions:
1) VOUT = 3.5 V. VIN = 4.0 V, ILOAD = 0.1 A.
2) VOUT = 3.5 V. VIN = 4.0 V, ILOAD = 1.5 A.
3) VOUT = 3.5 V, VIN = 13.2 V, ILOAD = 0.1 A.
Output SET was within VOUT = ± 35 mV using a COUT of nominally 200 µF tantalum with ≤ 30 mΩ ESR.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
11
Case X
FIGURE 1. Case outline.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
12
Case outline X – continued.
Dimensions
Inches
Symbol
Millimeters
Min
Max
Min
Max
A
0.085
0.115
2.16
2.92
A1
0.026
0.045
0.66
1.14
b
0.015
0.022
0.38
0.56
c
0.004
0.009
0.10
0.23
D
---
0.420
---
11.07
e
0.050 BSC
1.27 BSC
E
0.262
0.278
6.65
7.06
E1
0.182
0.198
4.62
5.03
E2
0.03
---
0.76
---
L
0.250
0.370
6.35
9.40
S1
0.005
---
0.13
---
NOTES:
1. Controlling dimensions are inch, millimeter dimensions are given for reference only.
2. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located
within the shaded area shown.
3. If a pin one identification mark is used in addition to a tab, the limits of the tab dimension do not apply.
4. For bottom brazed lead packages, no organic or polymeric materials shall be molded to the bottom of the
package to cover the leads.
5. Measure dimension at all four corners.
6. Dimension shall be measured at the point of exit (beyond the meniscus) of the lead from the body.
Dimension minimum shall be reduced by 0.0015 inch (0.038 mm) maximum when solder dip lead finish is applied.
FIGURE 1. Case outline - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
13
Device type
01
Case outline
X
Terminal number
Terminal
symbol
1
VOUT
2
VOUT
3
VIN
4
VIN
5
VIN
6
NC
7
NC
8
OCP
9
VCCX
10
PG
11
TMODE
12
COMP
13
GND
14
EN
15
ADJ
16
BYP
Package lid
(internally connected to
pin 13)
GND
Bottom metal
NC
FIGURE 2. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
14
Terminal
symbol
Description
VIN
Input supply pins.
PG
regulation signal. A logic low defines when VOUT is not in
regulation. Must be grounded if not used.
Ground pin. Pin 13 is also connected to the metal lid of the
package. The metal surface on the bottom surface of the
package is floating and may be connected to the printed
wiring board (PWB) GND.
The 3.8 V internal bus is pinned out to accept a decoupling
capacitor. Connect a 0.1 µF ceramic capacitor from VCCX
pin to GND.
This Power good (PG) pin is logic high when VOUT is in
GND
VCCX
VOUT
Output voltage pins.
COMP
Add compensation capacitor and resistor between COMP
and GND, C = 1 nF normally and R = 40 kΩ normally.
ADJ
Adjustment pin allows VOUT to be programmed with an
external resistor divider.
NC
No connect.
BYP
Connect a 0.2 µF capacitor from Bypass (BYP) pin to GND,
to filter the internal VREF.
OCP
Over current protection (OCP) pin allows the current limit to
be programmed with an external resistor.
TMODE
EN
Package lid
Bottom lid
Must be connected to ground.
VIN independent chip enable.
Transistor to transistor logic (TTL) and complementary metal
oxide semiconductor (CMOS) compatible.
The top lid of the package is internally connected to pin 13,
GND.
Electrically isolated. The bottom of the package is a
solderable metal surface.
FIGURE 2. Terminal connections – Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
15
FIGURE 3. Block diagram.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
16
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection.
4.2.1 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein.
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
17
TABLE IIA. Electrical test requirements.
Test requirements
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
Device
class Q
class V
1,4,9
1,4,9
1,2,3,4,5,6, 1/
9,10,11
1,2,3,4,5,6,
9,10,11
1,2,3,4,5,6,
9,10,11
1,4,9
1,2,3,4,5,6 1/ 2/
9,10,11
1,2,3,4,5,6,
9,10,11
1,2,3,4,5,6, 2/
9,10,11
1,4,9
1,4,9
1,4,9
1/ PDA applies to subgroup 1.
2/ Delta limits as specified in table IIB shall be required where specified,
and the delta limits shall be completed with reference to the zero hour
electrical parameters (see table IA).
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. All device classes must meet the postirradiation end-point
electrical parameter limits as defined in table IA at TA = +25°C ±5°C, after exposure, to the subgroups specified in
table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019, condition A and as specified herein. In addition, a low dose rate test shall be performed in accordance with
MIL-STD-883 method 1019, condition D and as specified herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
18
TABLE IIB. Burn-in and life test delta parameters. TA = +25°C. 1/
Parameters
Symbol
Ground pin current shutdown
ISHDNH
ADJ pin
Ground pin current
Conditions
Min
Max
Units
ENABLE pin = 0 V, VIN = 13.2 V
-30
30
uA
VADJ
VIN = 4.0 V, VIN = 13.2 V
-2
2
mV
IQ
VOUT = 2.5 V, ILOAD = 0 A,
-2
2
-2.4
2.4
-4
4
-5
5
-29
29
-54
54
-70
70
mA
VIN = 13.2 V
VOUT = 2.5 V, ILOAD = 1.5 A,
VIN = 13.2 V
VOUT = 10.0 V, ILOAD = 0 A,
VIN = 13.2 V
VOUT = 10.0 V, ILOAD = 1.5 A,
VIN = 13.2 V
Dropout voltage
VDO
ILOAD = 0.5 A,
mV
VOUT = 3.6 V and 12.7 V
ILOAD = 1.0 A,
VOUT = 3.6 V and 12.7 V
ILOAD = 1.5 A,
VOUT = 3.6 V and 12.7 V
1/ Deltas are performed at room temperature.
4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on
class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP
testing. The recommended test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive
(i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related affects is allowed.
b.
The fluence shall be ≥ 100 errors or ≥ 10 ions/cm .
c.
The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be ≥ 20 micron in silicon.
e.
The test temperature shall be 25°C for SET. The test temperature shall be 125°C for SEB and SEL.
f.
Bias conditions for VIN shall be as listed in Table IB for the latchup measurements.
g.
For SEL, SEB, and SET test limits, see Table IB herein.
7
2
5
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
2
2
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
19
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and
this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-0540.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in
MIL-HDBK-103 and QML-38535. The vendors listed in MIL-HDBK-103 and QML-38535 have submitted a certificate of
compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing.
6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available from
the device manufacturer:
a. RHA upset levels.
b. Test conditions (SEP).
c. Occurrence of latchup (SEL).
d. Number of burnouts (SEB).
e. Number of transients (SET).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
20
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
A.1 SCOPE
A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using
chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of
military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number
(PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.
A.1.2 PIN. The PIN is as shown in the following example:
5962
R
Federal
stock class
designator
\
RHA
designator
(see A.1.2.1)
13220
01
V
9
A
Device
type
(see A.1.2.2)
Device
class
designator
(see A.1.2.3)
Die
code
Die
details
(see A.1.2.4)
/
\/
Drawing number
A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash
(-) indicates a non-RHA die.
A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
Generic number
Circuit function
ISL75052
1.5 amp, low dropout regulator
A.1.2.3 Device class designator.
Device class
Q or V
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
21
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding
pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product
and variant supplied to this appendix.
A.1.2.4.1 Die physical dimensions.
Die type
Figure number
01
A-1
A.1.2.4.2 Die bonding pad locations and electrical functions.
Die type
Figure number
01
A-1
A.1.2.4.3 Interface materials.
Die type
Figure number
01
A-1
A.1.2.4.4 Assembly related information.
Die type
Figure number
01
A-1
A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details.
A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
22
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
A.2 APPLICABLE DOCUMENTS.
A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARD
MIL-STD-883 - Test Method Standard Microcircuits.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
A.3 REQUIREMENTS
A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V.
A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1.
A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in A.1.2.4.2 and on figure A-1.
A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1.
A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1.
A.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.4 herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
23
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this
document.
A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing
sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA.
A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed
in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of
compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this appendix shall
affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the
requirements herein.
A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
A.4 VERIFICATION
A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM
plan shall not affect the form, fit, or function as described herein.
A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum, it shall consist of:
a.
Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007.
b.
100% wafer probe (see paragraph A.3.4 herein).
c.
100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the
alternate procedures allowed in MIL-STD-883, method 5004.
A.4.3 Conformance inspection.
A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4,
4.4.4.1, and 4.4.4.2 herein.
A.5 DIE CARRIER
A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
24
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
A.6 NOTES
A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and
logistics purposes.
A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime -VA, Columbus, Ohio,
43218-3990 or telephone (614)-692-0540.
A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and
Maritime -VA and have agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
25
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
FIGURE A-1. Die bonding pad locations and electrical functions.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
26
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-13220
Die bonding pad locations and electrical functions
Die physical dimensions.
Die size: 2819 µm x 5638 µm (111 mils x 222 mils).
Die thickness: 304.8 µm ± 25.4 µm (12.0 mils ± 1 mil).
Interface materials.
Top metallization: AlCu (99.5% / 0.5%).
Thickness: 2.7 µm ±0.4 µm.
Backside metallization: None.
Glassivation.
Type: Silicon oxide and silicon nitride.
Thickness: 0.3 µm ± 0.03 µm and 1.2 µm ± 0.12 µm.
Substrate: Silicon.
Process: 0.6 µM BiCMOS junction isolated.
Assembly related information.
Substrate potential: Ground.
Special assembly instructions: None.
FIGURE A-1. Die bonding pad locations and electrical functions - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-13220
A
REVISION LEVEL
A
SHEET
27
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 13-10-09
Approved sources of supply for SMD 5962-13220 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962R1322001VXC
34371
ISL75052SEHVFE
5962R1322001V9A
34371
ISL75052SEHVX
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
1001 Murphy Ranch Road
Milpitas, CA 95035-6803
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.