5 4 NOTE: MAKE ALL TSENSE TRACES SHIELDED AND DIFFERENTIAL PLACE CAPS AND GND CONNECTIONS CAPS NEAR LTC2974 TSENSE0P C1 0.1µF NT1 3 NET TIE C2 0.1µF NT2 TSENSE0M TSENSE1P NET TIE TSENSE2P C3 0.1µF NT3 TSENSE1M 2 TSENSE2M NET TIE C4 0.1µF NT4 1 REVISION HISTORY TSENSE3P ECO __ REV DESCRIPTION APPROVED DATE PRODUCTION KALIN L. 08-31-11 4 TSENSE3M NET TIE NOTES - UNLESS OTHERWISE SPECIFIED: D 1 - ALL CHIP CAPS AND CHIP RES ARE 0402 U1 LTC2974 VDD33 WDI/RESETB R3 10.0K R2 100 RESET C5 0.01µF VDD33 C 63 64 VSENSEP1 VSENSEM1 VSENSEP2 VSENSEM2 61 62 VSENSEP2 VSENSEM2 ISENSEP1 ISENSEM1 43 44 ISENSEP1 ISENSEM1 ISENSEP2 ISENSEM2 45 46 ISENSEP2 ISENSEM2 NC_60 NC_59 60 59 NC NC NC NC 56 55 NC_56 NC_55 VDAC1 54 VDAC1 VDAC2 57 VDAC2 TSENSE1P 16 TSENSE1 TSENSE2 27 TSENSE2P CONTROL2 22 VOUT_EN2 33 CONTROL1 CHANNEL 2 VDD33 TP1 VSENSEP1 VSENSEM1 CHANNEL 1 R1 10.0K SW4 D CONTROL1 VDD33 R4 10.0K CONTROL2 VDD33 ASEL0 ASEL1 HI VOUT_EN1 4 VOUT_EN1 VOUT_EN2 5 VSENSEP0 VSENSEM0 1 2 VSENSEP0 VSENSEM0 VSENSEP3 VSENSEM3 49 50 VSENSEP3 VSENSEM3 ISENSEP0 ISENSEM0 41 42 ISENSEP3 ISENSEM3 47 48 ISENSEP3 VDD33 ISENSEM3 VIN_SNS 9 8 NC NC 52 51 NC_52 NC_51 VDAC0 53 VDAC3 58 VDAC3 TSENSE0P 15 TSENSE3 34 TSENSE3P HI C 3 VOUT_EN0 VOUT_EN3 6 REFM 38 REFP 24 SHARE_CLK WDI/RESETB 18 SHARE_CLK 28 WP OFF 10 VPWR ON VIN WRITE-PROTECT R16 R14 10.0K A D7 BAT760 G1 Q1 S 2 D 3 C7 C8 0.1µF 0.1µF SI1303DL 4 R8 R9 R10 R11 R12 R13 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K SDA VOUT_EN3 TP4 35 36 SCL AUXFAULTB ALERTB 31 ALERTB PWRGD 17 PWRGD SCL SDA 30 29 SCL SDA FAULTB0 FAULTB1 25 26 FAULTB0 FAULTB1 CUSTOMER NOTICE C9 0.1µF APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. S. M. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. KALIN L. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 R7 10.0K VDD33 TP3 T1 49.9K JP2 CONTROL3 R17 150K V_DONGLE VDD33 JP1 B GND GND GND GND GND WDI/RESETB E-PAD LO 7 AUXFAULTB 12 11 R15 10.0K 40 ASEL0 ASEL1 LO 19 20 21 37 39 C6 0.1µF B CHANNEL 0 CONTROL3 E-PAD VDD33 JP3 CONTROL0 23 VOUT_EN0 SHARE_CLK TSENSE0 32 65 CONTROL0 VDAC0 VDD25(IN) VDD25(OUT) TP2 R6 10.0K VIN_SNS NC 14 13 VDD33 NOTE: THE NET PULLUP RESISTANCE ON SHARE_CLK LINE SHOULD BE BETWEEN 4.2K AND 5.5K ISENSEP0 ISENSEM0 VDD33 VDD33 R5 5.49K CHANNEL 3 FLOAT FLOAT 3 TECHNOLOGY TITLE: SCHEMATIC QUAD DIGITAL POWER SUPPLY MANAGER WITH EEPROM SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC2974CUP REV. 4 DEMO CIRCUIT 1809A Wednesday, August 31, 2011 SHEET 1 1 OF 3 A 5 4 3 2 1 ALL PARTS ON THIS PAGE ARE FOR DEMO ONLY, NOT NEEDED IN CUSTOMER DESIGN CONTROL0 PG_IN SW0 TP5 CNTRL0 JP4 SW0 1 SDA 2 GND 3 SCL 4 LGKPWR 5 ALERTB 6 GPI_1 7 OUTEN 8 GPI_2 9 R24 DNI GND 10 R25 DNI AUXSCL 11 R26 DNI AUXSDA 12 VDD33 R19 100k R32 4.99K U2 24LC025-I/ST R34 4.99K 1 A0 VCC 8 2 A1 WP 7 AUXSCL AUXSDA 3 A2 SCL 6 4 VSS SDA 5 R28 R29 DNI 0 R30 DNI R33 DNI CONTROL1 PGOOD0 SHARE_CLK WDI/RESETB CONTROL0 CONTROL1 CONTROL2 CONTROL3 2 SW1 BUS SIGNALS: VDD33 R23 100 DEBOUNCE C11 0.01µF GND 3 1 LGKPWR 2 VIN_SNS 3 GND 4 AUXFAULTB 5 SCL 6 ALERTB 7 SDA 8 CONTROL0 9 CONTROL2 10 CONTROL3 11 WDI/RESETB 12 CONTROL1 13 SPARE3 (PGOOD) 14 SHARE_CLK 15 FAULT4 16 FAULT2 17 FAULT3 18 FAULT1 19 SPARE 4 20 GND CNTRL1 JP5 CONTROL2 PG_1 SW2 R27 100k CNTRL2 JP6 CONTROL2 PGOOD1 SW2 VDD33 R35 100k R31 100 DEBOUNCE C13 0.01µF CONTROL3 PG_2 SW3 TP8 JP7 CONTROL3 VDD33 A TURRETS 5 APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. S. M. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. KALIN L. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 4 3 R36 100 DEBOUNCE C14 0.01µF GND3 1 CUSTOMER NOTICE D1 (GREEN) LTC2974 ON 2 TP9 TP10 TP11 SW3 R37 1k GROUND TEST POINTS 2 1HI 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 J3 B CNTRL3 PGOOD2 DEMO BOARD IDENTITY EEPROM C TP7 2 ALERTB R22 0 TP6 1 HI FAULTB0 PGOOD3 AUXFAULTB ALL SIZE 0402 CONTROL1 PG_0 SW1 R20 100k 1 HI R21 DNI FAULTB1 B R18 100 DEBOUNCE C10 0.01µF VDD33 DC1613 C12 0.1µF GND3 PGOOD_IN AUXP GND3 C USBTO I2C/SMBUS/PMBUS HEADER 12POS 2MM VERT GOLD J2 D 2 J1 LGKPWR 1 HI SCL SDA CONTROL0 2 4 6 8 10 12 14 16 18 20 D 1 3 5 7 9 11 13 15 17 19 BOARD-TO-BOARD CONNECTOR TO CASCADE MULTIPLE DEMO BOARDS TECHNOLOGY TITLE: SCHEMATIC QUAD DIGITAL POWER SUPPLY MANAGER WITH EEPROM SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC2974CUP REV. 4 DEMO CIRCUIT 1809A Wednesday, August 31, 2011 SHEET 2 1 OF 3 A 5 4 3 2 1 ALL PARTS ON THIS PAGE ARE FOR DEMO ONLY, NOT NEEDED IN CUSTOMER DESIGN +3.3V D D J4 NC_56 C19 1.0µF 0603 C20 0.1µF C21 0.1µF NC_55 C22 0.1µF BOARD TO BOARD CONNECTOR MATES WITH DC1810A 3 4 2Y 5 VCC 1 2 2 PWR GOOD 1 FAULTB1 1 FAULTB0 ALERTB D6 (GREEN) Q2 C 1 2 C16 0.01µF 2A C18 10µF 0805 TSENSE3M PGOOD3 BYP C17 0.1µF NC_52 D5 (RED) 3 VSENSEM3 ISENSEM3 NC_51 GND SHDN 5 4 2 6 2 GND 6 1Y GND R42 300 U5 1A 3 U4 SN74LVC2G07DCKR 7 1 SENSE/ADJ* GND R41 300 D4 (RED) 2 2 4 2Y 8 R40 300 D3 (RED) 3 IN 5 VSENSEM2 ISENSEM2 AUXSCL TSENSE2M PGOOD2 OUT VCC LT1763CS8-3.3 1 GND VIN D2 (RED) 2 U3 2A AUXFAULTB 1 VIN +3.3V LINEAR REGULATOR 6 1Y +3.3V VSENSEM1 ISENSEM1 NC_59 TSENSE1M PGOOD1 R39 300 1A TSENSE0M PGOOD0 R38 300 1 C15 0.1µF VSENSEM0 ISENSEM0 2 TSENSE3P VDAC3 VOUT_EN3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 SN74LVC2G07DCKR C VSENSEP2 ISENSEP2 AUXSDA TSENSE2P VDAC2 VOUT_EN2 VSENSEP3 ISENSEP3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 1 VIN VSENSEP0 ISENSEP0 VIN_SNS TSENSE0P VDAC0 VOUT_EN0 VSENSEP1 ISENSEP1 NC_60 TSENSE1P VDAC1 VOUT_EN1 AUXFAULTB TP12 ALERTB ALERTB PWRGD TP14 FAULTB0 FAULTB0 FAULTB1 DNI Q3A SI1988DH-T1-E3 LGKPWR 1 4 2 R44 100K Q3B SI1988DH-T1-E3 ISENSEP0 3 C32 1.0µF 0603 5 6 C27 1.0µF 0603 U6 R46 16.9K C33 0.1µF SCL V_DONGLE J5 1 2 3 4 HEADER FOR IN-SYSTEM PROGRAMMING ISENSEM0 C23 10n C28 10n 1 VIN GATE 8 C24 10n C29 10n ISENSEM1 ISENSEP2 C25 10n C30 10n ISENSEM2 ISENSEP3 C26 10n B C31 10n ISENSEM3 2 UV VOUT 7 3 OV FAULT 6 4 GND SHDN 5 INPUT FILTERS FOR CURRENT SENSING PLACE CLOSE TO LTC2974 LGKPWR R47 CUSTOMER NOTICE 100K OVERVOLTAGE PROTECTION LGKPWR = 3.0 to 3.6V APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. S. M. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. KALIN L. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. A THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 ISENSEP1 SDA LTC4365CTS8 R45 4.87K TP15 FAULTB1 R43 POWER FROM USB DONGLE B TP13 PWRGD 4 3 TECHNOLOGY TITLE: SCHEMATIC QUAD DIGITAL POWER SUPPLY MANAGER WITH EEPROM SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC2974CUP REV. 4 DEMO CIRCUIT 1809A Wednesday, August 31, 2011 SHEET 3 1 OF 3 A 5 4 3 2 1 REVISION HISTORY ECO 1 R5 C11 22nF VDAC1 R24 620 R26 68k R27 13.3k C31 1nF B C30 33pF R30 20k TRACKING R25 20k SOFT START CLK1 TRACK CH0 JP1 C33 22nF R31 13.3k C26 10uF 0805 R32 40.2k C27 10uF 0805 C28 10uF 0805 R23 10 2.2 PWM +5V 5 10M 330 1 2 3 VSENSEM0 TSENSE0P VSWH R2J20602NP 2 L2 4 1 C34 47uF 1210 GH GATE VOUT1 C32 100nF TP4 C35 GND 47uF 1210 CH1: 1.5V, 2A R35 1.0K C38 100nF C39 3.3nF C40 100nF APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. S. M. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. KALIN L. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. 3 TECHNOLOGY 2 VSENSEP1 B VSENSEM1 ISENSEM1 C41 3.3nF R39 1.0K ISENSEP1 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only TITLE: SCHEMATIC QUAD DIGITAL POWER SUPPLY MANAGER SIZE N/A SCALE = NONE TSENSE1M C36 100nF R33 100 R34 1.0K 4 TSENSE0M VOUT1 R29 100 4.7uH T2 4.7uF GND_SIGNAL C22 220nF TP3 1.5V GL THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 1 C 3 Q2 MMBT3906 Q3 MMBT3906 1.0µF CUSTOMER NOTICE 1 - ALL CHIP CAPS AND CHIP RES ARE 0603 C21 220nF TSENSE1P PG1 (GREEN) CH1 POWER GOOD NOTES - UNLESS OTHERWISE SPECIFIED: C18 100nF 100 R38 1.0K A VSENSEP0 C13 100nF R16 C37 DrMOS Driver/MOSFET PGOOD1 R37 TP2 GND 470nF R28 1.0K C29 DISABLE Q1B SI1988DH-T1-E3 VOUT0 2 C24 1.0µF U3 R36 C16 47uF 1210 R20 226 VOUT_EN1 +5V ISENSEM0 C25 Fsw=500kHz R22 20k C15 47uF 1210 CH0: 1.8V, 2A R21 9 10 11 12 13 14 15 16 LTC3860 R9 1.0K C14 D C9 3.3nF 100 470nF VIN ISENSEP0 C3 3.3nF R8 1.0K R18 226 R19 75K 08-31-11 3 C23 1nF RUN1 ILIM1 ISNS1P ISNS1N ISNS2N ISNS2P ILIM2 RUN2 GATE VOUT0 KALIN L. R10 DrMOS Driver/MOSFET BOOT 20k VCC FB1 COMP1 VSNSOUT VSNSN LTC3860EUH VSNSP COMP2 FB2 4.7uH 4.7uF REG5V 1nF R14 24 23 22 21 20 19 18 17 C19 R7 1.0K GH PGND C17 1 2 3 4 5 6 7 8 T1 U1 R13 75K VCIN C C20 33pF TRACK/SS1 VINSNS SGND SGND IAVG PGOOD1 PWMEN1 PWM1 R17 10k TRACK/SS2 FREQ CLKIN CLKOUT PHSMD PGOOD2 PWMEN2 PWM2 47k +5V TP1 1.8V L1 VSWH DATE R4 1.0K C8 100nF 1.0µF R2J20602NP 32 31 30 29 28 27 26 25 U2 R15 VDAC0 DISABLE C5 GL APPROVED PRODUCTION C2 100nF 10 PWM 4 R6 2.2 PGND C12 4.7uF R12 620 C7 10uF 0805 VLDRV +5V C10 R111nF 20k VIN C6 10uF 0805 REG5V C4 10uF 0805 V_MASTER VIN 2 PGOOD0 C1 1.0µF BOOT SI1988DH-T1-E3 PG0 (GREEN) VOUT_EN0 6 VIN 330 2 DESCRIPTION R3 1.0K VIN VLDRV 1 Q1A VCIN 10M CH0 POWER GOOD CGND D R2 CGND +5V R1 REV __ LTC3860 DUAL OUTPUT BUCK CONVERTER USING DrMOS DATE: IC NO. LTC2974CUP REV. 4 DEMO CIRCUIT 1810A Wednesday, August 31, 2011 SHEET 1 1 OF 3 A 5 4 3 2 1 LTM4620 DUAL OUTPUT MICRO-MODULE PGOOD3 C42 PGOOD2 4.7uF D U4 PHASEMD COMP1 RUN2 JP2 R55 20k TRACK CH0 TRACKING C60 10nF VOUT1S R48 VFB1 C52 100uF 1210 TP6 C54 GND 22uF 1206 DIFFOUT DIFFN DIFFP SGND ISENSEM2 R44 1.0k C53 330uF 7343 C51 100nF C55 100nF 100 R49 60.4k 100 R50 VOUT2S VFB2 R58 R54 1.0k C56 100nF C58 100nF C57 3.3nF C59 3.3nF TP7 1.0V ISENSEP3 ISENSEM3 R59 1.0k 1.0k R56 1M VSENSEM2 VDAC3 R53 TRACK CH0 CH2: 1.2V, 5A C 220k R52 91k VSENSEP2 VDAC2 180k R51 SOFT START TRACKING C61 10nF D VOUT2 1.0k R57 20k R61 30k R43 1.0k ISENSEP2 R47 JP3 SOFT START R60 20k TP5 1.2V GND C44 3.3nF C50 3.3nF VOUT2 COMP2 V_MASTER C48 10uF 1206 C43 100nF C49 100nF SW2 TRACK2 V_MASTER EXTVCC LTM4620 TRACK1 C C47 10uF 1206 VOUT1 RUN1 VOUT_EN3 C46 10uF 1206 R41 1.0k SW1 FSET 120k VOUT_EN2 C45 10uF 1206 VIN + Fsw=500kHz R46 INTVCC CLKOUT PGOOD2 TSENSE2M R45 0 TEMP PGOOD1 TSENSE2P MODE_PLLIN CLK2 R42 0 VIN R40 1.0k VOUT3 B C62 100uF 1210 +5V R64 5 SI1988DH-T1-E3 PGOOD3 CUSTOMER NOTICE GND_SIGNAL 4 APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. S. M. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. KALIN L. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 VSENSEM3 2 Q4B 4 1 A SI1988DH-T1-E3 2 PGOOD2 B CH3: 1.0V, 5A PG3 (GREEN) CH3 POWER GOOD R67 10M 2 6 Q4A R63 VSENSEP3 1 330 PG2 (GREEN) CH2 POWER GOOD R66 10M C65 22uF 1206 C64 100nF C66 100nF 100 R65 3 330 C63 330uF 7343 TP8 GND 100 1 +5V + R62 3 TECHNOLOGY TITLE: SCHEMATIC QUAD DIGITAL POWER SUPPLY MANAGER SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC2974CUP REV. 4 DEMO CIRCUIT 1810A Wednesday, August 31, 2011 SHEET 2 1 OF 3 A 2 EXTERNAL POWER INPUT VPWR J1 TSENSE3P VDAC3 VOUT_EN3 C VSENSEM0 ISENSEM0 8 7 R68 6 5 3 VIN1 VIN+ VIN VSENSEM2 ISENSEM2 AUXSCL TSENSE2M PGOOD2 R69 150k 1 + J2 2 TSENSE0M PGOOD0 VSENSEM1 ISENSEM1 IIN_SNSM TSENSE1M PGOOD1 1 VIN Q5B SI4946BEY-T1-E3 U5 PWR1 VIN = 9 to 15V R70 13.3K R71 5.49K GND TSENSE3M PGOOD3 C69 10uF 1206 C70 10uF 1206 LTC4365CTS8 J3 VSENSEM3 ISENSEM3 D 0.020 2512 C68 10uF 1206 C67 220uF 4 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 Barrel - Power VSENSEP2 ISENSEP2 AUXSDA TSENSE2P VDAC2 VOUT_EN2 VSENSEP3 ISENSEP3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 + VIN VSENSEP0 ISENSEP0 VIN_SNS TSENSE0P VDAC0 VOUT_EN0 VSENSEP1 ISENSEP1 IIN_SNSP TSENSE1P VDAC1 VOUT_EN1 - D Q5A SI4946BEY-T1-E3 1 IIN_SNSM 3 IIN_SNSP 4 VIN_SNS 5 1 1 VIN GATE 8 2 UV VOUT 7 3 OV FAULT 6 4 GND SHDN 5 VPWR R72 150k REVERSE AND OVERVOLTAGE PROTECTION GND1 C BOARD-TO-BOARD CONNECTOR MATES WITH DC1809A R73 10K +5V PRELOAD CH0 PRELOAD CH1 PRELOAD CH2 PRELOAD CH3 VOUT0 VOUT1 VOUT2 OPTIONAL CH2 TEMP SENSOR VOUT3 2 +5V B CLK2 4 5 OUT4 7 OUT2 OUT3 6 WP 7 3 A2 SCL 6 AUXSCL SDA 5 AUXSDA 4 VSS 3 3 3 TSENSE2M 3 R77 18.0 1210 DC1810 IDENTITY EEPROM MULTI-PHASE OSCILLATOR VIN A1 Off SW2 R78 15.0 1210 SW3 Off Off R79 12.0 1210 SW4 TSENSE3P Off 2 OUT1 2 1 2 8 8 1 GND VCC 2 PH SW1 A0 2 MOD R76 5.49K 1 Q6 DNI - MMBT3906 On TSENSE2P R80 10.0 1210 Q7 MMBT3906 1 C74 220nF TSENSE3M B 3 CLK1 3 DIV 9 C72 1.0µF On 1 C78 1nF 10 On 1 C73 1.0µF 2 SET V+ 24LC025-I/ST 1 1 On R75 5.49K 2 U7 3 U6 LTC6902CMS C71 220nF OUTPUT PRE-LOADS SECONDARY TEMPERATURE SENSORS +5V U8 LT1763CS8-5 A C76 1.0µF 8 IN OUT 1 7 GND SENSE/ADJ* 2 6 GND GND 3 5 SHDN BYP 4 5.0V LDO CUSTOMER NOTICE C75 10nF C77 10uF 0805 GND_SIGNAL THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 5 4 APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. S. M. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. KALIN L. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. 3 TECHNOLOGY TITLE: SCHEMATIC QUAD DIGITAL POWER SUPPLY MANAGER SIZE N/A SCALE = NONE 2 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only DATE: IC NO. LTC2974CUP REV. 4 DEMO CIRCUIT 1810A Wednesday, August 31, 2011 SHEET 3 1 OF 3 A