SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003 D Available in the Texas Instruments D D D D D D D D D D DBV OR DCK PACKAGE (TOP VIEW) NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs and Open-Drain Outputs Accept Voltages Up To 5.5 V Max tpd of 3.7 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) 1A GND 2A 1 6 2 5 3 4 1Y VCC 2Y YEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW) 2A GND 1A 3 4 2 5 1 6 2Y VCC 1Y description/ordering information This dual buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The output of the SN74LVC2G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA. ORDERING INFORMATION −40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA NanoStar − WCSP (DSBGA) 0.17-mm Small Bump − YEA SN74LVC2G07YEAR NanoFree − WCSP (DSBGA) 0.17-mm Small Bump − YZA (Pb-free) SN74LVC2G07YZAR NanoStar − WCSP (DSBGA) 0.23-mm Large Bump − YEP Reel of 3000 SOT (SC-70) − DCK _ _ _CV_ SN74LVC2G07YEPR NanoFree − WCSP (DSBGA) 0.23-mm Large Bump − YZP (Pb-free) SOT (SOT-23) − DBV TOP-SIDE MARKING‡ SN74LVC2G07YZPR Reel of 3000 SN74LVC2G07DBVR Reel of 3000 SN74LVC2G07DCKR Reel of 250 SN74LVC2G07DCKT C07_ CV_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments. Copyright 2003, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003 description/ordering information (continued) NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE (each buffer/driver) INPUT A OUTPUT Y H H L L logic diagram (positive logic) 1A 2A 1 6 3 4 1Y 2Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259°C/W YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 143°C/W YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 123°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003 recommended operating conditions (see Note 4) Operating VCC VIH Supply voltage Data retention only VIL Low-level input voltage VI VO Input voltage MAX 1.65 5.5 V 0.65 × VCC 1.7 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V V 2 0.7 × VCC 0.35 × VCC VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V ∆t/∆v V 0.8 0.3 × VCC Output voltage 0 5.5 V 0 5.5 V VCC = 1.65 V VCC = 2.3 V IOL UNIT 1.5 VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V High-level input voltage MIN 4 8 16 Low-level output current VCC = 3 V Input transition rise or fall rate mA 24 VCC = 4.5 V VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 32 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 10 20 ns/V 5 TA Operating free-air temperature −40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOL = 100 mA IOL = 4 mA 0.1 0.45 2.3 V 0.3 0.4 3V ICC ∆ICC IO = 0 Other inputs at VCC or GND 0.55 ±5 mA 0 ±10 mA 1.65 V to 5.5 V 10 mA 3 V to 5.5 V 500 mA Ci VI = VCC or GND † All typical values are at VCC = 3.3 V, TA = 25°C. POST OFFICE BOX 655303 V 0 to 5.5 V VI = 5.5 V or GND VI or VO = 5.5 V VI = 5.5 V or GND, One input at VCC − 0.6 V, UNIT 0.55 4.5 V IOL = 32 mA A inputs MAX 1.65 V IOL = 24 mA II Ioff TYP† 1.65 V to 5.5 V IOL = 8 mA IOL = 16 mA VOL MIN 3.3 V • DALLAS, TEXAS 75265 3.5 pF 3 SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 1.5 8.6 1 4.4 1 3.7 1 2.9 UNIT ns operating characteristics, TA = 25°C PARAMETER Cpd 4 Power dissipation capacitance TEST CONDITIONS VCC = 1.8 V TYP VCC = 2.5 V TYP f = 10 MHz 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 VCC = 3.3 V TYP 4 VCC = 5 V TYP 4 UNIT pF SCES308E − AUGUST 2001 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) From Output Under Test VLOAD Open S1 RL TEST GND CL (see Note A) S1 tPZL (see Notes E and F) RL tPLZ (see Notes E and G) VLOAD VLOAD tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VM tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns VCC VCC 3V VCC VCC/2 VCC/2 1.5 V VCC/2 VLOAD CL 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF RL V∆ 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI VM Input VM th VM Data Input VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input 0V tPHL VOH VM Output VM VO L tPLH tPHL VOH Output VM VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VI Output Control VM tPLH VI VM 0V Output tPZL Waveform 1 S1 at VLOAD (see Note B) Output Waveform 2 S1 at VLOAD (see Note B) VM tPLZ VM VLOAD/2 VOL + V∆ VOL tPHZ tPZH VM /2 VLOAD/2 − V VLOAD ∆ ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V∆. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 4-Oct-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC2G07DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DBVRE4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKRE4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKRG4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKTE4 ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07YEAR ACTIVE WCSP YEA 6 3000 TBD SNPB Level-1-260C-UNLIM SN74LVC2G07YEPR ACTIVE WCSP YEP 6 3000 TBD SNPB Level-1-260C-UNLIM SN74LVC2G07YZAR ACTIVE WCSP YZA 6 3000 Pb-Free (RoHS) SNAGCU Level-1-260C-UNLIM SN74LVC2G07YZPR ACTIVE WCSP YZP 6 3000 Pb-Free (RoHS) SNAGCU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDS114 – FEBRUARY 2002 DCK (R-PDSO-G6) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 6 0,10 M 4 1,40 1,10 1 0,13 NOM 2,40 1,80 3 Gage Plane 2,15 1,85 0,15 0°–8° 0,46 0,26 Seating Plane 1,10 0,80 0,10 0,00 0,10 4093553-3/D 01/02 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. 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