VS-VSKDS403/100 www.vishay.com Vishay Semiconductors ADD-A-PAK Generation VII Power Modules Schottky Rectifier, 200 A FEATURES • 175 °C TJ operation • Low forward voltage drop • High frequency operation • Low thermal resistance • UL approved file E78996 • Designed and qualified for industrial level • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 ADD-A-PAK BENEFITS • Excellent thermal performances obtained by the usage of exposed direct bonded copper substrate PRODUCT SUMMARY IF(AV) 200 A VR 100 V Package ADD-A-PAK Circuit Two diodes doubler circuit • High surge capability • Easy mounting on heatsink MECHANICAL DESCRIPTION The ADD-A-PAK generation VII, new generation of ADD-A-PAK module, combines the excellent thermal performances obtained by the usage of exposed direct bonded copper substrate, with advanced compact simple package solution and simplified internal structure with minimized number of interfaces. ELECTRICAL DESCRIPTION The VS-VSKDS403.. Schottky rectifier doubler module has been optimized for low reverse leakage at high temperature. The proprietary barrier technology allows for reliable operation up to 175 °C junction temperature. Typical applications are in high current switching power supplies, plating power supplies, UPS systems, converters, freewheeling diodes, welding, and reverse battery protection. MAJOR RATINGS AND CHARACTERISTICS SYMBOL IF(AV) CHARACTERISTICS Rectangular waveform VRRM IFSM tp = 5 μs sine VF 100 Apk, TJ = 125 °C TJ Range VALUES UNITS 200 A 100 V 20 000 A 0.66 V -55 to 175 °C VS-VSKDS403/100 UNITS 100 V VOLTAGE RATINGS PARAMETER Maximum DC reverse voltage Maximum working peak reverse voltage SYMBOL VR VRWM Revision: 14-Mar-14 Document Number: 94642 1 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS403/100 www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUES Maximum average forward current IF(AV) 50 % duty cycle at TC = 111 °C, rectangular waveform 200 Maximum peak one cycle non-repetitive surge current IFSM Non-repetitive avalanche energy EAS TJ = 25 °C, IAS = 5.5 A, L = 1 mH 15 mJ IAR Current decaying linearly to zero in 1 μs Frequency limited by TJ maximum VA = 1.5 x VR typical 1 A SYMBOL TEST CONDITIONS VALUES UNITS 5 µs sine or 3 µs rect. pulse 10 ms sine or 6 ms rect. pulse Repetitive avalanche current Following any rated load condition and with rated VRRM applied 20 000 UNITS A 2300 ELECTRICAL SPECIFICATIONS PARAMETER 200 A VFM Maximum forward voltage drop 400 A 200 A 400 A TJ = 25 °C TJ = 25 °C TJ = 125 °C VR = Rated VR Maximum reverse leakage current IRM Maximum junction capacitance CT VR = 5 VDC (test signal range 100 kHz to 1 MHz), 25 °C LS Measured lead to lead 5 mm from package body Typical series inductance TJ = 125 °C Maximum voltage rate of change dV/dt Rated VR Maximum RMS insulation voltage VINS 50 Hz 0.99 1.3 0.83 V 1.09 6 80 55 000 mA pF 5.0 nH 10 000 V/µs 3000 (1 min) 3600 (1 s) V VALUES UNITS -55 to 175 °C THERMAL - MECHANICAL SPECIFICATIONS PARAMETER SYMBOL Maximum junction and storage temperature range TJ, TStg Maximum thermal resistance, junction to case per leg RthJC Typical thermal resistance, case to heatsink per module RthCS TEST CONDITIONS DC operation °C/W 0.1 Approximate weight to heatsink Mounting torque ± 10 % busbar Case style 0.26 A mounting compound is recommended and the torque should be rechecked after a period of 3 h to allow for the spread of the compound. JEDEC® 75 g 2.7 oz. 4 Nm 3 TO-240AA compatible Revision: 14-Mar-14 Document Number: 94642 2 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS403/100 Vishay Semiconductors 1000 1000 IR - Reverse Current (mA) IF - Instantaneous Forward Current (A) www.vishay.com 100 TJ = 175 °C 10 TJ = 125 °C TJ = 25 °C 1 0.0 TJ = 175 °C 150 °C 100 125 °C 10 100 °C 1 75 °C 50 °C 0.1 25 °C 0.01 0.001 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 20 40 60 80 100 VFM - Forward Voltage Drop (V) VR - Reverse Voltage (V) Fig. 1 - Maximum Forward Voltage Drop Characteristics Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage CT - Junction Capacitance (pF) 10 000 TJ = 25 °C 1000 0 10 20 30 40 50 60 70 80 90 100 VR - Reverse Voltage (V) Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage ZthJC - Thermal Impedance (°C/W) 1 0.1 D = 0.75 D = 0.5 D = 0.33 D = 0.25 D = 0.2 0.01 0.001 1E-05 Single Pulse (Thermal Resistance) 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 1E+02 t1 - Rectangular Pulse Duration (s) Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics Revision: 14-Mar-14 Document Number: 94642 3 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS403/100 Vishay Semiconductors 300 200 Square wave (D = 0.50) 80 % rated VR applied Average Power Loss (W) Allowable Case Temperature (°C) www.vishay.com 150 DC 100 50 250 D = 0.75 D = 0.50 D = 0.33 D = 0.25 D = 0.20 200 150 RMS limit 100 DC 50 see note (1) 0 0 0 100 200 300 400 0 500 50 100 150 200 250 300 IF(AV) - Average Forward Current (A) Fig. 5 - Maximum Allowable Case Temperature vs. Average Forward Current Fig. 6 - Forward Power Loss Characteristics IFSM - Non-Repetitive Surge Current (A) IF(AV) - Average Forward Current (A) 100 000 At any rated load condition and with rated VRRM applied following surge 10 000 1000 10 100 1000 10 000 tp - Square Wave Pulse Duration (µs) Fig. 7 - Maximum Non-Repetitive Surge Current L D.U.T. IRFP460 Rg = 25 Ω Current monitor High-speed switch Freewheel diode + Vd = 25 V 40HFL40S02 Fig. 8 - Unclamped Inductive Test Circuit Note (1) Formula used: T = T - (Pd + Pd C J REV) x RthJC; Pd = Forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6); PdREV = Inverse power loss = VR1 x IR (1 - D); IR at VR1 = 80 % rated VR Revision: 14-Mar-14 Document Number: 94642 4 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS403/100 www.vishay.com Vishay Semiconductors ORDERING INFORMATION TABLE Device code VS-VS KD 1 2 S 40 3 3 4 5 / 100 6 1 - VS-VS = Vishay Semiconductors product 2 - Circuit configuration: KD = ADD-A-PAK - 2 diodes in series 3 - S = Schottky diode 4 - Average rating (x 10) 5 - Product silicon identification 6 - Voltage rating (100 = 100 V) CIRCUIT CONFIGURATION (1) ~ (2) + (3) - LINKS TO RELATED DOCUMENTS Dimensions www.vishay.com/doc?95369 Revision: 14-Mar-14 Document Number: 94642 5 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Outline Dimensions Vishay Semiconductors ADD-A-PAK Generation VII - Diode DIMENSIONS in millimeters (inches) 29 ± 0.5 (1 ± 0.020) 30 ± 0.5 (1.18 ± 0.020) 35 REF. 18 (0.7) REF. 24 ± 0.5 (1 ± 0.020) 6.7 ± 0.3 (0.26 ± 0.012) Viti M5 x 0.8 Screws M5 x 0.8 Document Number: 95369 Revision: 11-Nov-08 7 6 4 5 3 2 1 6.3 ± 0.2 (0.248 ± 0.008) 22.6 ± 0.2 (0.89 ± 0.008) 80 ± 0.3 (3.15 ± 0.012) 15 ± 0.5 (0.59 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 92 ± 0.75 (3.6 ± 0.030) For technical questions, contact: [email protected] www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000