VS-VSKDS409/150 Datasheet

VS-VSKDS409/150
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Vishay Semiconductors
ADD-A-PAK Generation VII
Power Modules Schottky Rectifier, 200 A
FEATURES
• 175 °C TJ operation
• Low forward voltage drop
• High frequency operation
• UL approved file E78996
• Low thermal resistance
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
ADD-A-PAK
BENEFITS
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
PRODUCT SUMMARY
• High surge capability
IF(AV)
200 A
VR
150 V
• Easy mounting on heatsink
Package
ADD-A-PAK
Circuit
Two diodes doubler circuit
MECHANICAL DESCRIPTION
The ADD-A-PAK generation VII, new generation of
ADD-A-PAK module, combines the excellent thermal
performances obtained by the usage of exposed direct
bonded copper substrate, with advanced compact simple
package solution and simplified internal structure with
minimized number of interfaces.
ELECTRICAL DESCRIPTION
The VS-VSKDS409/150 Schottky rectifier doubler module
has been optimized for low reverse leakage at high
temperature. The proprietary barrier technology allows for
reliable operation up to 175 °C junction temperature. 
Typical applications are in high current switching power
supplies, plating power supplies, UPS systems, converters,
freewheeling diodes, welding, and reverse battery
protection.


MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
IF(AV)
CHARACTERISTICS
Rectangular waveform
VRRM
IFSM
tp = 5 μs sine
VF
200 Apk, TJ = 125 °C
TJ
Range
VALUES
UNITS
200
A
150
V
20 000
A
0.85
V
-55 to 175
°C
VS-VSKDS409/150
UNITS
150
V
VOLTAGE RATINGS
PARAMETER
Maximum DC reverse voltage
Maximum static peak reverse voltage
SYMBOL
VR
VRRM
Revision: 19-Mar-14
Document Number: 94649
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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VS-VSKDS409/150
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Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
Maximum average forward current
IF(AV)
50 % duty cycle at TC = 105 °C, rectangular waveform
200
Maximum peak one cycle
non-repetitive surge current
IFSM
Non-repetitive avalanche energy
EAS
TJ = 25 °C, IAS = 1.8 A, L = 10 mH
15
mJ
Repetitive avalanche current
IAR
Current decaying linearly to zero in 1 μs
Frequency limited by TJ maximum VA = 1.5 x VR typical
1
A
Maximum dynamic peak reverse voltage
VAV
TJ = 25 °C, IAS = 1.8 A, L = 10 mH
170
V
VALUES
UNITS
5 μs sine or 3 μs rect. pulse
10 ms sine or 6 ms rect. pulse
Following any rated
load condition and with
rated VRRM applied
20 000
UNITS
A
2300
ELECTRICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
200 A
Maximum forward voltage drop
VFM
400 A
200 A
400 A
Maximum reverse leakage current
IRM
Maximum junction capacitance
CT
Typical series inductance
LS
Maximum voltage rate of change
dV/dt
Maximum RMS insulation voltage
VINS
TJ = 25 °C
TJ = 125 °C
TJ = 25 °C
TJ = 125 °C
VR = Rated VR
VR = 5 VDC (test signal range 100 kHz to 1 MHz), 25 °C
Measured lead to lead 5 mm from package body
Rated VR
50 Hz
1.03
1.33
0.85
V
1.13
6
85
6000
mA
pF
5.0
nH
10 000
V/μs
3000 (1 min)
3600 (1 s)
V
VALUES
UNITS
-55 to 175
°C
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Maximum junction and storage 
temperature range
TEST CONDITIONS
TJ, TStg
Maximum thermal resistance, 
junction to case per leg
RthJC
Typical thermal resistance, 
case to heatsink per module
RthCS
DC operation
°C/W
0.1
Approximate weight
to heatsink
Mounting torque ± 10 %
busbar
Case style
0.32
A mounting compound is recommended and the torque
should be rechecked after a period of 3 h to allow for the
spread of the compound.
JEDEC®
75
g
2.7
oz.
4
Nm
3
TO-240AA compatible
Revision: 19-Mar-14
Document Number: 94649
2
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKDS409/150
Vishay Semiconductors
1000
1000
IR - Reverse Current (mA)
IF - Instantaneous Forward Current (A)
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100
TJ = 175 °C
TJ = 125 °C
TJ = 25 °C
10
1
0.0
100
TJ = 150 °C
10
TJ = 125 °C
TJ = 100 °C
1
TJ = 75 °C
0.1
TJ = 50 °C
0.01
TJ = 25 °C
0.001
0.5
1.0
1.5
2.0
0
VFM - Forward Voltage Drop (V)
94649_01
TJ = 175 °C
25
75
100
125
150
VR - Reverse Voltage (V)
94649_02
Fig. 1 - Maximum Forward Voltage Drop Characteristics (Per Leg)
50
Fig. 2 - Typical Values of Reverse Current vs.
Reverse Voltage
CT - Junction Capacitance (pF)
10 000
TJ = 25 °C
1000
100
0
94649_03
20
40
60
80
100
120
VR - Reverse Voltage (V)
ZthJC - Thermal Impedance (°C/W)
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
1
0.1
0.01
0.001
0.0001
94649_04
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
Single pulse
(thermal resistance)
0.001
0.01
0.1
1
10
t1 - Rectangular Pulse Duration (s)
Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics (Per Diode)
Revision: 19-Mar-14
Document Number: 94649
3
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKDS409/150
Vishay Semiconductors
180
300
160
140
DC
120
100
80
60
Square wave (D = 0.50)
80 % rated VR applied
40
20
250
Average Power Loss (W)
Allowable Case Temperature (°C)
www.vishay.com
150
RMS limit
100
DC
50
See note (1)
0
0
0
94649_05
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
200
100
200
300
400
0
500
IF(AV) - Average Forward Current (A)
94649_06
IFSM - Non-Repetitive Surge Current (A)
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current (Per Leg)
50
100
150
200
250
300
IF(AV) - Average Forward Current (A)
Fig. 6 - Forward Power Loss Characteristics (Per Leg)
100 000
At any rated load condition
and with rated VRRM applied
following surge
10 000
1000
94649_07
10
100
1000
10 000
tp - Square Wave Pulse Duration (µs)
Fig. 7 - Maximum Non-Repetitive Surge Current
L
D.U.T.
IRFP460
Rg = 25 Ω
Current
monitor
High-speed
switch
Freewheel
diode
+ Vd = 25 V
40HFL40S02
Fig. 8 - Unclamped Inductive Test Circuit
Note
(1) Formula used: T = T - (Pd + Pd
C
J
REV) x RthJC;
Pd = Forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6);
PdREV = Inverse power loss = VR1 x IR (1 - D); IR at VR1 = 80 % rated VR
Revision: 19-Mar-14
Document Number: 94649
4
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKDS409/150
www.vishay.com
Vishay Semiconductors
ORDERING INFORMATION TABLE
Device code
VS-VS KD
1
2
S
40
9
3
4
5
/
150
6
1
-
Vishay Semiconductors product
2
-
Circuit configuration:
KD = ADD-A-PAK - 2 diodes in series
3
-
S = Schottky diode
4
-
Average current rating (40 = 400 A) (1)
5
-
Product silicon identification
6
-
Voltage rating (150 = 150 V)
Note
(1) For KD configuration average current rating per module is 200 A
CIRCUIT CONFIGURATION
(1)
~
(2)
+
(3)
-
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95369
Revision: 19-Mar-14
Document Number: 94649
5
For technical questions within your region: [email protected], [email protected], [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
Vishay Semiconductors
ADD-A-PAK Generation VII - Diode
DIMENSIONS in millimeters (inches)
29 ± 0.5
(1 ± 0.020)
30 ± 0.5
(1.18 ± 0.020)
35 REF.
18 (0.7) REF.
24 ± 0.5
(1 ± 0.020)
6.7 ± 0.3 (0.26 ± 0.012)
Viti M5 x 0.8
Screws M5 x 0.8
Document Number: 95369
Revision: 11-Nov-08
7 6
4 5
3
2
1
6.3 ± 0.2 (0.248 ± 0.008)
22.6 ± 0.2
(0.89 ± 0.008)
80 ± 0.3 (3.15 ± 0.012)
15 ± 0.5 (0.59 ± 0.020)
20 ± 0.5 (0.79 ± 0.020)
20 ± 0.5 (0.79 ± 0.020)
92 ± 0.75 (3.6 ± 0.030)
For technical questions, contact: [email protected]
www.vishay.com
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Revision: 02-Oct-12
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Document Number: 91000