SO T2 23 PBSS5240Z 40 V, 2 A PNP low VCEsat (BISS) transistor 15 October 2014 Product data sheet 1. General description PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium power SOT223 (SC-73) Surface-Mounted Device (SMD) plastic package. NPN complement: PBSS4240Z 2. Features and benefits • • • • Low collector-emitter saturation voltage VCEsat High collector current capability IC and ICM High energy efficiency due to less heat generation AEC-Q101 qualified 3. Applications • • • • • • DC-to-DC conversion Supply line switching Battery charger LCD backlighting Driver in low supply voltage applications (e.g. lamps and LEDs) Inductive load driver (e.g. relays, buzzers and motors) 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - -40 V IC collector current - - -2 A ICM peak collector current tp ≤ 1 ms; single pulse - - -3 A RCEsat collector-emitter saturation resistance IC = -1 A; IB = -100 mA; pulsed; - - 320 mΩ tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C Scan or click this QR code to view the latest information for this product PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 B base 2 C collector 3 E emitter 4 C collector Simplified outline Graphic symbol 2, 4 4 1 1 2 3 SC-73 (SOT223) 3 sym028 6. Ordering information Table 3. Ordering information Type number PBSS5240Z Package Name Description Version SC-73 plastic surface-mounted package with increased heatsink; 4 leads SOT223 7. Marking Table 4. Marking codes Type number Marking code PBSS5240Z S5240Z PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 2 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - -40 V VCEO collector-emitter voltage open base - -40 V VEBO emitter-base voltage open collector - -7 V IC collector current - -2 A ICM peak collector current - -3 A IB base current - -300 mA IBM peak base current tp ≤ 1 ms; single pulse - -1 A Ptot total power dissipation Tamb ≤ 25 °C [1] - 0.65 W [2] - 1 W [3] - 1.35 W tp ≤ 1 ms; single pulse Tj junction temperature - 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C [1] [2] [3] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm . 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm . 006aac674 1.5 (1) Ptot (W) (2) 1.0 (3) 0.5 0.0 -75 Fig. 1. -25 25 (1) FR4 PCB, mounting pad for collector 6 cm 2 (2) FR4 PCB, mounting pad for collector 1 cm (3) FR4 PCB, standard footprint 2 75 125 175 Tamb (°C) Power derating curves PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 3 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Rth(j-sp) Min Typ Max Unit [1] - - 192 K/W [2] - - 125 K/W [3] - - 93 K/W - - 16 K/W thermal resistance from junction to solder point [1] [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm . 2 aaa-013276 103 Zth(j-a) (K/W) 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm . duty cycle = 1 102 0.75 0.33 0.50 0.20 0.10 0.05 10 0.02 0 1 10-5 0.01 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, single-sided copper, tin-plated and standard footprint. Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 4 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor aaa-013277 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.50 0.75 0.33 0.20 0.10 10 0.05 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 2 FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm . Fig. 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values aaa-013278 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.50 0.33 0.20 0.10 10 0.05 0.02 0.01 1 10-5 0 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 2 FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm . Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 5 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current VCB = -32 V; IE = 0 A; Tamb = 25 °C - - -100 nA VCB = -32 V; IE = 0 A; Tj = 150 °C - - -50 µA ICES collector-emitter cut-off VCE = -32 V; VBE = 0 V; Tamb = 25 °C current - - -100 nA IEBO emitter-base cut-off current VEB = -5 V; IC = 0 A; Tamb = 25 °C - - -100 nA hFE DC current gain VCE = -5 V; IC = -1 mA; Tamb = 25 °C 300 - - VCE = -5 V; IC = -500 mA; tp ≤ 300 µs; 215 - - 145 - - 55 - - IC = -100 mA; IB = -1 mA; Tamb = 25 °C - - -140 mV IC = -500 A; IB = -50 mA; tp ≤ 300 µs; - - -170 mV - - -320 mV - - -650 mV - - 320 mΩ δ ≤ 0.02; Tamb = 25 °C VCE = -5 V; IC = -1 A; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VCE = -5 V; IC = -2 A; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C; pulsed VCEsat collector-emitter saturation voltage δ ≤ 0.02; Tamb = 25 °C IC = -1 A; IB = -100 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C IC = -2 A; IB = -200 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C RCEsat collector-emitter saturation resistance IC = -1 A; IB = -100 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C VBEsat base-emitter saturation IC = -1 A; IB = -100 mA; pulsed; voltage tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C - - -1.2 V VBEon base-emitter turn-on voltage VCE = -5 V; IC = -1 A; pulsed; - - -1.1 V transition frequency VCE = -10 V; IC = -50 mA; f = 100 MHz; 150 - - MHz - - 12 pF fT tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C Tamb = 25 °C Cc collector capacitance VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 6 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 006aaa794 800 hFE IB (mA) = - 24 - 21.6 - 19.2 - 16.8 - 14.4 - 12 IC (A) (1) 600 006aaa799 - 2.4 - 1.6 - 9.6 (2) - 7.2 400 - 4.8 - 0.8 (3) - 2.4 200 0 -1 - 102 - 10 - 103 IC (mA) 0 - 104 VCE = -5 V -1 -2 -3 -4 VCE (V) -5 Tamb = 25 °C (1) Tamb = 100 °C Fig. 6. (2) Tamb = 25 °C (3) Tamb = −55 °C Fig. 5. 0 Collector current as a function of collectoremitter voltage; typical values DC current gain as a function of collector current; typical values 006aaa795 - 1.0 006aaa798 - 1.2 VBEsat (V) VBE (V) - 0.8 (1) - 1.0 (2) - 0.8 (1) (2) - 0.6 - 0.6 (3) - 0.4 - 0.2 - 10- 1 Fig. 7. (3) - 0.4 -1 - 10 - 102 - 0.2 - 10- 1 - 103 - 104 IC (mA) -1 - 10 VCE = -5 V IC/IB = 20 (1) Tamb = −55 °C (1) Tamb = -55 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 150 °C Base-emitter voltage as a function of collector current; typical values PBSS5240Z Product data sheet Fig. 8. - 103 - 104 IC (mA) Base-emitter saturation voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. 15 October 2014 - 102 © NXP Semiconductors N.V. 2014. All rights reserved 7 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 006aaa796 -1 aaa-013279 103 RCEsat (V) VCEsat (V) 102 (1) (2) (3) - 10- 1 (1) 10 (2) (3) 1 - 10- 2 - 10- 1 Fig. 9. -1 - 10 - 102 10-1 -10-1 - 103 - 104 IC (mA) -1 -10 IC/IB = 20 IC/IB = 20 (1) Tamb = 100 °C (1) Tamb = 150 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = −55 °C (3) Tamb = −55 °C Collector-emitter saturation voltage as a function of collector current; typical values -102 -103 -104 IC (mA) Fig. 10. Collector-emitter saturation resistance as a function of collector current; typical values 11. Test information 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 8 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 12. Package outline Plastic surface-mounted package with increased heatsink; 4 leads D SOT223 E B A X c y HE v M A b1 4 Q A A1 1 2 e1 3 Lp bp w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y mm 1.8 1.5 0.10 0.01 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 4.6 2.3 7.3 6.7 1.1 0.7 0.95 0.85 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT223 JEITA SC-73 EUROPEAN PROJECTION ISSUE DATE 04-11-10 06-03-16 Fig. 11. Package outline SC-73 (SOT223) PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 9 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 13. Soldering 7 3.85 3.6 3.5 0.3 1.3 1.2 (4×) (4×) solder lands 4 solder resist 3.9 6.1 7.65 solder paste occupied area 1 2 3 Dimensions in mm 2.3 2.3 1.2 (3×) 1.3 (3×) 6.15 sot223_fr Fig. 12. Reflow soldering footprint for SC-73 (SOT223) 8.9 6.7 1.9 solder lands 4 solder resist 6.2 1 2 8.7 Dimensions in mm 3 1.9 (3×) 2.7 occupied area preferred transport direction during soldering 2.7 1.1 1.9 (2×) sot223_fw Fig. 13. Wave soldering footprint for SC-73 (SOT223) PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 10 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PBSS5240Z v.1 20141015 Product data sheet - - PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 11 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 15. 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Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 12 / 14 PBSS5240Z NXP Semiconductors 40 V, 2 A PNP low VCEsat (BISS) transistor No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................3 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 6 11 11.1 Test information ..................................................... 8 Quality information ............................................... 8 12 Package outline ..................................................... 9 13 Soldering .............................................................. 10 14 Revision history ................................................... 11 15 15.1 15.2 15.3 15.4 Legal information .................................................12 Data sheet status ............................................... 12 Definitions ...........................................................12 Disclaimers .........................................................12 Trademarks ........................................................ 13 © NXP Semiconductors N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 15 October 2014 PBSS5240Z Product data sheet All information provided in this document is subject to legal disclaimers. 15 October 2014 © NXP Semiconductors N.V. 2014. All rights reserved 14 / 14