DATASHEET

EL8200, EL8201, EL8401
Data Sheet
August 11, 2015
200MHz Rail-to-Rail Amplifiers
Features
The EL8200, EL8201, and EL8401 represent rail-to-rail
amplifiers with a -3dB bandwidth of 200MHz and slew rate of
200V/µs. Running off a very low supply current of 2mA per
channel, the EL8200, EL8201, and EL8401 also feature
inputs that go to 0.15V below the VS- rail. The EL8200 and
EL8201 are dual channel amplifiers. The EL8401 is a quad
channel amplifier.
• 200MHz -3dB bandwidth
The EL8200 includes a fast-acting disable/power-down
circuit. With a 25ns disable and a 200ns enable, the EL8200
is ideal for multiplexing applications.
• Input to 0.15V below VS-
The EL8200, EL8201, and EL8401 are designed for a
number of general purpose video, communication,
instrumentation, and industrial applications. The EL8200 is
available in a 10 Ld MSOP package, the EL8201 in an 8 Ld
SO package, and the EL8401 in a 14 Ld SO and 16 Ld
QSOP packages. All are specified for operation over the 40°C to +85°C temperature range.
FN7105.5
• 200V/µs slew rate
• Low supply current = 2mA per channel
• Supplies from 3V to 5.5V
• Rail-to-rail output
• Fast 25ns disable (EL8200 only)
• Low cost
• Pb-free available (RoHS compliant)
Applications
• Video amplifiers
• Portable/hand-held products
• Communications devices
Pinouts
EL8200
(10 LD MSOP)
TOP VIEW
EL8201
(8 LD SO)
TOP VIEW
OUTA 1
INA- 2
+
INA+ 3
+
VS- 4
8 VS+
INA+ 1
7 OUTB
CEA 2
6 INB-
VS- 3
5 INB+
CEB 4
10 INA+
8 VS+
+
-
INB+ 5
INA- 2
14 OUTD
A
- +
D
+ -
INA+ 3
VS+ 4
INB- 6
- +
B
+ C
OUTB 7
INA- 2
12 IND+
INA+ 3
16 OUTD
- +
+ -
INB+ 5
9 INC-
INB- 6
OUTB 7
NC 8
15 IND14 IND+
VS+ 4
10 INC+
8 OUTC
1
6 INB-
OUTA 1
13 IND-
11 VS-
INB+ 5
7 OUTB
EL8401
(16 LD QSOP)
TOP VIEW
EL8401
(14 LD SO)
TOP VIEW
OUTA 1
9 OUTA
13 VS12 INC+
- +
+ -
11 INC10 OUTC
9 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas LLC. 2004, 2006, 2007, 2015. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL8200, EL8201, EL8401
Ordering Information
PART NUMBER
(See Note)
PART
MARKING
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
EL8200IYZ
(No longer available, recommended
replacement: EL8201ISZ)
BAMAA
10 Ld MSOP
MDP0043
EL8200IYZ-T7*
(No longer available, recommended
replacement: EL8201ISZ-T7)
BAMAA
10 Ld MSOP
MDP0043
EL8200IYZ-T13*
(No longer available, recommended
replacement: EL8201ISZ-T13)
BAMAA
10 Ld MSOP
MDP0043
EL8201ISZ
8201ISZ
8 Ld SO
MDP0027
EL8201ISZ-T7*
8201ISZ
8 Ld SO
MDP0027
EL8201ISZ-T13*
8201ISZ
8 Ld SO
MDP0027
EL8401ISZ
(No longer available or supported)
8401ISZ
14 Ld SO
MDP0027
EL8401ISZ-T7*
(No longer available or supported)
8401ISZ
14 Ld SO
MDP0027
EL8401ISZ-T13*
(No longer available or supported)
8401ISZ
14 Ld SO
MDP0027
EL8401IUZ
(No longer available or supported)
8401IUZ
16 Ld QSOP
MDP0040
EL8401IUZ-T7*
(No longer available or supported)
8401IUZ
16 Ld QSOP
MDP0040
EL8401IUZ-T13*
(No longer available or supported)
8401IUZ
16 Ld QSOP
MDP0040
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
2
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Absolute Maximum Ratings (TA = 25°C)
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to VS- -0.3V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = 5V, VS- = GND, TA = 25°C, VCM = 2.5V, RL to 2.5V, AV = 1, Unless Otherwise Specified
DESCRIPTION
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
-6
-0.8
+6
mV
INPUT CHARACTERISTICS
VOS
Offset Voltage
TCVOS
Offset Voltage Temperature Coefficient Measured from TMIN to TMAX
IB
Input Bias Current
VIN = 0V
IOS
Input Offset Current
VIN = 0V
TCIOS
Input Bias Current Temperature
Coefficient
Measured from TMIN to TMAX
CMRR
Common Mode Rejection Ratio
VCM = -0.15V to +3.5V (EL8200,EL8201)
VCM = -0.15V to +3.5V (EL8401)
CMIR
Common Mode Input Range
RIN
Input Resistance
CIN
Input Capacitance
AVOL
Open Loop Gain
-2.5
3
µV/°C
-1.6
µA
0.2
0.55
µA
2
nA/°C
70
90
dB
65
90
dB
VS- -0.15
Common Mode
VS+ -1.5
V
16
M
0.5
pF
90
dB
VOUT = +1.5V to +3.5V, RL = 150 to GND
80
dB
30
m
VOUT = +1.5V to +3.5V, RL = 1k to GND
75
OUTPUT CHARACTERISTICS
ROUT
Output Resistance
AV = +1
VOP
Positive Output Voltage Swing
RL = 1k
4.85
4.9
V
RL = 150
4.6
4.7
V
VON
Negative Output Voltage Swing
RL = 150
100
150
mV
RL = 1k
35
50
mV
IOUT
Linear Output Current
65
mA
ISC (source)
Short Circuit Current
RL = 10
60
70
mA
ISC (sink)
Short Circuit Current
RL = 10
100
130
mA
VS+ = 4.5V to 5.5V
70
100
dB
POWER SUPPLY
PSRR
Power Supply Rejection Ratio
IS-ON
Supply Current
2
2.4
mA
IS-OFF
Supply Current - Disabled per Amplifier EL8200 only
40
90
µA
ENABLE (EL8200 ONLY)
tEN
Enable Time
200
ns
tDS
Disable Time
25
ns
VIH-ENB
ENABLE Pin Voltage for Power-up
0.8
V
3
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Electrical Specifications
PARAMETER
VS+ = 5V, VS- = GND, TA = 25°C, VCM = 2.5V, RL to 2.5V, AV = 1, Unless Otherwise Specified (Continued)
DESCRIPTION
MIN
(Note 1)
CONDITIONS
VIL-ENB
ENABLE Pin Voltage for Shut-down
IIH-ENB
IIL-ENB
TYP
MAX
(Note 1)
UNIT
2
V
ENABLE Pin Input Current High
8.6
µA
ENABLE Pin Input for Current Low
0.01
µA
AV = +1, RF = 0, CL = 1.5pF
200
MHz
AV = -1, RF = 1k, CL = 1.5pF
90
MHz
AV = +2, RF = 1k, CL = 1.5pF
90
MHz
AV = +10, RF = 1k, CL = 1.5pF
10
MHz
AC PERFORMANCE
BW
-3dB Bandwidth
BW
±0.1dB Bandwidth
AV = +1, RF = 0, CL = 1.5pF
20
MHz
Peak
Peaking
AV = +1, RF = 1k, CL = 1.5pF
1
dB
GBWP
Gain Bandwidth Product
100
MHz
PM
Phase Margin
RL = 1k, CL = 1.5pF
55
°
SR
Slew Rate
AV = 2, RL = 100, VOUT = 0.5V to 4.5V
200
V/µs
tR
Rise Time
2.5VSTEP, 20% - 80%
8
ns
tF
Fall Time
2.5VSTEP, 20% - 80%
7
ns
OS
Overshoot
200mV step
10
%
tPD
Propagation Delay
200mV step
2
ns
tS
0.1% Settling Time
200mV step
20
ns
dG
Differential Gain
AV = +2, RF = 1k, RL = 150
0.035
%
dP
Differential Phase
AV = +2, RF = 1k, RL = 150
0.05
°
eN
Input Noise Voltage
f = 10kHz
10
nV/Hz
iN+
Positive Input Noise Current
f = 10kHz
1
pA/Hz
iN-
Negative Input Noise Current
f = 10kHz
0.8
pA/Hz
eS
Channel Separation
f = 100kHz
95
dB
160
NOTE:
1. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Pin Descriptions
EL8200
(10 Ld SO)
EL8201
(8 Ld SO)
EL8401
(14 Ld SO)
EL8401
(16 Ld QSOP)
NAME
1, 5
3, 5
3, 5, 10, 12
3, 5, 12, 14
IN+
Non-inverting input for each channel
CE
Enable and disable input for each channel
2, 4
FUNCTION
3
4
11
13
VS-
Negative power supply
6, 10
2, 6
2, 6, 9, 13
2, 6, 11, 15
IN-
Inverting input for each channel
7, 9
1, 7
1, 7, 8, 14
1, 7, 10, 16
OUT
Amplifier output for each channel
8
8
4
4
VS+
Positive power supply
4
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Typical Performance Curves
GAIN (dB)
2
4
VS=5V
AV=1
RL=1k
CL=1.5pF
2
VOP-P=200mV
GAIN (dB)
4
0
VOP-P=1V
-2
-6
100K
1M
10M
RL=330
0
RL=1k
-2
RL=100
VOP-P=2V
-4
VS=5V
AV=1
CL=1.5pF
-4
100M
-6
100K
1G
1M
10M
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGE LEVELS
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS RLOAD
4
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
2
AV=1
AV=2
0
-2
AV=5
-4
AV=10
-6
100K
1M
10M
100M
2
VS=5V
RL=1k
CL=1.5pF
RF=1k
0
AV=-2
-2
AV=-10
-4
-6
100K
1G
AV=-5
1M
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS NON-INVERTING GAINS
100M
1G
FIGURE 4. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS INVERTING GAINS
14
5
3
CL=10pF
12
CL=7pF
10
CL=5pF
1
CL=1.5pF
-1
1M
6
-4
100M
1G
FREQUENCY (Hz)
FIGURE 5. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS CL
5
CL=15pF
2
-2
10M
CL=35pF
4
0
VS=5V
AV=1
RL=1k
VOP-P=200mV
-5
100K
CL=56pF
8
GAIN (dB)
GAIN (dB)
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
-3
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
VS=5V
RL=1k
CL=1.5pF
100M
VS=5V
AV=2
RL=1k
RF=RG=1k
-6
100K
1M
CL=1.5pF
10M
100M
1G
FREQUENCY (Hz)
FIGURE 6. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS CL
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Typical Performance Curves (Continued)
110
10
70
8
RF=RG=500
VS=5V
AV=2
RL=1k
CL=1.5pF
0
100K
30
225
RL=150
-10
RL=1k
-50
1M
10M
100M
1G
135
-90
1K
10K
45
100K
FIGURE 7. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS RF AND RG
230
-30
190
BANDWIDTH (MHz)
CMRR (dB)
210
-50
-70
-90
170
150
130
110
90
RL=1k
CL=1.5pF
10M
50
100M
3
3.5
AV=2
4.5
4
5
5.5
VS (V)
FREQUENCY (Hz)
FIGURE 9. COMMON-MODE REJECTION RATIO vs
FREQUENCY
FIGURE 10. SMALL SIGNAL BANDWIDTH vs SUPPLY
VOLTAGE
2.5
100
2
10
PEAKING (dB)
IMPEDANCE ()
-45
1G
AV=1
70
1
0.1
0.01
10K
100M
FIGURE 8. OPEN LOOP GAIN AND PHASE vs FREQUENCY
-10
1M
10M
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
-110
100K
PHASE (°)
GAIN (dB)
GAIN (dB)
6
4
315
RL=150
RF=RG=1k
RF=RG=2k
2
405
RL=1k
1.5
1
AV=1
RL=1k
CL=1.5pF
0.5
0
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 11. OUTPUT IMPEDANCE vs FREQUENCY
6
3
3.5
4
4.5
5
5.5
VS (V)
FIGURE 12. SMALL SIGNAL PEAKING vs SUPPLY VOLTAGE
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
-10
-45
-30
-55
DISTORTION (dBc)
PSRR (dB)
Typical Performance Curves (Continued)
PSRR-
-50
-70
PSRR+
VS=5V
RL=1k
CL=1.5pF
AV=2
@
HD2
-65
HD
-75
z
HD2@5MH
-95
100K
10K
1M
10M
100M
2
1
3
VS=5V
RL=1k
VO=1VP-P for AV=1
VO=2VP-P for AV=2
-40
DISTORTION (dBc)
GAIN (dB)
-30
VS=5V
AV=1
RL=1k
CL=1.5pF
-50
-70
-90
-50
-60
-70
HD
-80
2@
100K
1M
10M
100M
-100
1G
1
40
10
FIGURE 16. HARMONIC DISTORTION vs FREQUENCY
1K
-60
HD
3@
-70
-75
HD
-80
AV =
-85
2
HD2@A =1
V
3@
A
V=
AV =2
VOLTAGE NOISE (nV/Hz)
CURRENT NOISE (pA/Hz)
HD2@
-65
DISTORTION (dBc)
2
A V=
FREQUENCY (MHz)
FIGURE 15. DISABLED OUTPUT ISOLATION FREQUENCY
RESPONSE
-95
=1
AV
HD3@AV=1
FREQUENCY (Hz)
-90
2@
HD
=2
AV
3@
HD
-90
10K
5
FIGURE 14. HARMONIC DISTORTION vs OUTPUT VOLTAGE
FIGURE 13. POWER SUPPLY REJECTION RATIO vs
FREQUENCY
-110
1K
4
VOP-P (V)
FREQUENCY (Hz)
-30
MHz
HD3@1MHz
-110
1K
-10
MHz
@10
HD3
3@5MHz
1
HD2@
-85
-90
z
10MH
1
VS=5V
VO=1VP-P for AV=1
VO=2VP-P for AV=2
-100
100
1K
2K
RLOAD ()
FIGURE 17. HARMONIC DISTORTION vs LOAD RESISTANCE
7
100
eN
10
IN+
1
IN0.1
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FIGURE 18. VOLTAGE AND CURRENT NOISE vs FREQUENCY
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
0
0
-10
-10
CHANNEL SEPARATION (dB)
CHANNEL SEPARATION (dB)
Typical Performance Curves (Continued)
-20
-30
-40
-50
CH1 <=> CH2
-60
-70
-80
-90
-100
100K
1M
10M
100M
1G
-20
-30
-40
-50
CH1 <=> CH2
CH3 <=> CH4
-60
-70
-80
-100
100K
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. CHANNEL SEPARATION vs FREQUENCY (EL8200
AND EL8201)
CH1 <=> CH3, CH4
CH2 <=> CH3, CH4
-90
FIGURE 20. CHANNEL SEPARATION vs FREQUENCY
(EL8401)
VS=5V, AV=5, RL=1k to 2.5V
VS=5V, AV=1, RL=1k to 2.5V
5
5
2.5
2.5
0
0
10ns/DIV
2µs/DIV
FIGURE 21. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 22. OUTPUT SWING
VS=5V, AV=1, RL=1k to 2.5V CL=1.5pF
VS=5V, AV=5, RL=1k to 2.5V
5
2.6
2.5
2.5
2.4
0
10ns/DIV
FIGURE 23. SMALL SIGNAL TRANSIENT RESPONSE
8
2µs/DIV
FIGURE 24. OUTPUT SWING
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Typical Performance Curves (Continued)
VS=±2.5V, AV=1, RL=1k
VS=±2.5V, AV=1, RL=1k
CH1
ENABLE
INPUT
CH1
ENABLE
INPUT
CH2
CH2
VOUT
OUTPUT
CH1, CH2, 1V/DIV, M=100ns
CH1, CH2, 0.5V/DIV, M=20ns
FIGURE 26. ENABLED RESPONSE (EL8200)
FIGURE 25. DISABLED RESPONSE (EL8200)
1.136W
1.2
1 909mW
0.8

JA
893mW
870mW
MSOP10
JA=115°C/W
0.6
0.4
SO
=8 1 4
8°
C/
W
SO8
JA=110°C/W
QSOP16
JA=112°C/W
0.2
0
POWER DISSIPATION (W)
POWER DISSIPATION (W)
1.4
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1
0.9 833mW
0.8
0.3
25
75 85 100
50
125
150
JA
=
SO
12
0
14
°C
/W
MSOP10
JA=206°C/W
0.2
SO8
JA=160°C/W
QSOP16
JA=158°C/W
0.1
0
0

0.7 625mW
0.6
633mW
0.5
0.4 486mW
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Simplified Schematic Diagram
VS+
I1
I2
Q5
IN+
Q1
R8
VBIAS1
Q6
R3
R1
R7
R6
Q7
R2
Q2
DIFFERENTIAL TO
SINGLE ENDED
DRIVE
GENERATOR
IN-
VBIAS2
Q3
OUT
Q4
Q8
R4
R5
R9
VS-
9
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Description of Operation and Application
Information
Product Description
The EL8200, EL8201 and EL8401 are wide bandwidth,
single supply, low power and rail-to-rail output voltage
feedback operational amplifiers. The amplifiers are internally
compensated for closed loop gain of +1 of greater.
Connected in voltage follower mode and driving a 1k load,
they have a -3dB bandwidth of 200MHz. Driving a 150
load, the bandwidth is about 130MHz while maintaining a
200V/us slew rate. The EL8200 is available with a power
down pin to reduce power to 30µA typically while the
amplifier is disabled.
Input, Output and Supply Voltage Range
The EL8200, EL8201 and EL8401 have been designed to
operate with a single supply voltage from 3V to 5.0V. Split
supplies can also be used as long as their total voltage is
within 3V to 5.0V. The amplifiers have an input common
mode voltage range from 0.15V below the negative supply
(VS- pin) to within 1.5V of the positive supply (VS+ pin). If the
input signal is outside the above specified range, it will cause
the output signal to be distorted.
The output of the EL8200, EL8201 and EL8401 can swing
rail to rail. As the load resistance becomes lower, the ability
to drive close to each rail is reduced. For the load resistor
1k, the output swing is about 4.9V at a 5V supply. For the
load resistor 150, the output swing is about 4.6V.
Choice of Feedback Resistor and Gain Bandwidth
Product
For applications that require a gain of +1, no feedback
resistor is required. Just short the output pin to the inverting
input pin. For gains greater than +1, the feedback resistor
forms a pole with the parasitic capacitance at the inverting
input. As this pole becomes smaller, the amplifier’s phase
margin is reduced. This causes ringing in the time domain
and peaking in the frequency domain. Therefore, RF has
some maximum value that should not be exceeded for
optimum performance. If a large value of RF must be used, a
small capacitor in the few Pico farad range in parallel with RF
can help to reduce the ringing and peaking at the expense of
reducing the bandwidth.
As far as the output stage of the amplifier is concerned, the
output stage is also a gain stage with the load. RF and RG
appear in parallel with RL for gains other than +1. As this
combination gets smaller, the bandwidth falls off.
Consequently, RF also has a minimum value that should not
be exceeded for optimum performance. For gain of +1, RF=0
is optimum. For the gains other than +1, optimum response
is obtained with RF between 300 to 1k.
10
The EL8200, EL8201 and EL8401 have a gain bandwidth
product of 100MHz. For gains 5, its bandwidth can be
predicted by the following equation:
Gain  BW = 100MHz
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This is especially difficult when driving a standard video load
of 150, because the change in output current with DC level.
Special circuitry has been incorporated in the EL8200,
EL8201 and EL8401 to reduce the variation of the output
impedance with the current output. This results in dG and dP
specifications of 0.03% and 0.05, while driving 150 at a
gain of 2. Driving high impedance loads would give a similar
or better dG and dP performance.
Driving Capacitive Loads and Cables
The EL8200, EL8201 and EL8401 can drive 10pF loads in
parallel with 1k with less than 5dB of peaking at gain of +1.
If less peaking is desired in applications, a small series
resistor (usually between 5 to 50) can be placed in series
with the output to eliminate most peaking. However, this will
reduce the gain slightly. If the gain setting is greater than 1,
the gain resistor RG can then be chosen to make up for any
gain loss which may be created by the additional series
resistor at the output.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help
to reduce peaking.
Disable/Power-Down
The EL8200 can be disabled and placed its output in a high
impedance state. The turn off time for each channel is about
25ns and the turn on time is about 200ns. When disabled,
the amplifier’s supply current is reduced to 30µA typically,
thereby effectively eliminating the power consumption. The
amplifier’s power down can be controlled by standard TTL or
CMOS signal levels at the ENABLE pin. The applied logic
signal is relative to VS- pin. Letting the ENABLE pin float or
applying a signal that is less than 0.8V above VS- will enable
the amplifier. The amplifier will be disabled when the signal
at ENABLE pin is 2V above VS-.
Output Drive Capability
The EL8200, EL8201 and EL8401 do not have internal short
circuit protection circuitry. They have a typical short circuit
current of 70mA sourcing and 140mA sinking for the output
is connected to half way between the rails with a 10
resistor. If the output is shorted indefinitely, the power
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds ±40mA. This limit is set by the design
of the internal metal interconnections.
Power Dissipation
With the high output drive capability of the EL8200, EL8201
and EL8401, it is possible to exceed the 125C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
T JMAX – T AMAX
PD MAX = -------------------------------------------- JA
normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
Typical Applications
Where:
VIDEO SYNC PULSE REMOVER
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
V OUTi
PD MAX = V S  I SMAX +   V S – V OUTi   ----------------R
Li
For sinking:
PD MAX = V S  I SMAX +   V OUTi – V S -   I LOADi
Where:
VS = Total supply voltage
ISMAX = Maximum quiescent supply current
VOUTi = Maximum output voltage of the application for
each channel
RLOADi = Load resistance tied to ground for each channel
ILOADi = Load current for each channel
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOADi to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
11
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 29 shows a gain of 2 connections. Figure 30
shows the complete input video signal applied at the input,
as well as the output signal with the negative going sync
pulse removed.
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8200 can be used for multiplexing applications.
Figure 31 shows two channels with the outputs tied together,
driving a back terminated 75 video load. A 2VP-P 2MHz
sine wave is applied to Amp A and a 1VP-P 2MHz sine wave
is applied to Amp B. Figure 32 shows the ENABLE signal
and the resulting output waveform at VOUT. Observe the
break-before-make operation of the multiplexing. Amp A is
on and VIN1 is passed through to the output when the
ENABLE signal is low and turns off in about 25ns when the
ENABLE signal is high. About 200ns later, Amp B turns on
and VIN2 is passed through to the output. The break-beforemake operation ensures that more than one amplifier isn’t
trying to drive the bus at the same time.
5V
VIN
+
75
VS+
75
VS-
VOUT
75
1K
1K
FIGURE 29. SYNC PULSE REMOVER
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
set the AC gain. C2 isolates the virtual ground potential. RT
and R3 are the termination resistors for the line. C1, C2 and
C3 are selected big enough to minimize the droop of the
luminance signal.
1V
0.5V
VIN
0V
5V
1V
VIN
C1
47µF
RT
75W
R2
10K
0.5V
VOUT
0V
R1
10K
R3
C3
470µF 75W
+
-
VOUT
75W
M = 10µs/DIV
RG
1kW
FIGURE 30. VIDEO SIGNAL
RF
1kW
C2
220µF
+2.5V
B 2MHz
1VP-P
FIGURE 33. 5V SINGLE SUPPLY NON INVERTING VIDEO LINE
DRIVER
+
75W
-2.5V
1K
1K
75W
RF
1k
VOUT
+2.5V
A 2MHz
2VP-P
75W
+
-
75W
-2.5V
VIN
C1
RG
47µF 500
5V
RT
75
-
R3
C3
470µF 75
VOUT
+
R1
10K
1K
1K
5V
R2
10K
ENABLE
75
C2
220µF
FIGURE 31. TWO TO ONE MULTIPLEXER
FIGURE 34. 5V SINGLE SUPPLY INVERTING VIDEO LINE
DRIVER
0V
-0.5V
ENABLE
5
-1.5V
1V
0V
B
A
-1V
M = 50ns/DIV
FIGURE 32. ENABLE SIGNAL
SINGLE SUPPLY VIDEO LINE DRIVER
4
NORMALIZED GAIN (dB)
-2.5V
3
2
1
AV = 2
0
-1
AV = -2
-2
-3
-4
-5
100K
1M
10M
FREQUENCY (Hz)
100M 200M
FIGURE 35. VIDEO LINE DRIVER FREQUENCY RESPONSE
The EL8200, EL8201 and EL8401 are wideband rail-to-rail
output op amplifiers with large output current, excellent dG,
dP, and low distortion that allow them to drive video signals
in low supply applications. Figure 33 is the single supply
non-inverting video line driver configuration and Figure 34 is
the inverting video ling driver configuration. The signal is AC
coupled by C1. R1 and R2 are used to level shift the input
and output to provide the largest output swing. RF and RG
12
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
August 11, 2015
FN7105.5
CHANGE
Updated Ordering Information table on page 2.
Added Revision History and About Intersil sections.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
13
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
14
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
INCHES
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
E
PIN #1
I.D. MARK
E1
1
(N/2)
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
Rev. F 2/07
NOTES:
L1
A
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
15
FN7105.5
August 11, 2015
EL8200, EL8201, EL8401
Mini SO Package Family (MSOP)
0.25 M C A B
D
MINI SO PACKAGE FAMILY
(N/2)+1
N
E
MDP0043
A
E1
MILLIMETERS
PIN #1
I.D.
1
B
(N/2)
e
H
C
SEATING
PLANE
0.10 C
N LEADS
0.08 M C A B
b
SYMBOL
MSOP8
MSOP10
TOLERANCE
NOTES
A
1.10
1.10
Max.
-
A1
0.10
0.10
±0.05
-
A2
0.86
0.86
±0.09
-
b
0.33
0.23
+0.07/-0.08
-
c
0.18
0.18
±0.05
-
D
3.00
3.00
±0.10
1, 3
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
A1
L
0.25
3° ±3°
DETAIL X
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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16
FN7105.5
August 11, 2015