ICs for TV AN5870K Wide bandwidth analog switch IC ■ Overview ■ Features • 2-input 1-output circuit (DC switch type) • Built-in 6 dB amplifier for RGB signal (1.5 dB for 75 Ω termination) • Built-in sync. separation circuit (Supporting sync. on green and power save) • Higher speed horizontal / vertical sync. signal circuit (tdelay = 20 ns) 0.5±0.1 Unit: mm 30 0.9±0.25 1 1.778 26.7±0.3 The AN5870K is a wide bandwidth analog switch IC of 300 MHz operation. It is usable for RGB signal and horizontal/vertical synchronizing signals, and it has a built-in 75 Ω driver for video signal. In addition, it has also realized a high speed operation by the adoption of CMOS process for its sync. signal processing circuit. It is usable in a broad range from a popular type monitor to a high definition monitor. 15 16 8.6±0.3 4.7±0.25 +0.1 3° to 15° 10.16±0.25 0.35−0.0 1.0±0.25 3.3±0.25 5 SDIP030-P-0400 ■ Applications • Monitors 1 AN5870K ICs for TV ■ Block Diagram R-in1 GND (R) 1 30 2 29 VCC2 (12 V) R-out 6 dB R-in2 VCC1 (5 V) 3 28 4 27 VCC2 G-out 6 dB G-in1 GND (G) G-in2 VCC1 (5 V) 5 26 6 25 7 24 8 23 GND (R, G, B) G sync. GND (R, G, B) B-out 6 dB B-in1 GND (B) B-in2 9 10 22 Sw select bias Sync. sep 11 21 20 SW Sync. in H Pdet. Hsync detect sw VCC1 (5 V) H-in1 H-in2 V-in1 2 12 19 13 18 14 17 15 16 H-out V-out GND (HV, HSEP, SW) V-in2 ICs for TV AN5870K ■ Pin Descriptions Pin No. Description Pin No. Description 1 R input 1 16 V input 2 2 GND (R) 17 GND (HV, HSEP, SW) 3 R input 2 18 V output 4 VCC1 5 V (G sync.) 19 H output 5 G input 1 20 H detect 6 GND (G) 21 Sync. input 7 G input 2 22 SW 8 VCC1 5 V (RGB) 23 B output 9 B input 1 24 GND (RGB) 10 GND (B) 25 G sync. output 11 B input 2 26 GND (RGB) 12 VCC1 5 V (HV, HSEP, SW) 27 G output 13 H input 1 28 VCC2 12 V (RGB) 14 H input 2 29 R output 15 V input 1 30 VCC2 12 V (RGB) ■ Absolute Maximum Ratings Parameter Supply voltage Supply current Power dissipation Symbol Rating Unit VCC1 (pin 4, pin 8, pin 12) 5.5 V VCC2 (pin 28, pin 30) 12.9 ICC1 (pin 4, pin 8, pin 12) 22.5 ICC2 (pin 28, pin 30) 75.8 PD 1.143 W Topr −20 to +70 °C Tstg −55 to +150 °C *2 Operating ambient temperature Storage temperature *1 *1 mA Note) For the precautions related to surge and latch-up, refer to "■ Usage Notes". *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C. *2: The power dissipation shown is for the independent IC package without a heat sink in free air at Ta = 70°C ■ Recommended Operating Range Parameter Supply voltage Symbol Range Unit VCC1 4.5 to 5.25 V VCC2 10.5 to 12.6 3 AN5870K ICs for TV ■ Electrical Characteristics at Ta = 25°C Parameter Symbol Conditions Min Typ Max Unit Power supply Supply current (1) ICC1 Current at V4, V8, V12 = 5 V 13.0 16.0 19.0 mA Supply current (2) ICC2 Current at V28, V30 = 12 V 46.0 60.0 70.0 mA Input DC voltage 1 VI1 Pin 22: 0 V, pins 1, 5, 9: DC 2.6 2.9 3.2 V Input DC voltage 2 VI2 Pin 22: 5 V, pins 3, 7, 11: DC 2.6 2.9 3.2 V Output DC voltage 1 VO1 Pin 22: 0 V, pins 23, 27, 29: DC 5.7 6.2 6.7 V Output DC voltage 2 VO2 Pin 22: 5 V, pins 23, 27, 29: DC 5.7 6.2 6.7 V Output DC voltage 3 VO3 Pin 25: DC 1.9 2.3 2.7 V Input impedance (1) RI1 Pin 22: 0 V, pins 1, 5, 9: Measurement 85 100 115 kΩ Input impedance (2) RI2 Pin 22: 5 V, pins 3, 7, 11: Measurement 85 100 115 kΩ Output impedance (1) RO1 Pin 23, 27, 29: Measurement 60 70 80 Ω Output impedance (2) RO2 Pin 25: Measurement 50 70 90 Ω Gain (1) GV1 Pin 22: 0 V, pins 1, 5, 9: SG1 signal, pins 23, 27, 29: Measurement 0.5 1.5 2.5 dB − 0.4 0.0 0.4 dB 0.5 1.5 2.5 dB Relative difference to GV2 − 0.4 0.0 0.4 dB Signal processing system Relative gain (1) Gain (2) Relative gain (2) GV2 ∆GV2 Relative difference to GV1 Pin 22: 5 V, pin 3, 7, 11: SG1 signal, pins 23, 27, 29: Measurement Gain (3) GV3 Pin 22: 0 V or 5 V, pin 5 or 7: SG1 signal, pins 23, 27, 29: Measurement −2.0 − 0.5 0.5 dB Frequency characteristics 1 (100 MHz) fC1 Pin 22: 0 V, difference from GV1, pins 1, 5, 9: SG4 signal, pins 23, 27, 29: Measurement −1.3 − 0.3 0.7 dB Relative frequency characteristics 1 (100 MHz) ∆fC1 Relative difference to fC1 − 0.5 0.0 0.5 dB Pin 22: 5 V, difference from GV2, pins 3, 7, 11: SG4 signal, pins 23, 27, 29: Measurement −1.3 − 0.3 0.7 dB − 0.5 0.0 0.5 dB Relative frequency characteristics 2 (100 MHz) 4 ∆GV1 fC2 Relative frequency characteristics 2 (100 MHz) ∆fC2 Relative difference to fC2 Crosstalk between RGB 1 (10 MHz) CTC1 Pin 22: 0 V, pin 1 or 5 or 9: SG2 signal, pins 23, 27, 29: Measurement −50 −45 dB Crosstalk between RGB 2 (10 MHz) CTC2 Pin 22: 5 V, pin 3 or 7 or 11: SG2 signal, pins 23, 27, 29: Measurement −50 −45 dB Crosstalk between 2 inputs (1) (10 MHz) CTI1 Pin 22: 5 V, pin 1 or 5 or 9: SG2 signal, pins 29, 27, 23: Measurement −60 −50 dB Crosstalk between 2 inputs (2) (10 MHz) CTI2 Pin 22: 0 V, pin 3 or 7 or 11: SG2 signal, pins 29, 27, 23: Measurement −60 −50 dB ICs for TV AN5870K ■ Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ Max Unit High level output voltage (1) VOH(H) Pin 20: 2.5 V, pin 19: Measurement, pin 13 or 14: 5 V, pin 22: 0 V or 5 V 4.5 5.0 V High level output voltage (2) VOH(V) Pin 18: Measurement, pin 15 or 16: 5 V, pin 22: 0 V or 5 V 4.5 5.0 V Low level output voltage (1) VOL(H) Pin 20 2.5 V, pin 19: Measurement, pin 13 or 14: 0 V, pin 22: 0 or 5 V 0.0 0.5 V Low level output voltage (2) VOL(V) Pin 18: Measurement, pin 15 or 16: 0 V, pin 22: 0 V or 5 V 0.0 0.5 V Input threshold voltage (1) VITH(H) Pin 20: 2.5 V, pin 19: Measurement, pin 13 or 14: 0 to 5 input, pin 22: 0 V or 5 V 1.2 1.5 1.8 V Input threshold voltage (2) VITH(V) Pin 18: Measurement, pin 15 or 16: 0 to 5 input, pin 22: 0 V or 5 V 1.2 1.5 1.8 V HDET voltage VO(DET) Pin 22: 0 V, pin 13: SG6 signal, pin 20: DC measurement 2.2 2.5 2.8 V Pin 21: DC measurement 1.0 1.35 1.7 V Pin 21: SG8 signal, pin 19: Sync. level measurement 100 mV VITH(SW) Measurement when pin 15: DC 5 V, pin 16: DC 0 V, pin 22: 0 V to 2.5 V and pin 18: Becomes 0 V 1.2 1.7 2.2 V Input dynamic range (1) VDI1 Pin 22: 0 V, pins 1, 5, 9: Input sweep, pins 23, 27, 29: Measurement 2.5 3.0 V Input dynamic range (2) VDI2 Pin 22: 5 V, Pin 3, 7, 11: Input sweep, pins 23, 27, 29: Measurement 2.5 3.0 V G-sync. dynamic range VD0 Pin 22: 0 V or 5 V, pin 5 or 7: Input sweep, pin 25: Measurement 2.5 3.0 V Gain with power supply fluctuation (1) GVH VCC1 = 5.25, VCC2 = 12.6, like GV1, GV2, difference from typ. − 0.5 0.0 +0.5 dB Gain with power supply fluctuation (2) GVL VCC1 = 4.75, VCC2 = 11.4, like GV1, GV2, difference from typ. − 0.5 0.0 +0.5 dB Frequency characteristics 3 (300 MHz) fC3 Pin 22: 0 V, difference form value at 1MHz, pins 1, 5, 9: SG5 signal, pins 23, 27, 29: Measurement −3.5 −2.0 − 0.5 dB Relative frequency characteristics 3 (300 MHz) ∆fC3 Relative difference to fC3 −1.5 0.0 +1.5 dB Frequency characteristics 4 (300 MHz) fC4 Pin 22: 5 V, difference form value at 1 MHz, pins 3, 7, 11: SG5 signal, pins 23, 27, 29: Measurement −3.5 −2.0 − 0.5 dB HV circuit system Sync. separation circuit system Input clamp voltage Minimum sync. separation level VC1 VSmin SW System Switch threshold voltage Signal processing system 5 AN5870K ICs for TV ■ Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ Max Unit Relative difference to fC4 −1.5 0.0 +1.5 dB Pin 22: 0 V or 5 V, pin 5 or 7: SG3 signal, pin 25: Measurement −4.0 −2.5 −1.0 dB ∆GVCH1 Relative difference at 1 MHz between − 0.5 same channel of GV1 and GV2 0.0 +0.5 dB Relative frequency characteristics between 2 inputs (1) ∆fC1 Relative difference at 100 MHz between − 0.5 the same channels of fC1 and fC2 0.0 +0.5 dB Relative frequency characteristics between 2 inputs (2) ∆fC2 Relative difference at 300MHz between the same channels of fC3 and fC4 −1.0 0.0 +1.0 dB Crosstalk between RGB 3 (100 MHz) CTC3 Pin 22: 0 V, pin 1 or 5 or 9: SG4 signal, pins 23, 27, 29: Measurement −40 −30 dB Crosstalk between RGB 4 (100 MHz) CTC4 Pin 22: 5 V, pin 3 or 7 or 11: SG4 signal, pins 23, 27, 29: Measurement −40 −30 dB Crosstalk between 2 inputs (3) (100 MHz) CTI3 Pin 22: 5 V, pin 1 or 5 or 9: SG4 signal, pins 29, 27, 23: Measurement −50 −40 dB Crosstalk between 2 inputs (4) (100 MHz) CTI4 Pin 22: 0 V, pin 3 or 7 or 11: SG4 signal, pins 29, 27, 23: Measurement −50 −40 dB Crosstalk between RGB 5 (300 MHz) CTC5 Pin 22: 0 V, pin 1 or 5 or 9: SG5 signal, pins 23, 27, 29: Measurement −25 dB Crosstalk between RGB 6 (300 MHz) CTC6 Pin 22: 5 V, pin 3 or 7 or 11: SG5 signal, pins 23, 27, 29: Measurement −25 dB Crosstalk between 2 inputs 5 (300 MHz) CTI5 Pin 22: 5 V, pin 1 or 5 or 9: SG5 signal, pins 23, 27, 29: Measurement −30 dB Crosstalk between 2 inputs 6 (300 MHz) CTI6 Pin 22: 0 V, pin 3 or 7or 11: SG5 signal, pins 23, 27, 29: Measurement −30 dB Rise time (1) tr1 Pin 22: 0 V, pin 1 or 5 or 9: SG9 signal, pins 23, 27, 29: Measurement 1.2 ns Rise time (2) tr2 Pin 22: 5 V, pin 3 or 7or 11: SG9 signal, pins 23, 27, 29: Measurement 1.2 ns Fall time (1) tf1 Pin 22: 0 V, pin 1 or 5 or 9: SG9 signal, pins 23, 27, 29: Measurement 1.2 ns Fall time (2) tf2 Pin 22: 5 V, pin 3 or 7or 11: SG9 signal, pins 23, 27, 29: Measurement 1.2 ns Output VSWR/75 Ω Γo Pin 23 or 27 or 29: SG5 signal, voltage standing ratio measurement 1.6 Signal processing system (continued) Relative frequency characteristics 4 (300 MHz) ∆fC4 G-sync. frequency characteristics fCGS (35 MHz) Relative gain between 2 inputs 6 ICs for TV AN5870K ■ Electrical Characteristics at Ta = 25°C (continued) Parameter Symbol Conditions Min Typ Max Unit Rise time (1) tr(H) Pin 19: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 2 ns Rise time (2) tr(V) Pin 18: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 2 ns Fall time (1) tf(H) Pin 19: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 2 ns Fall time (2) tf(V) Pin 18: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 2 ns Rise delay time (1) trD(H) Pin 19: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 20 50 ns Rise delay time (2) trD(V) Pin 18: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 10 40 ns Fall delay time (1) tfD(H) Pin 19: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 15 45 ns Fall delay time (2) tfD(V) Pin 18: Measurement, pin 13 or 14: SG6 signal, pin 22: 0 V or 5 V 10 40 ns Output impedance (3) RO3 Pin 18 or 19: Measurement 70 Ω Rise time tr(SY) Pin 21: SG7 signal, pin 19: Measurement 2 ns Fall time tf(SY) Pin 21: SG7 signal, pin 19: Measurement 2 ns Rise delay time trD(SY) Pin 21: SG7 signal, pin 19: Measurement 2 ns Fall delay time tfD(SY) Pin 21: SG7 signal, pin 19: Measurement 2 ns Pin 21: 2 V, pin 21 sink current value measurement 4.2 5.6 7.0 µA HV circuit system Sync. separation circuit system Slice level IS1 7 AN5870K ICs for TV ■ Electrical Characteristic (continued) • Input signal for testing Name Input signal Sine wave (f = 1 MHz, amplitude 1 V[p-p]) SG1 1 V[p-p] SG2 Sine wave (f = 10 MHz, amplitude 1 V[p-p]) SG3 Sine wave (f = 35 MHz, amplitude 1 V[p-p]) SG4 Sine wave (f = 100 MHz, amplitude 1 V[p-p]) SG5 Sine wave (f = 300 MHz, amplitude 1 V[p-p]) Square wave (f = 62.5 kHz, amplitude 5 VOP, duty cycle 50%) 5V SG6 0V Square wave (f = 62.5 kHz, amplitude 1 V[p-p], low period 1 µs) SG7 1 V[p-p] 8 SG8 Square wave (f = 62.5 kHz, amplitude 0.1 V[p-p], low period 1 µs) SG9 Square wave (f = 62.5 kHz, amplitude 0.7 V[p-p], low period 1 µs) ICs for TV AN5870K ■ Terminal Equivalent Circuits Pin No. Equivalent circuit Description 1 5 V (pin 8) R signal input pin 1: Input through a capacitor Pin voltage (V) Input with sync. signal (typ.) 1.0 V[p-p] DC 2.9 V Pins 1,5,9 200 Ω 1 µF 75 Ω 1% 100 kΩ 2.9 V 140 µA 2 GND pin for 5 V: For R signal circuit 3 5 V (pin 8) R signal input pin 2: Input through a capacitor GND Input with sync. signal (typ.) 1.0 V[p-p] DC 2.9 V Pins 3,7,11 200 Ω 1 µF 75 Ω 1% 100 kΩ 2.9 V 140 µA 4 Power supply pin for 5 V: For G sync. circuit output 5V 5 Refer to pin 1 G signal input pin 1: Input through a capacitor Refer to pin 1 6 7 Refer to pin 3 G signal input pin 2: Input through a capacitor Refer to pin 3 8 Power supply pin for 5V: For RGB signal circuit 5V 9 Refer to pin 1 B signal input pin 1: Input through a capacitor Refer to pin 1 10 11 Refer to pin 3 B signal input pin 2: Input through a capacitor Refer to pin3 12 Power supply pin for 5 V: HV • Sync. separation • For SW circuit 5V GND pin for 5 V: For G signal circuit GND pin for 5 V: For B signal circuit GND GND 9 AN5870K ICs for TV ■ Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description 13 H. sync. signal input pin 1: 5 V (pin 12) Pin voltage (V) (typ.) High-level: 5 V Low-level: 0 V 15 kΩ Pins 13,15 1 kΩ threshold voltage: 4 kΩ 1.5 V 50 kΩ 500 Ω 14 H. sync. signal input pin 2: 5 V (pin 12) (typ.) High-level: 5 V Low-level: 0 V 15 kΩ Pins 14,16 1 kΩ threshold voltage: 1.5 V 4 kΩ 50 kΩ 500 Ω 15 Refer to pin 13 16 Refer to pin 14 17 V sync. signal output pin 1: Refer to pin 13 V sync. signal output pin 2: Refer to pin 14 GND pin for 5 V: HV • Sync. separation • For SW circuit 18 V sync. signal output pin: 5 V (pin 12) 10 (typ.) High-level: 5 V Low-level: 0 V Pins 18,19 19 GND H. sync. signal output pin: ICs for TV AN5870K ■ Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description 20 5 V (pin 12) 20 µA 100 µA 200 Ω 20 H. sync. signal detection pin: When detecting high-level • Pin 20 gives priority to high-level signal signal output (typ.) H. sync. signal present: 2.5 V H. sync. signal output 30 kΩ H. sync. not present: 200 Ω 100 µΑ 2.5 V 1 kΩ 0.1 µA Pin voltage (V) 50 µA 21 Sync. separation circuit input pin: • Sync. slice level is determined by 5 V (pin 12) 50 Ω 0.15 µF 2.0 V 200 Ω 21 Sync. separation circuit output R 5.6 µA 22 0.3 V[p-p] the following equation, adjust slice DC 1.35 V level according to equipment set; 5.6 (µA) Input frequency · Sync. width • Open when the pin is unused. 5 V (pin 12) 25 µA the external resistor R. Referring to Slice level = R · 3.4 kΩ Sync. signal (typ.) 150 µA 6 kΩ Input changeover signal input pin: • When input is high: Input pin 2 (typ.) High-level: 5 V is selected (pins 3, 7, 11, 14, 16) Low-level: 0 V When input is low: Input pin 1 threshold voltage: is selected (pins 1, 5, 9, 13, 15) 1.7 V B signal output pin: • Be sure to connect a capacitor to (typ.) DC 6.2 V 22 2.25 V 50 kΩ 500 Ω 23 12 V (pin 28) 80 Ω output pin. If the pin is not used with a 75 Ω terminating resistor, 75 Ω Pins 23,27,29 220 µF 0.01 µF do not allow a 20 mA or more output current flow. 75 Ω 1% 80 Ω 7.8 mA 11 AN5870K ICs for TV ■ Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit 24 GND pin for 12 V 25 5 V (pin 4) Sync. on green signal Output pin: • If terminating with a resistor, do 80 Ω Description Input resistance or pin voltage GND (typ.) DC 2.3 V not allow 10 mA or more output current flow. 70 Ω 25 80 Ω 2.1 mA 26 27 Refer to pin 23 • For RGB signal circuit For G sync. output G signal output pin: • Be sure to connect a capacitor to GND Refer to pin 23 output pin. If the pin is not used with a 75 Ω terminating resistor, do not allow a 20 mA or more output current flow. 28 29 Refer to pin 23 Power supply pin for 12 V: • For RGB signal circuit R signal output pin: • Be sure to connect a capacitor to 12 V Refer to pin 23 output pin. If the pin is not used with a 75 Ω terminating resistor, do not allow a 20 mA or more output current to flow. 30 12 Power supply pin for 12 V: • For RGB signal circuit 12 V ICs for TV AN5870K ■ Technical Information • Operational explanation 1. SW block Switches over R, G, B, H, V signal of 2 systems. SW pin (pin 22) Selected pins In low-level R in 1 (pin 1), G in 1 (pin 5), B in 1 (pin 9), H in 1 (pin 13), V in 1 (pin 15) In high-level R in 2 (Pin 3), G in 2 (pin 7), B in 2 (pin 11), H in 2 (pin 14), V in 2 (pin 16) 2. High-level signal detection block Sync.-in pin (pin 21) is a pin for inputting the sync.-on green signal and it is separated into the composite sync. signal (composite sync.) inside. H-in 1 and 2 pins (pin 13 or pin 14) are input pins for the video signal and the separated horizontal signal. The high-level signal detection block discriminates the presence of H-in signal which is selected in SW block and provides the output to H-out pin (pin 19) in the following manner. Input signal Output signal Sync.-in pin (pin 21) H-in pin (pin 13 · pin 14) H-out pin (pin 19) ● ● H-in signal ● Sync.in signal ● H-in signal DC (state of sync.-in pin) H signal detection pin (pin 20) voltage becomes under 1 V or over 4 V if H. sync. signal is not inputted. The output signal for the H. sync. signal detection pin voltage becomes as follows and it has hysteresis characteristics. It is possible to adjust the H. sync. signal detection time by means of an external capacitor. When rising from 0 V 0V 1V 2V Sync-in signal selection H. sync. signal detection pin voltage (H-in signal is selected if 2 V is exceeded) (Detection voltage change) (Detection voltage change) 1V When detecting H. sync. signal (Sync.-in signal is selected when lowed under 1 V) 2.5V 4V H-in signal selection (Sync.-in signal is selected when 4 V is exceeded) (Detection voltage change) (Detection voltage change) When decreasing from 5 V (H-in signal is selected when lowed under 3 V) H. sync. signal detection pin voltage 3V 5V Sync.-in signal selection H. sync. signal detection pin voltage 13 AN5870K ICs for TV ■ Usage Notes 1. About C22 0.01 µF capacitor (refer to ■ Application Circuit Example) In the case of evaluation board for this IC without heat sink, a resonance phenomena takes place at approx. 400 MHz between pin 23 B-out pin and pin 22 SW pin and affects the frequency characteristic of B-out pin. To solve the above problem, the correction can be made by attaching C22 0.01 µF capacitor between pin 22 SW pin and GND at a place as close to the IC as possible. In the case of using this IC, study if the correction is necessary. 2. About latch-up In our latch-up testing, a voltage charged to 200 pF capacitor is applied to the IC pin, in the state of providing only a voltage to the power supply pin of the IC, and we confirm that the latch-up does not occur up to 200 V. It is confirmed that this IC does not cause latch-up up to 200 V under a condition including the peripheral components. (Refer to ■ Application Circuit Example). Be careful to pin 20, pin 21, pin 28 and pin 30 which are especially weak. In the case of using this IC, the peripheral components to be attached externally should be placed as close to the IC as possible. ■ Application Circuit Example R-in1 R-in2 30 75 Ω ±1% 29 G-in2 VCC1 3 28 75 Ω ±1% 4 27 B-in2 6 25 1 µF VCC1 7 24 8 23 75 Ω ±1% 14 VCC1 VCC2 0.01 µF 220 µF 0.01 µF 9 10 VCC2 1 µF VCC1 11 75 Ω ±1% 12 C22 Sync. sep 21 R-out 75 Ω ±1% G-out 75 Ω ±1% B-out 200 Ω 220 µF 0.01 µF 22 Sw select bias 75 Ω ±1% G sync. 6 dB 75 Ω ±1% 0.15 µF SW Sync. in 20 Hsync detect sw 0.1 µF 19 13 18 10 Ω 14 17 10 Ω 15 16 H-in2 220 µF 6 dB 75 Ω ±1% 10 Ω V-in1 VCC1 26 H-in1 VCC2 6 dB 5 1 µF B-in1 2 1 µF 1 µF G-in1 VCC2 (12 V) VCC1 (5 V) VCC1 1 µF 1 H-out V-out 10 Ω V-in2