ISL54000, ISL54001, ISL54002 EW DESIGNS ENDED FOR N T NOT RECOMM REPLACEMEN ECOMMENDED at r te NO RData en C rt Sheet October 17, 2007 chnical Suppo c /ts m co il. contact our Te rs IL or www.inte 1-888-INTERS FN6458.2 Integrated Audio Amplifier Systems Features The Intersil ISL54000, ISL54001, ISL54002 family of devices are integrated audio power amplifier systems that combine stereo BTL 8 amplifiers in a single package. The devices are designed to operate from a single +2.7V to +5V power supply. All devices are offered in a 20 Ld 4x4 thin QFN package. Targeted applications include handheld equipment such as cell-phones, MP3 players, and games/toys. • Pb-Free (RoHS Compliant) The ISL54000, ISL54001, ISL54002 parts contain two class AB bridge-tied (BTL) type power amplifiers for driving stereo 8 speakers. Each BTL is capable of delivering 800mW (typ) with 0.4% THD+N and 941mW (typ) with 1% THD+N of continuous average power into an 8BTL speaker load when using a 5V supply. • Low Power Shutdown The ISL54001 and ISL54002 feature a 2:1 stereo input multiplexer front-end. This allows selection between two stereo sources. In addition the ISL54002 has the capability of mixing the stereo inputs. • TTL Logic-Compatible • Class AB 941mW Stereo BTL Speaker Amplifiiers • Single Supply Operation . . . . . . . . . . . . . . . . .+2.7V to +5.5V • THD+N at 1kHz, 800mW into 8 . . . . . . . . . . . . . . . . . .0.4% • THD+N at 1kHz, 941mW into 8 . . . . . . . . . . . . . . . . . . . 1% • Thermal Shutdown Protection • “Click and Pop” Suppression Circuitry • 2:1 Stereo Input Mux (ISL54001, ISL54002) • Mixing of Two Stereo Inputs (ISL54002) • Available in 20 Ld 4x4 Thin QFN Applications All devices in this family feature low power shutdown, thermal overload protection and click/pop suppression. The click and pop circuitry eliminates audible transients during audio source changes and transitioning in and out of shutdown. • Battery powered, Handheld, and Portable Equipment - Cellular/mobile Phones - PDA’s, MP3 Players, DVD Players, Cameras - Laptops, Notebooks, Palmtops - Handheld Games and Toys • Desktop Computers ISL54002 Typical Application Circuit and Block Diagram 0.1µF RIGHT AUDIO 1 0.22µF IN1R 0.22µF IN2R 0.22µF IN1L RIGHT AUDIO 2 VDD OUTR+ BTL MUX/MIXER OUTR- LEFT AUDIO 1 OUTL+ 0.22µF LEFT AUDIO 2 MUX/MIXER IN2L BTL OUTL- CLICK AND POP THERMAL PROTECTION BIAS REF SD MICRO CONTROLLER INS CREF 1µF LOGIC CONTROL MIX GND 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL54000, ISL54001, ISL54002 ISL54000 ISL54001 ISL54002 NAME FUNCTION NC NC INR NC Pin Descriptions ISL54000 (20 LD 4X4 TQFN) TOP VIEW GND Pinouts 3, 6, 8, 12 3, 6, 8, 12 3, 6, 8, 12 VDD System Power Supply 20 19 18 17 16 PIN 14 SD VDD 3 13 NC GND 4 12 VDD OUTR+ 5 11 INL 6 7 8 9 10 REF 2 GND OUTL+ VDD 15 NC OUTR- 1 VDD OUTL- GND IN2R INS IN1R NC ISL54001 (20 LD 4X4 TQFN) TOP VIEW 20 19 18 17 16 14 SD VDD 3 13 IN2L GND 4 12 VDD OUTR+ 5 11 IN1L 6 7 8 9 10 REF 2 GND OUTL+ VDD 15 NC OUTR- 1 VDD OUTL- GND IN2R INS IN1R MIX ISL54002 (20 LD 4X4 TQFN) TOP VIEW 20 19 18 17 16 14 SD VDD 3 13 IN2L GND 4 12 VDD OUTR+ 5 11 IN1L 6 7 8 9 10 REF 2 GND OUTL+ VDD 15 NC OUTR- 1 VDD OUTL- 2 4, 9, 20 4, 9, 20 4, 9, 20 GND Ground Connection 11 - - INL Left Channel Audio Input 1 - 11 11 IN1L Left Channel Audio Input 1 - 13 13 IN2L Left Channel Audio Input 2 17 - - INR Right Channel Audio Input 1 - 17 17 IN1R Right Channel Audio Input 1 - 19 19 IN2R Right Channel Audio Input 2 2 2 2 OUTL+ Positive Speaker Output 5 5 5 OUTR+ Positive Speaker Output 1 1 1 OUTL- Negative Speaker Output 7 7 7 OUTR- Negative Speaker Output 14 14 14 SD Shutdown, High to disable amplifiers, Low for normal operation. - 18 18 INS Input Select - - 16 MIX Mixer, High to mix Right and Left Audio Inputs, Low to pass Audio Inputs without mixing 10 10 10 REF Common-mode Bias Voltage, Bypass with a 1µF capacitor to GND 13, 15, 16, 18, 19 15, 16 15 NC No Connect FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 Ordering Information PART NUMBER PART MARKING ISL54000 Truth Table TEMP. RANGE (°C) PACKAGE (Pb-Free) Tape & Reel PKG. DWG. # ISL54000IRTZ* 540 00IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A (Note) (Pb-free) ISL54001IRTZ* 540 01IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A (Note) (Pb-free) ISL54002IRTZ* 540 02IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A (Note) (Pb-free) *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3 SD OUTR+ OUTR- OUTL+ OUTL- 1 Disabled Disabled Disabled Disabled 0 INR INR INL INL ISL54001 Truth Table SD INS OUTR+ OUTR- OUTL+ OUTL- 1 X Disabled Disabled Disabled Disabled 0 0 IN1R IN1R IN1L IN1L 0 1 IN2R IN2R IN2L IN2L ISL54002 Truth Table SD MIX INS OUTR+ OUTR- OUTL+ OUTL- 1 X X Disabled Disabled Disabled Disabled 0 0 0 IN1R IN1R IN1L IN1L 0 0 1 IN2R IN2R IN2L IN2L 0 1 X IN1R + IN2R IN1R + IN2R IN1L + IN2L IN1L + IN2L FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 Absolute Maximum Ratings Thermal Information VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V Input Voltages In_R, In_L, SD, INS, MIX . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V) Output Voltages OUT_+, OUT_-. . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V) Continuous Current (VDD, OUT_, GND) . . . . . . . . . . . . . . . . 750mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>200V Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1kV Thermal Resistance (Typical, Notes 1, 2) JA (°C/W) JC (°C/W) 20 Ld 4x4 TQFN Package . . . . . . . . . . 45 6.5 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. JC, the “case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379. 2. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications - 5V Supply PARAMETER Test Conditions: VDD = +5V, GND = 0V, VINH = 2.4V, VINL = 0.8V, SD = MIX = INS = VINL, CREF = 1µF, RL is terminated between OUT_+ and OUT_ -, Unless Otherwise Specified (Note 3). TEST CONDITIONS TEMP (°C) MIN (Notes 4, 5) Full 2.7 - 5.5 V 25 - 4.6 12 mA Full - 5.5 - mA 25 - 28 50 µA Full - 31 - µA TYP MAX (Notes 4, 5) UNITS GENERAL Power Supply Range, VDD INS = MIX = VINL or VINH, RL = NoneInputs AC coupled to ground (0.1µF) Quiescent Supply Current, IDD Shutdown Supply Current, ISD SD = VINH, INS = MIX = VINL or VINH, RL = 8 BTLInputs AC coupled to ground (0.1µF) Input Resistance, RIN INS = 0V or VDD 25 - 100 - k Thermal Shutdown, TSD INS = MIX = 0V or VDD 25 - 150 - °C 25 - 10 - °C INS = 0V or 5V, MIX = 0V or 5V Full - 1 - ms Measured OUT_+ and OUT_-, Input AC coupled to ground (0.1µF) 25 - 38 - mV Full - 49 - mV Thermal Shutdown Hysteresis SD to Full Operation, TSD(ON) BTL AMPLIFIER DRIVER Output Offset Voltage, VOS Power Supply Rejection Ratio, PSRR VRIPPLE = 200mVP-P, RL = 8 FRIPPLE = 217Hz Input AC coupled to ground FRIPPLE = 1kHz (0.1µF) 25 - 49 - dB 25 - 47 - dB Output Power, POUT RL = 8 THD + N = 1%, f = 1kHz 25 - 941 - mW RL = 8THD + N = 10%,f kHz 25 - 1.23 - W 25 - 0.4 - % Total Harmonic Distortion + Noise, RL = 8POUT = 800mW, f = 1kHz THD + N RL = 8POUT = 800mW, f = 20Hz to 20kHz 25 - 0.7 - % Max Output Voltage Swing, VOUT RL = 8VSIGNAL = 5VP-P, f = 1kHz 25 7.2 7.7 - VP-P Signal to Noise Ratio, SNR RL = 8POUT = 900mW, f = 1kHz 25 - 85 - dB Output Noise, NOUT A - Weight filter, BW = 22Hz to 22kHz 25 - 125 - µVRMS 4 FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 Electrical Specifications - 5V Supply PARAMETER Test Conditions: VDD = +5V, GND = 0V, VINH = 2.4V, VINL = 0.8V, SD = MIX = INS = VINL, CREF = 1µF, RL is terminated between OUT_+ and OUT_ -, Unless Otherwise Specified (Note 3). (Continued) TEST CONDITIONS TEMP (°C) MIN (Notes 4, 5) TYP MAX (Notes 4, 5) UNITS Crosstalk RCH to LCH, LCH to RCH RL = 8POUT = 800mW, f = 1kHz, Signal coupled from the input of active amplifier to the output of an adjacent amplifier with its input AC coupled to ground. 25 - 80 - dB Off-Isolation SD = VINH, POUT = 800mW, f = 10kHz, Signal coupled from input to output of a disabled amplifier. 25 - 130 - dB Channel Gain Matching RCH to LCH RL = 8VINxR = VINxL = 3.88VP-P (Connect to the same source) 25 - +-0.1 - dB Channel Phase Matching RCH to LCH RL = 8VINxR = VINxL = 3.88VP-P (Connect to the same source) 25 - 0.01 - ° Input Leakage Current, ISD, IINS, IMIX VDD = 5V, SD = 0V, INS = 0V, MIX = 0V 25 -3 1.9 3 µA Full - 1.9 - µA Input Leakage Current, ISD, IINS, IMIX VDD = 5V, SD = VDD, INS = VDD, MIX = VDD 25 -1 0.02 -1 µA Full - 0.02 - µA VINH Full 2.4 - - V VINL Full - - 0.8 V LOGIC INPUT Electrical Specifications - 3.6V Supply Test Conditions: VDD = +3.6V, GND = 0V, VINH = 1.4V. VINL = 0.4V, SD = MIX = INS = GSO = GS1 = VINL, CREF = 1µF. RL is terminated between OUT_+ and OUT_ -, Unless Otherwise Specified (Note 3). TEMP (°C) MIN (Notes 4, 5) TYP 25 - 2.7 12 mA Full - 3 - mA 25 - 13 50 µA Full - 15 - µA 25 - 25 - mV Full - 40 - mV 25 - 49 - dB 25 - 47 - dB RL = 8THD + N = 1%, f = 1kHz 25 - 310 - mW RL = 8THD + N = 10%, f = 1kHz 25 - 528 - mW Total Harmonic Distortion + Noise, THD + N RL = 8POUT = 200mW, f = 1kHz 25 - 0.4 - % RL = 8POUT = 200mW, f = 20Hz to 20kHz 25 - 0.4 - % Max Output Voltage Swing, VOUT RL = 8VSIGNAL = 3.6VP-P, f = 1kHz 25 - 5.8 - VP-P 25 -3 1.9 3 µA Full - 1.9 - µA PARAMETER TEST CONDITIONS MAX (Notes 4, 5) UNITS GENERAL Quiescent Supply Current, IDD INS = 0V or VDD, MIX = 0V or VDD, RL = NoneInput AC coupled to ground (0.1µF) Shutdown Supply Current, ISD INS = 0V or VDD, MIX = 0V or VDD, RL = 8BTL Input AC coupled to ground (0.1µF) BTL AMPLIFIER DRIVER, HD = VINH, HO = VINH, UNLESS OTHERWISE SPECIFIED Output Offset Voltage, VOS Measured between OUT_+ and OUT_-, Input AC coupled to ground (0.1µF) Power Supply Rejection Ratio, PSRR VRIPPLE = 200mVP-P, RL = 8 FRIPPLE = 217Hz Input AC coupled to ground FRIPPLE = 1kHz (0.1µF) Output Power, POUT LOGIC INPUT Input Leakage Current, ISD, IINS, IMIX VDD = 5V, SD = 0V, INS = 0V, MIX = 0V 5 FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 Electrical Specifications - 3.6V Supply Test Conditions: VDD = +3.6V, GND = 0V, VINH = 1.4V. VINL = 0.4V, SD = MIX = INS = GSO = GS1 = VINL, CREF = 1µF. RL is terminated between OUT_+ and OUT_ -, Unless Otherwise Specified (Note 3). (Continued) TEMP (°C) MIN (Notes 4, 5) TYP 25 -1 0.02 1 µA Full - 0.02 - µA VINH Full 1.4 - - V VINL Full - - 0.4 V PARAMETER TEST CONDITIONS Input Leakage Current, ISD, IINS, IMIX VDD = 5V, SD = VDD, INS = VDD, MIX = VDD MAX (Notes 4, 5) UNITS NOTES: 3. VIN = input voltage to perform proper function. 4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. ISL54000 Typical Application Circuit and Block Diagram 0.1µF VDD 0.22µF RIGHT AUDIO INR OUTR+ BTL OUTR- 0.22µF INL OUTL+ LEFT AUDIO BTL OUTL- CLICK AND POP THERMAL PROTECTION BIAS REF MICRO CONTROLLER CREF 1µF SD LOGIC CONTROL GND 6 FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 ISL54001 Typical Application Circuit and Block Diagram 0.1µF 0.22µF RIGHT 1 AUDIO 0.22µF RIGHT 2 AUDIO 0.22µF LEFT 1 AUDIO VDD IN1R OUTR+ BTL MUX IN2R OUTR- IN1L OUTL+ 0.22µF LEFT 2 AUDIO BTL MUX IN2L OUTL- CLICK AND POP THERMAL PROTECTION BIAS REF SD MICRO CONTROLLER INS CREF 1µF LOGIC CONTROL GND ISL54002 Typical Application Circuit and Block Diagram 0.1µF 0.22µF RIGHT 1 AUDIO 0.22µF VDD IN1R OUTR+ MUX/MIXER IN2R BLT OUTR- RIGHT 2 AUDIO 0.22µF IN1L LEFT 1 AUDIO OUTL+ 0.22µF LEFT 2 AUDIO MUX/MIXER IN2L BLT OUTL- CLICK AND POP THERMAL PROTECTION BIAS REF SD MICRO CONTROLLER INS CREF 1µF LOGIC CONTROL MIX GND 7 FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 Detailed Description The Intersil ISL54000, ISL54001, ISL54002 family of devices are integrated audio power amplifier systems designed to drive 8 speaker loads. They can operate with a supply voltage of +2.7V to +5V and provide good quality audio, while requiring minimal external components. Its low 0.4% THD+N while driving 800mW into an 8 speaker ensures clean, low distortion amplification of the audio signals. The devices are offered in a 20 Ld 4x4 TQFN package. Targeted applications include handheld equipment such as cell-phones, MP3 players, and games/toys. The ISL54000, ISL54001, ISL54002 parts contain two class AB bridge-tied (BTL) type power amplifiers for driving stereo 8 speakers. When powered with a 5V supply, each BTL is capable of delivering 941mW (typ) of continuous average power to an 8speaker load with 1% THD+N performance. When the speaker load is connected across the positive and negative terminals of the BTL driver, the voltage is doubled across the load and the power is quadrupled. The ISL54001 and ISL54002 feature a 2:1 stereo input multiplexer front-end. This allows selection between two stereo sources. The INS control pin determines which stereo input is active. Applying a logic “0” to the INS control pin selects stereo input 1 (R1 and L1). Applying a logic “1” to the INS control pin selects stereo input 2 (R2 and L2). The ISL54002 has the capability of mixing the two stereo inputs. When in MIX Mode (MIX = “1”) the ISL54002 mixes the R1 input with the R2 input and sends the combined signal to the OUTR_ BTL driver and it mixes the L1 input with the L2 input and sends the combined signal to the OUTL_ BTL driver. All devices in this family feature low power shutdown, thermal overload protection and click/pop suppression. The click and pop circuitry prohibits switching between input channels until the audio input signals are at their lowest point, which eliminates audible transients in the speakers when changing audio input sources. The click/pop circuitry also keeps speaker transients to an inaudibile level when entering and leaving shutdown. Typical application circuits and block diagrams for each device in the family are on page 6 and 7. DC Bias Voltage required to calculate the capacitor value is shown in Equation 1: C 1 6.28 f 100k (EQ. 1) The 100k is the impedance looking into the input of the ISL54000, ISL54001, and ISL54002 devices. BTL Speaker Amplifiers The ISL54000, ISL54001, and ISL54002 contain two bridge-tied load (BTL) amplifiers designed to drive a speaker load differentially. The output from one BTL is OUTL+ and OUTL-. The output of the other BTL is OUTR+ and OUTR-. A single BTL driver consists of inverting and non-inverting power op amps. The AC signal out of each op amp are equal in magnitude but 180° out-of-phase, so the AC signal at OUTL+ and OUTL- have the same amplitude but are 180° out-of-phase. The same is true of OUTR+ and OUTR-. The speaker load gets connected between the + terminal and - terminal outputs. Driving the load differentially using a BTL configuration doubles the output voltage across the speaker load and quadruples the power to the load. In effect you get a gain of two due to this configuration at the load as compared to driving the load with a single-ended amplifier with its load connected between a single amplifier’s output and ground. The outputs of each BTL are biased at VDD/2. When the load gets connected across the + and - terminal of the BTL, the mid supply DC bias voltage at each output gets cancelled out eliminating the need for large bulky output coupling capacitors. Low Power Shutdown With a logic “1” at the SD control pin the device enters the low power shutdown state. When in shutdown the output amplifiers go into an high impedance state and supply current is reduced to 26µA (typ). In shutdown mode before the amplifiers enter the high impedance/low current drive state, the bias voltage of VDD/2 remains connected at the output through a 100k resistor. This resistor is not present during active operation of the drivers but gets switched in when the SD pin goes high and disconnected when the SD pin goes low. The ISL54000, ISL54001, ISL54002 have internal DC bias circuitry, which DC offsets the incoming audio signal at VDD/2. When using a 5V supply, the DC offset will be 2.5V. When using a 3.6V supply, the DC offset will be 1.8V. Leaving the DC bias voltage connected through this 100k resistor reduces the transient that is generated across the speaker, while going into or out of shutdown, to a level that does not produce clicking or popping in the speaker. Since the signal gets biased internally at VDD/2, the audio signals need to be AC coupled to the inputs of the device. The value of the AC coupling capacitor depends on the low frequency range required for the application. A capacitor of 0.22µF will pass a signal as low as 7.2Hz. The formula QFN Thermal Pad Considerations 8 The QFN package features an exposed thermal pad on its underside. This pad lowers the package’s thermal resistance by providing a direct heat conduction path from the die to the PCB. Connect the exposed thermal pad to GND by using a FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 large copper pad and multiple vias to the GND plane. The vias should be plugged and tented with plating and solder mask to ensure good thermal conductivity. Best thermal performance is achieved with the largest practical copper ground plane area. PCB Layout Considersations and Power Supply Bypassing To maintain the highest load dissipation and widest output voltage swing the power supply PCB traces and the traces that connect the output of the drivers to the speaker loads should be made as wide as possible to minimize losses due to parasitic trace resistance. Proper supply bypassing is necessary for high power supply rejection and low noise performance. A filter network consisting of a 10µF capacitor in parallel with a 0.1µF capacitor is recommended at the voltage regulator that is providing the power to the ISL54000, ISL54001, and ISL54002 IC. Local bypass capacitors of 0.1µF should be put at each VDD pin of the ISL54000, ISL54001, ISL54002 devices. They should be located as close as possible to the pin, keeping the length of leads and traces as short as possible. A 1µF capacitor from the REF pin (pin 10) to GND is needed for optimum PSRR and internal bias voltage stability. 1.0 0.9 VDD = 5V 0.8 BTL 0.7 RL = 8 PO = 800mW 0.6 1.0 0.9 VDD = 3.6V 0.8 BTL 0.7 RL = 8 0.6 PO = 200mW 0.5 0.5 THD+N (%) THD+N (%) Typical Performance Curves TA = +25°C, Unless Otherwise Specified. 0.4 0.3 0.2 0.1 0.4 0.3 0.2 20 50 100 200 500 1k 2k FREQUENCY (Hz) 5k 0.1 10k 20k 20 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FIGURE 1. THD+N vs FREQUENCY FIGURE 2. THD+N vs FREQUENCY 10.0 10.0 VDD = 5V 5.00 BTL RL = 8 2.00 f = 1kHz VDD = 3.6V 5.00 BTL RL = 8 2.00 f = 1kHz 1.00 1.00 THD+N (%) THD+N (%) 50 0.50 0.20 0.50 0.20 0.10 0.10 0.05 0.05 0.02 0.02 0.01 10m 20m 50m 100m 200m 500m OUTPUT POWER (W) FIGURE 3. THD+N vs OUTPUT POWER 9 1 0.01 10m 20m 40m 70m 100m 200m 600m OUTPUT POWER (W) FIGURE 4. THD+N vs OUTPUT POWER FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 -40 V = 5V -45 DD PO = 800mW -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 -105 -110 -115 -120 20 50 100 OFFISOLATION (dB) CROSSTALK (dB) Typical Performance Curves TA = +25°C, Unless Otherwise Specified. (Continued) RCH TO LCH LCH TO RCH VDD = 5V PO = 800mW 200 500 1k 2k 5k -80 -85 -90 -95 -100 -105 -110 -115 -120 -125 -130 -135 -140 -145 -150 -155 -160 20 10k 20k 50 100 POWER DISSIPATION (mW) 1k 2k 5k 10k 20k 700 VDD = 5V BTL 600 RL = 8 500 400 300 200 100 2k 5k 10k 20k FIGURE 7. PSRR vs FREQUENCY 400 500 FIGURE 6. OFFISOLATION vs FREQUENCY POWER DISSIPATION (mW) PSRR (dB) FIGURE 5. CROSSTALK vs FREQUENCY -20 -22 VDD = 5V -24 -26 BTL -28 VRIPPLE = 200mVP-P -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 -56 -58 -60 -62 -64 -66 -68 -70 10 20 50 100 200 500 1k FREQUENCY (Hz) 200 FREQUENCY (Hz) FREQUENCY (Hz) 0 0 250 500 POUT (mW) 750 1000 FIGURE 8. POWER DISSIPATION vs OUTPUT POWER Die Characteristics VDD = 3.6V SUBSTRATE POTENTIAL (POWERED UP): 350 BTL RL = 8 GND 300 PROCESS: 250 Submicron CMOS 200 150 100 50 0 0 100 200 300 POUT (mW) 400 500 FIGURE 9. POWER DISSIPATION vs OUTPUT POWER 10 FN6458.2 October 17, 2007 ISL54000, ISL54001, ISL54002 Thin Quad Flat No-Lead Plastic Package (TQFN) Thin Micro Lead FramePlastic Package (TMLFP) L20.4x4A 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220WGGD-1 ISSUE I) MILLIMETERS SYMBOL MIN NOMINAL MAX NOTES A 0.70 0.75 0.80 - A1 - 0.02 0.05 - A2 - 0.55 0.80 9 A3 b 0.20 REF 0.18 D 0.30 5, 8 4.00 BSC D1 D2 0.25 9 - 3.75 BSC 1.95 2.10 9 2.25 7, 8 E 4.00 BSC - E1 3.75 BSC 9 E2 1.95 e 2.10 2.25 7, 8 0.50 BSC - k 0.20 - - - L 0.35 0.60 0.75 8 N 20 2 Nd 5 3 Ne 5 3 P - - 0.60 - - 12 9 9 Rev. 0 11/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on each D and E. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & are present when Anvil singulation method is used and not present for saw singulation. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 FN6458.2 October 17, 2007