DF N1 01 0B -6 PQMH13 NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 4 November 2015 Product data sheet 1. General description NPN/NPN Resistor-Equipped Transistors (RET) in a leadless ultra small DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package. NPN/PNP complement: PQMD13. 2. Features and benefits • • • • • • • 100 mA output current capability Built-in bias resistors Simplifies circuit design Low package height of 0.37 mm Reduces component count Reduces pick and place costs AEC-Q101 qualified 3. Applications • • • • Low current peripheral driver Control of IC inputs Replaces general-purpose transistors in digital applications Mobile applications 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 50 V IO output current - - 100 mA [1] 3.3 4.7 6.1 kΩ [1] 8 10 12 Per transistor Per transistor R1 bias resistor 1 R2/R1 bias resistor ratio [1] Tamb = 25 °C See section "Test information" for resistor calculation and test conditions. Scan or click this QR code to view the latest information for this product PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 GND1 Simplified outline Graphic symbol GND (emitter) TR1 O1 1 2 I1 input ( base) TR1 3 O2 output (collector) TR2 4 GND2 GND (emitter) TR2 5 I2 input ( base) TR2 6 O1 output (collector) TR1 Transparent top view 7 O1 output (collector) TR1 DFN1010B-6 (SOT1216) 8 O2 output (collector) TR2 7 2 3 R1 5 8 I2 GND2 6 4 R2 TR2 TR1 R2 GND1 R1 I1 O2 aaa-019894 6. Ordering information Table 3. Ordering information Type number PQMH13 PQMH13 Product data sheet Package Name Description Version DFN1010B-6 DFN1010B-6: plastic thermal enhanced ultra thin small outline package; no leads; 6 terminals SOT1216 All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 2 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 7. Marking Table 4. Marking codes Type number Marking code PQMH13 A 100 MARKING CODE (EXAMPLE) READING DIRECTION MARK-FREE AREA PIN 1 INDICATION MARK READING EXAMPLE: YEAR DATE CODE A 110 VENDOR CODE Fig. 1. aaa-019766 DFN1010B-6 (SOT1216) binary marking code description PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 3 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 5 V VI input voltage positive - 30 V negative - -5 V Per transistor IO output current - 100 mA ICM peak collector current - 100 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 230 mW Ptot total power dissipation Tamb ≤ 25 °C [1] - 350 mW Tj junction temperature - 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C Per device [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. aaa-007377 400 Ptot (mW) 300 200 100 0 -75 -25 25 75 125 175 Tamb (°C) FR4 PCB, standard footprint Fig. 2. Per device: Power derating curve PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 4 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air thermal resistance from junction to ambient in free air Min Typ Max Unit [1] - - 543 K/W [1] - - 357 K/W Per transistor Rth(j-a) Per device Rth(j-a) [1] 103 Zth(j-a) (K/W) Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. aaa-007378 duty cycle = 0.75 1 0.5 0.33 0.2 102 0.1 0.05 10 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 5 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current (emitter open) VCB = 50 V; IE = 0 A; Tamb = 25 °C - - 100 nA ICEO collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C current (base open) VCE = 30 V; IB = 0 A; Tamb = 150 °C - - 1 µA - - 5 µA IEBO emitter-base cut-off VEB = 5 V; IC = 0 A; Tamb = 25 °C current (collector open) - - 170 µA hFE DC current gain VCE = 5 V; IC = 10 mA; Tamb = 25 °C 100 - - VCEsat collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA; Tamb = 25 °C - - 100 mV VI(off) off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C - 0.6 0.5 V VI(on) on-state input voltage VCE = 0.3 V; IC = 5 mA; Tamb = 25 °C 1.3 0.9 - V R1 bias resistor 1 Tamb = 25 °C [1] 3.3 4.7 6.1 kΩ R2/R1 bias resistor ratio [1] 8 10 12 CC collector capacitance - - 2.5 pF - 230 - MHz Per transistor VCB = 10 V; IE = 0 A; f = 1 MHz; Tamb = 25 °C fT transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz; [2] Tamb = 25 °C [1] [2] PQMH13 Product data sheet See section "Test information" for resistor calculation and test conditions. Characteristics of built-in transistor All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 6 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 006aac819 103 aaa-018581 0.1 IC (A) hFE (1) 0.63 mA 0.56 mA 0.70 mA 0.08 (2) 0.49 mA 0.42 mA (3) 102 0.35 mA 0.06 0.28 mA 0.21 mA 0.04 10 0.14 mA 0.02 IB = 0.07 mA 1 10-1 1 10 IC (mA) 0 102 VCE = 5 V 1 2 3 4 VCE (V) 5 Tamb = 25 °C (1) Tamb = 100 °C Fig. 5. (2) Tamb = 25 °C Collector current as a function of collectoremitter voltage; typical values (3) Tamb = -40 °C Fig. 4. 0 DC current gain as a function of collector current; typical values aaa-018585 1 006aac821 10 VCEsat (V) VI(on) (V) (1) 10-1 1 (2) (3) (1) (2) (3) 10-2 10-1 Fig. 6. 1 10 IC (mA) 10-1 10-1 102 1 IC/IB = 20 VCE = 0.3 V (1) Tamb = 100 °C (1) Tamb = -40 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = -40 °C (3) Tamb = 100 °C Collector-emitter saturation voltage as a function of collector current; typical values PQMH13 Product data sheet Fig. 7. IC (mA) 102 On-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. 4 November 2015 10 © NXP Semiconductors N.V. 2015. All rights reserved 7 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 006aac822 10 006aac823 3 Cc (pF) VI(off) (V) 2 1 (1) (2) (3) 10-1 10-1 1 1 IC (mA) 0 10 VCE = 5 V 10 20 30 40 50 VCB (V) f = 1 MHz; Tamb = 25 °C (1) Tamb = -40 °C Fig. 9. (2) Tamb = 25 °C (3) Tamb = 100 °C Fig. 8. 0 Collector capacitance as a function of collectorbase voltage; typical values Off-state input voltage as a function of collector current; typical values 006aac757 103 fT (MHz) 102 10 10-1 1 10 IC (mA) 102 VCE = 5 V; Tamb = 25 °C Fig. 10. Transition frequency as a function of collector current; typical values of built-in transistor 11. Test information 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 8 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 11.2 Resistor calculation • Calculation of bias resistor 1 (R1) • Calculation of bias resistor ratio (R2/R1) n.c. II1; II2 R1 II3; II4 R2 GND aaa-020082 Fig. 11. Per transistor: Resistor test circuit 11.3 Resistor test conditions Table 8. Resistor test conditions R1 (kΩ) R2 (kΩ) 4.7 Test conditions 47 II1 II2 II3 II4 90 μA 140 μA -55 μA -105 μA 12. Package outline 0.35 0.35 0.15 0.23 1 3 0.125 0.205 0.22 0.30 0.95 1.05 6 0.04 max 2 0.34 0.40 Dimensions in mm 5 4 0.32 0.40 0.275 0.275 1.05 1.15 13-03-05 Fig. 12. Package outline DFN1010B-6 (SOT1216) PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 9 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 13. Soldering Footprint information for reflow soldering of DFN1010B-6 package SOT1216 0.9 0.35 0.35 0.15 0.2 (6x) 0.15 1.3 1.2 0.35 0.25 0.5 0.6 0.35 0.25 1.1 0.3 (6x) 1 1.35 solder land solder land plus solder paste occupied area solder resist Dimensions in mm Issue date 13-03-06 14-07-28 sot1216_fr Fig. 13. Reflow soldering footprint for DFN1010B-6 (SOT1216) PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 10 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ 14. Revision history Table 9. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PQMH13 v.1 20151104 Product data sheet - - PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 11 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 15. 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Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 12 / 14 PQMH13 NXP Semiconductors NPN/NPN resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 3 8 Limiting values .......................................................4 9 Thermal characteristics .........................................5 10 Characteristics ....................................................... 6 11 11.1 11.2 11.3 Test information ..................................................... 8 Quality information ............................................... 8 Resistor calculation .............................................. 9 Resistor test conditions ........................................ 9 12 Package outline ..................................................... 9 13 Soldering .............................................................. 10 14 Revision history ................................................... 11 15 15.1 15.2 15.3 15.4 Legal information .................................................12 Data sheet status ............................................... 12 Definitions ...........................................................12 Disclaimers .........................................................12 Trademarks ........................................................ 13 © NXP Semiconductors N.V. 2015. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 4 November 2015 PQMH13 Product data sheet All information provided in this document is subject to legal disclaimers. 4 November 2015 © NXP Semiconductors N.V. 2015. All rights reserved 14 / 14