ISL55015 ® Data Sheet December 13, 2006 FN6284.0 MMIC Silicon Bipolar Broadband Amplifier Features The ISL55015 is a high performance gain block featuring a Darlington configuration using high fT transistors and excellent thermal performance. They are an ideal choice for DVB-S LNB cable receiver applications. • Input impedance of 75Ω Other members of the family includes: • Noise figure of 4.8dB @2GHz ISL55012 and ISL55015 match a 75Ω source to a 50Ω load. ISL55013 and ISL55014 match a 50Ω source to a 50Ω load. • OIP3 of 31dBm @1GHz Ordering Information • Pb-free plus anneal available (RoHS compliant) PART NUMBER (Note) • Output impedance of 50Ω • Gain of 13.5dB @1GHz • Low input and output return losses Applications PART MARKING ISL55015IEZ-T7 CCK TAPE & REEL PACKAGE (Pb-Free) PKG. DWG. # • LNB and LNB-T (HDTV) amplifiers 7” (3k pcs) 6 Ld SC-70 P6.049A • IF gain blocks for satellite and terrestrial STBs NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. • PA driver amplifier Typical Application Circuit Pinout • Wireless data, satellite • Bluetooth/WiFi • Satellite locator and signal strength meters (6 LD SC-70) TOP VIEW +5V 24Ω 0.1µF 100pF 100pF 3 4 6 68pF 100nH GND 1 6 OUT GND 2 5 GND IN 3 4 VSP 0.1µF 68pF 1, 2, 5 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL55015 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage from VSP to GND . . . . . . . . . . . . . . . . . . . . . . . . 6V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to GND -0.3V Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . .6000V Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V Thermal Resistance (Typical) θJA (°C/W) 6 Lead SC-70 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Electrical Specifications PARAMETER VSP = +5V, ZRSC = ZLOAD = 50Ω, TA = +25°C, 24Ω VSP to OUT, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 5.5 V Vsp Supply Voltage To operate below 5V, the 24Ω resistor to supply should be reduced 3.0 Gt Small Signal Gain 1.0GHz 12.3 13.5 14.8 dB 1.5GHz 11.7 13.3 14.2 dB 2.0GHz 11 12.4 13.5 dB 1.0GHz 16.3 18.1 19.8 dBm 2.0GHz 15.2 17.4 19.2 dBm P1dB OIP3 Output Power at 1dB Compression Output Third Order Intercept Point 1.0GHz 31.3 dBm 2.0GHz 28.4 dBm OIP2 Output Second Order Intercept Point Input tones at 1.0GHz and 1.1GHz, at Power = 15dBm, Output tone 2.1GHz 47 dBm BW 3dB Bandwidth 3dB below Gain @ 500MHz 2.9 GHz IRL Input Return Loss 1.0GHz ZRSC = 75Ω, ZLOAD = 50Ω 20.2 dB ORL Output Return Loss 1.0GHz ZRSC = 75Ω, ZLOAD = 50Ω 21.4 dB RISOL Reverse Isolation 2.0GHz 18.9 dB NF Noise Figure 2.0GHz 4.8 dB ID Device Operating Current 2 54 62.5 69 mA FN6284.0 December 13, 2006 ISL55015 Device Test Setup AGILENT _8753ES VNA 50Ω 50Ω CONNECTORLESS PLATFORM PIN 3 50Ω DC BLOCK PICOSECOND LABS MODEL 5542 PIN 6 50Ω DUT BIAS TEE 5V PICOSECOND LABS MODEL 5508-110 24Ω I1 I2 IDEVICE OUTPUT REFERENCE PLANE INPUT REFERENCE PLANE 5V POWER SUPPLY 25 25 20 20 15 15 ORL (dB) IRL (dB) Typical Performance Curves ZRSC = 75Ω, ZLOAD = 50Ω 10 10 5 5 0 0.5 1.0 1.5 2.0 FREQUENCY (GHz) 2.5 0 3.0 0.5 1.0 1.5 2.0 FREQUENCY (GHz) 2.5 3.0 FIGURE 2. OUTPUT RETURN LOSS vs FREQUENCY FIGURE 1. INPUT RETURN LOSS vs FREQUENCY Typical Performance Curves 50Ω ENVIRONMENT 16 0 -2 -4 S11 (dB) S21 (dB) 14 12 -6 -8 -10 -12 10 0.5 1.0 1.5 2.0 FREQUENCY (GHz) 2.5 FIGURE 3. |S21| vs FREQUENCY 3 3.0 -14 0.5 1.0 1.5 2.0 FREQUENCY (GHz) 2.5 3.0 FIGURE 4. |S11| vs FREQUENCY FN6284.0 December 13, 2006 ISL55015 Typical Performance Curves 50Ω ENVIRONMENT (Continued) -8 -16 -10 -20 S22 (dB) S12 (dB) -18 -22 -24 -12 -14 -26 -28 0.5 1.0 1.5 2.0 2.5 -16 3.0 0.5 1.0 1.5 FIGURE 5. |S12| vs FREQUENCY 20 32 10 HD (dBm) OIP3 (dBm) 28 26 24 -10 FUNDAMENTAL (1GHz) -20 -30 -40 IM2 (2.1 GHz) -50 22 -60 1.0 1.5 2.0 2.5 3.0 -70 -25 -20 FREQUENCY (GHz) 1dB OUTPUT COMPRESSION POINT (dBm) 6 5 4 3 2 1 1.5 2.0 2.5 FREQUENCY (GHz) FIGURE 9. NOISE FIGURE vs FREQUENCY 4 -10 -5 0 FIGURE 8. IM2 vs INPUT POWER 7 1.0 -15 INPUT POWER (dBm) FIGURE 7. OIP3 vs FREQUENCY NOISE FIGURE (dB) 3.0 0 30 0 0.5 2.5 FIGURE 6. |S22| vs FREQUENCY 34 20 0.5 2.0 FREQUENCY (GHz) FREQUENCY (GHz) 3.0 20 19 18 17 16 15 14 13 12 11 10 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz) FIGURE 10. P1dB vs FREQUENCY FN6284.0 December 13, 2006 ISL55015 1.8 0.6 1.6 0.7 1.4 1.2 0.8 0.9 1.0 Typical Performance Curves 50Ω ENVIRONMENT (Continued) 0.5 2.0 0.2 0.4 3.0 0.4 0.6 0.3 0.8 4.0 1.0 1.0 5.0 0.2 6.0 0.8 7.0 0.6 8.0 9.0 10 0.1 0.4 20 50 20 10 5.0 4.0 3.0 2.0 1.8 1.6 1.4 1.2 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0 50 50 0.1 0.2 0.5 GHz 0.5 GHz 1.0 0.2 3 GHz 20 0.4 1.0 2.2 2.2 0.6 7.0 0.8 6.0 1.0 S11 5.0 S22 0.2 8.0 9.0 10 0.1 1.0 4.0 0.8 3 GHz 0.3 3.0 0.6 0.4 1.8 2.0 0.5 0.4 1.2 1.0 0.8 0.9 1.4 0.7 1.6 0.6 0.2 RF Café 2002 FIGURE 11. S11 AND S22 vs FREQUENCY 5 FN6284.0 December 13, 2006 ISL55015 Small Outline Transistor Plastic Packages (SC70-6) 0.20 (0.008) M VIEW C C P6.049A CL 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE e b 6 INCHES 5 4 CL CL E1 E 1 2 3 e1 C D CL SYMBOL MIN MAX MIN MAX NOTES A 0.031 0.039 0.80 1.00 - A1 0.001 0.004 0.025 0.10 - A2 0.034 0.036 0.85 0.90 - b 0.006 0.012 0.15 0.30 - b1 0.006 0.010 0.15 0.25 - c 0.004 0.008 0.10 0.20 6 c1 0.004 0.006 0.10 0.15 6 D 0.073 0.085 1.85 2.15 3 E E1 A A2 A1 SEATING PLANE e -C- e1 L 0.10 (0.004) C MILLIMETERS 0.084 BSC 0.045 0.053 2.1 BSC 1.15 0.0256 Ref 0.018 1.35 - 1.30 Ref 0.26 - 0.46 0.016 Ref. 0.400 Ref. - L2 0.006 BSC 0.15 BSC - WITH N PLATING b1 R 0.004 - 0.10 - α 0o 8o 0o 8o c1 4 L1 b c 3 0.65 Ref 0.0512 Ref 0.010 - 6 6 5 Rev. 0 7/05 NOTES: BASE METAL 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC70 and JEDEC MO203AB. 4X θ1 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength L measured at reference to gauge plane. R1 5. “N” is the number of terminal positions. R GAUGE PLANE SEATING PLANE L C L1 α 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only L2 4X θ1 VIEW C All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 6 FN6284.0 December 13, 2006