TSM650N15CR_A1603.pdf

TSM650N15CR
Taiwan Semiconductor
N-Channel Power MOSFET
150V, 24A, 65mΩ
FEATURES
KEY PERFORMANCE PARAMETERS
● Low RDS(ON) to minimize conductive losses
PARAMETER
VALUE
UNIT
VDS
150
V
● Low gate charge for fast power switching
● 100% UIS and Rg tested
● Compliant to RoHS directive 2011/65/EU and in
accordance to WEEE 2002/96/EC
● Halogen-free according to IEC 61249-2-21
RDS(on)
VGS = 10V
65
(max)
VGS = 6V
80
mΩ
Qg
24
nC
APPLICATIONS
● PoE
● LED Lighting
● Telecom Power
PDFN56
Note: MSL 3 (Moisture Sensitivity Level) per J-STD-020
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
TC = 25°C
Continuous Drain Current
Pulsed Drain Current
(Note 1)
(Note 2)
Single Pulse Avalanche Current
(Note 2)
Single Pulse Avalanche Energy
Total Power Dissipation
LIMIT
UNIT
VDS
150
V
VGS
±25
V
ID
TA = 25°C
Total Power Dissipation
SYMBOL
TC = 25°C
TC = 125°C
TA = 25°C
TA = 125°C
Operating Junction and Storage Temperature Range
24
4
A
IDM
96
A
IAS
EAS
18
49
A
mJ
PD
PD
96
19
2.6
0.5
W
W
TJ, TSTG
- 55 to +150
°C
SYMBOL
LIMIT
UNIT
Junction to Case Thermal Resistance
RӨJC
1.3
°C/W
Junction to Ambient Thermal Resistance
RӨJA
48
°C/W
THERMAL PERFORMANCE
PARAMETER
Thermal Performance Note: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The casethermal reference is defined at the solder mounting surface of the drain pins. R ӨJA is guaranteed by design while RӨCA is
determined by the user’s board design.
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Version: A1603
TSM650N15CR
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted)
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNIT
Static
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
BVDSS
150
--
--
V
Gate Threshold Voltage
VGS = VDS, ID = 250µA
VGS(TH)
2
2.7
4
V
Gate-Source Leakage Current
VGS = ±25V, VDS = 0V
IGSS
--
--
±100
nA
--
--
1
--
--
100
--
47
65
--
55
80
gfs
--
11
--
Qg
--
36
--
Qg
--
24
--
Qgs
--
10
--
Qgd
--
12
--
Ciss
--
1829
--
Coss
--
94
--
Crss
--
65
--
Rg
0.5
1.5
3
td(on)
--
9.4
--
tr
--
6.4
--
td(off)
--
19.4
--
tf
--
4.8
--
VSD
--
--
1
V
VGS = 0V, VDS = 150V
Drain-Source Leakage Current
IDSS
VGS = 0V, VDS = 150V
TJ = 125°C
Drain-Source On-State Resistance
VGS = 10V, ID = 4A
(Note 3)
VGS = 6V, ID = 4A
Forward Transconductance
Dynamic
(Note 3)
RDS(on)
VDS = 5V, ID = 4A
µA
mΩ
S
(Note 4)
VGS = 10V, VDS = 75V,
Total Gate Charge
ID = 4A
Total Gate Charge
VGS = 6V, VDS = 75V,
Gate-Source Charge
ID = 4A
Gate-Drain Charge
Input Capacitance
VGS = 0V, VDS = 75V
Output Capacitance
f = 1.0MHz
Reverse Transfer Capacitance
Gate Resistance
Switching
f = 1.0MHz, open drain
nC
pF
Ω
(Note 4)
Turn-On Delay Time
Turn-On Rise Time
VGS = 10V, VDS = 75V,
Turn-Off Delay Time
ID = 4A, RG = 2Ω,
Turn-Off Fall Time
ns
Source-Drain Diode
Forward Voltage
(Note 3)
VGS = 0V, IS = 4A
Reverse Recovery Time
IS = 4A ,
trr
--
51
--
ns
Reverse Recovery Charge
dI/dt = 100A/μs
Qrr
--
105
--
nC
Notes:
1.
Current limited by package.
2.
L = 0.3mH, VGS = 10V, VDD = 50V, RG = 25Ω, IAS = 18A, Starting TJ = 25°C
3.
Pulse test: Pulse Width ≤ 300µs, duty cycle ≤ 2%.
4.
Switching time is essentially independent of operating temperature.
ORDERING INFORMATION
PART NO.
TSM650N15CR RLG
PACKAGE
PACKING
PDFN56
2,500pcs / 13” Reel
2
Version: A1603
TSM650N15CR
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TA = 25°C unless otherwise noted)
Transfer Characteristics
30
VGS=10V
VGS=9V
VGS=8V
VGS=7V
VGS=6V
24
ID, Continuous Drain Current (A)
ID, Continuous Drain Current (A)
Output Characteristics
30
VGS=5.5V
18
12
VGS=5V
6
VGS=4.5V
0
24
18
25℃
12
6
150℃
0
0
1
2
3
4
5
0
1
On-Resistance vs. Drain Current
3
4
5
6
7
8
Gate-Source Voltage vs. Gate Charge
10
0.1
VGS, Gate to Source Voltage (V)
RDS(ON), Drain-Source On-Resistance (Ω)
2
VGS, Gate to Source Voltage (V)
VDS, Drain to Source Voltage (V)
0.09
0.08
0.07
VGS=6V
0.06
0.05
VGS=10V
0.04
0.03
0.02
VDS=75V
ID=4A
8
6
4
2
0
0
6
12
18
24
30
0
10
ID, Drain Current (A)
RDS(on), Drain-Source On-Resistance (Ω)
VGS=10V
ID=4A
2
1.5
1
0.5
0
-75
-50
-25
0
25
50
75
30
40
On-Resistance vs. Gate-Source Voltage
3
2.5
20
Qg, Gate Charge (nC)
On-Resistance vs. Junction Temperature
RDS(on), Drain-Source On-Resistance
(Normalized)
-55℃
100 125 150
0.1
0.09
0.08
0.07
0.06
ID=4A
0.05
0.04
0.03
0.02
5
6
7
8
9
10
VGS, Gate to Source Voltage (V)
TJ, Junction Temperature (°C)
3
Version: A1603
TSM650N15CR
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TA = 25°C unless otherwise noted)
BVDSS vs. Junction Temperature
Capacitance vs. Drain-Source Voltage
BVDSS (Normalized)
Drain-Source Breakdown Voltage
C, Capacitance (pF)
3000
2500
2000
CISS
1500
1000
500
CRSS
COSS
0
1.2
ID=1mA
1.1
1
0.9
0.8
0
25
50
75
100
125
150
-75
VDS, Drain to Source Voltage (V)
-50
-25
0
25
50
75
100 125 150
TJ, Junction Temperature (°C)
Maximum Safe Operating Area, Junction-to-Case
Source-Drain Diode Forward Current vs. Voltage
ID, Drain Current (A)
IS, Reverse Drain Current (A)
100
100
RDS(ON)
100us
10
1ms
1
10ms
DC
SINGLE PULSE
RӨJC=1.3°C/W
TC=25°C
150℃
10
25℃
-55℃
1
0.1
0.1
1
10
0.2
100
VDS, Drain to Source Voltage (V)
0.4
0.6
0.8
1
1.2
VSD, Body Diode Forward Voltage (V)
Normalized Thermal Transient Impedance, Junction-to-Case
Normalized Effective Transient
Thermal Impedance, ZӨJC
10
SINGLE PULSE
RӨJC=1.3°C/W
1
Duty=0.5
Duty=0.2
Duty=0.1
Duty=0.05
Duty=0.02
Duty=0.01
Single
0.1
0.01
0.0001
0.001
Notes:
Duty = t1 / t2
TJ = TC + PDM x ZӨJC x RӨJC
0.01
0.1
1
t, Square Wave Pulse Duration (sec)
4
Version: A1603
TSM650N15CR
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
PDFN56
SUGGESTED PAD LAYOUT (Unit: Millimeters)
MARKING DIAGRAM
TSC
650N15
GYWWF
G
Y
WW
F
= Halogen Free
= Year Code
= Week Code (01~52)
= Factory Code
5
Version: A1603
TSM650N15CR
Taiwan Semiconductor
Notice
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assumes no responsibility or liability for any errors or inaccuracies.
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Customers using or selling these products for use in such applications do so at their own risk and agree to fully
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Version: A1603