LTC3128 3A Monolithic Buck-Boost Supercapacitor Charger and Balancer with Accurate Input Current Limit FEATURES DESCRIPTION ±2% Accurate Average Input Current Limit Programmable Up to 3A n Programmable Maximum Capacitor Voltage Limit n Active Charge Balancing for Fast Charging of Unmatched Capacitors n Charges Single or Stacked Capacitors n V Range: 1.73V to 5.5V IN n V OUT Range: 1.8V to 5.5V n <2µA Quiescent Current from V OUT When Charged n Output Disconnect in Shutdown: <1µA I Shutdown Q n Power-Good Comparator n Power Failure Indicator n Thermally Enhanced 20-Lead (4mm × 5mm × 0.75mm) QFN and 24-Lead TSSOP Packages The LTC®3128 is a highly efficient, buck-boost DC/DC supercapacitor charger. It operates efficiently from input voltages above, below or equal to the output voltage. The LTC3128 incorporates accurate programmable average input current limit, active charge balancing and programmable maximum capacitor voltage. This combination of features makes the LTC3128 ideal for safely charging and protecting large capacitors in backup power systems. The input current limit and maximum capacitor voltage are each programmed using a single resistor. Average input current is accurately controlled over a 0.5A to 3A programmable range while the individual maximum capacitor voltage can be set from 1.8V to 3.0V. n Other features of the LTC3128 include <2µA quiescent current from VOUT in Burst Mode®operation, accurate power-good and power failure indicators, and thermal overload protection. The LTC3128 is offered in low profile, thermally enhanced 20-Lead 4mm × 5mm × 0.75mm QFN and 24-Lead TSSOP packages. APPLICATIONS n n n n Supercapacitor Based Backup Power Memory Backup Servers, RAID, RF Systems Industrial, Communications, Computing L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Wide VIN (3A Programmed Input Current) to 4.2V Stacked Output Capacitors Charging Waveform 3.3µH SW1 1.7V TO 5.5V UP TO 3.0A 10µF 10µF SW2 VOUT = 4.2V RSENP VOUTP RSENS VOUTS LTC3128 VIN MID RUN PFI FB PFO PGOOD MAXV PROG GND 127k 1.87M C1a 940mF C1b 940mF 470pF 3.57k VOUT 2.0V/DIV C1 MID 2.0V/DIV IIN 2.0A/DIV ILOAD 2.0A/DIV 301k 3128 TA01 2 SECONDS/DIV 3128 TA01b C1: Murata DMF3Z5R5H474M3DTA0 3128f For more information www.linear.com/LTC3128 1 LTC3128 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN, RSENP, VOUTP, MID Voltage................... –0.3V to 6V RSENS, VOUTS Voltage.................................. –0.3V to 6V RSENS DC Current.....................................................–4A SW1, SW2 DC Voltage.................................. –0.3V to 6V SW1, SW2 Pulsed (<100ns) Voltage..............–1.0V to 7V PGOOD, PFO, RUN Voltage........................... –0.3V to 6V PROG, MAXV, FB, PFI Voltage...................... –0.3V to 6V PGOOD, PFO DC Current.........................................15mA Operating Junction Temperature Range (Notes 2, 4)............................................. –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) FE Only.............................................................. 300°C PIN CONFIGURATION TOP VIEW GND 2 23 SW2 20 19 18 17 GND 3 22 NC 16 VOUTP SW1 4 21 VOUTP 15 VOUTP RSENP 5 20 VOUTP 14 VOUTS RSENS 6 RUN 7 PROG 8 17 PGOOD NC 9 16 FB SW2 24 SW2 SW1 1 NC SW1 SW2 TOP VIEW SW1 1 RSENP 2 RSENS 3 21 GND RUN 4 13 MID 12 PGOOD PROG 5 9 10 MAXV 8 PFI 7 VIN 11 FB PFO NC 6 UFD PACKAGE 20-LEAD (4mm × 5mm) PLASTIC QFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB (NOTE 5) 25 GND 19 VOUTS 18 MID NC 10 15 MAXV VIN 11 14 PFI GND 12 13 PFO FE PACKAGE 24-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 38°C/W EXPOSED PAD (PIN 25) SHOULD BE SOLDERED TO PCB (NOTE 5) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3128EUFD#PBF LTC3128EUFD#TRPBF 3128 20-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LTC3128IUFD#PBF LTC3128IUFD#TRPBF 3128 20-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LTC3128EFE#PBF LTC3128EFE#TRPBF LTC3128FE 24-Lead Plastic TSSOP –40°C to 125°C LTC3128IFE#PBF LTC3128IFE#TRPBF LTC3128FE 24-Lead Plastic TSSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3128f 2 For more information www.linear.com/LTC3128 LTC3128 ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 3.3V, VOUT = 4.8V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP 1.73 Input Operating Range l Programmed Output Voltage Range l 1.8 FB Voltage l 0.565 FB Voltage Hysteresis 0.580 MAX 5.5 V 5. 5 V 0.590 V 8.5 FB Input Current FB > 0.590V Switching Frequency While Charging l l UNITS mV 0.5 2 nA 1.00 1.20 1.40 MHz 94.50 96.75 99.00 %FB Power Good Rising Threshold Voltage Measured as a % of FB Voltage Power Good Hysteresis Measured as a % of FB Voltage 3.6 % Power Good Voltage Low IPGOOD = 5mA 200 mV Power Good Leakage Current PGOOD = 5.5V PFI Falling Threshold l 0.565 0.1 1 µA 0.580 0.590 V PFI Hysteresis Current VPFI < 0.565V 0.2 PFI Input Current VPFI > 0.590V 0.5 PFO Voltage Low IPFO = 5mA 200 PFO Leakage Current PFO = 5.5V Maximum Capacitor Voltage – Rising RMAXV = 125k, –40°C to 125°C (Note 7) RMAXV = 125k, 0°C to 85°C (Notes 6, 7) RMAXV = 113k, –40°C to 125°C (Note 7) RMAXV = 113k, 0°C to 85°C (Notes 6, 7) µA 2 nA mV 0.1 1 µA 2.500 2.500 2.260 2.260 2.650 2.600 2.380 2.350 V V V V Maximum Capacitor Voltage Hysteresis 120 200 MAXV Pin Current 20 l l l l 2.350 2.400 2.150 2.170 mV µA VIN Quiescent Current – Sleep VRUN = 3.3V, VFB > 0.590V 14 µA VOUT Quiescent Current – Sleep VRUN = 3.3V, Not Balancing, VFB > 0.590V VRUN = 3.3V, Balancing, VFB > 0.590V 1.9 100 µA µA VIN Quiescent Current – Shutdown VRUN = 0V, Not Including SW Leakage 0.6 1 µA VOUT Quiescent Current – Shutdown VRUN = 0V, Not Including SW Leakage 0.4 1 µA 1 VOUT Quiescent Current – Shutdown VRUN = 0V, VIN = 0V, Not Including SW Leakage 0.4 VIN Quiescent Current – Active VRUN = 3.3V (Note 3) 600 µA VIN Quiescent Current – UVLO VRUN = 1.5V, VIN = 1.5V, Not Including SW Leakage 25 µA VOUT Quiescent Current – UVLO VRUN = 1.5V, VIN = 1.5V, Not Including SW Leakage Input Current Limit RPROG = 22.1k (Notes 3, 7) RPROG = 22.1k (Notes 3, 7) RPROG = 11k (Notes 3, 7) RPROG = 11k (Notes 3, 7) RPROG = 5.49k (Notes 3, 7) RPROG = 5.49k (Notes 3, 7) RPROG = 3.57k (Notes 3, 7) RPROG = 3.57k (Notes 3, 7) l l l l 489 475 985 958 1973 1923 3034 2951 µA 1 2 µA 497 497 1000 1000 2003 2003 3081 3081 504 515 1015 1035 2033 2075 3127 3185 mA mA mA mA mA mA mA mA 3128f For more information www.linear.com/LTC3128 3 LTC3128 ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 3.3V, VOUT = 4.8V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS PROG Pin Gain Measured at IIN = 1A (Note 3) Internal Sense Resistor Value (Note 6) Peak Inductor Current Limit (Note 3) l 5.50 6.5 9.00 Linear Inductor Current Limit (Note 3) l 4.00 5.0 6.85 A N-Channel MOSFET Leakage Switches B and C and E 0.1 5 µA P-Channel MOSFET Leakage Switches A and D Switch F 0.1 0.1 5 10 µA µA N-Channel MOSFET On-Resistance Switch B Switch C Switch E (VOUT = 0V) 70 80 95 mΩ mΩ mΩ P-Channel MOSFET On-Resistance Switch A Switch D Switch F 45 40 300 mΩ mΩ mΩ MID Leakage Current VMID = 0V, VIN = 3.3V, VSW1 = 3.3V 0.1 10 MID Pin Regulation VOUT = 4.8V 2.400 2.496 Active Charge Balancer Enable Threshold |VOUT/2-VMID| 60 118 l 2.304 Active Charge Balancer Hysteresis 52.7 µA/A 50 mΩ A µA V mV 60 mV Active Charge Balancer Peak Current (Note 3) 400 mA Active Charge Balancer Valley Current (Note 3) 50 mA RUN Input High Threshold Voltage l RUN Input Low Threshold Voltage l RUN Input Current RUN = 5.5V Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. The LTC3128 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3128E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3128I is guaranteed over the full –40°C to 125°C operating junction temperature range. The junction temperature (TJ) is calculated from the ambient temperature (TA) and power dissipation (PD) according to the formula: TJ = TA + (PD • θJA°C/W), where θJA is the package thermal impedance. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. 1.2 V 0.01 0.3 V 1 µA Note 3. Current measurements are made when the output is not switching. Note 4. This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 5. Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal resistance much higher than 43°C/W in the QFN and 38°C/W in the TSSOP. Note 6. Guaranteed by design. Not tested. Note 7. Accuracy of this specification is directly related to the accuracy of the resistor used to program the parameter. 3128f 4 For more information www.linear.com/LTC3128 LTC3128 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs VOUT (1.0A IIN) 100 100 90 90 70 60 VIN = 1.7V VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 50 40 0.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 90 80 80 70 60 40 30 0.5 5.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 50 40 30 VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 0 0.5 5.5 5 5.5 –0.5 3.0 2.5 2.0 –1.0 1.0 –1.5 0.5 –2.0 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 0 95 115 3128 G05 VOUT vs Charge Time, COUT = 1F, RESR = 20mΩ, IIN = 2.0A 4.0 4.0 3.5 3.5 3.5 VOUT (V) 4.5 4.0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TIME (s) 3128 G22 2.5 2.0 1.5 1.0 0.5 0 2 4 6 8 10 12 14 16 18 20 22 24 TIME (s) VOUT vs Charge Time, COUT = 1F, RESR = 20mΩ, IIN = 3.0A 5.0 3.0 0 3128 G21 4.5 0 VIN = 1.7V VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 1.5 4.5 0.5 5.5 5 3.5 5.5 1.0 4.5 4.0 0 5.0 VIN = 1.7V VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 4 4.5 5.5 1.5 2.5 3 3.5 VOUT (V) 5.0 5.0 2.0 2 5.5 5.5 2.5 1.5 VOUT vs Charge Time, COUT = 1F, RESR = 20mΩ, IIN = 0.5A 0.5 VOUT vs Charge Time, COUT = 1F, RESR = 20mΩ, IIN = 1.0A 3.0 1 3128 G03 1.0 3128 G04 VOUT (V) 5 VOUT (V) 60 VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 10 VOUT (V) EFFICIENCY (%) 70 NORMALIZED AVERAGE INPUT CURRENT (%) 80 1 40 Average Input Current Limit vs Temperature (Normalized) 90 0 0.5 50 3128 G02 Efficiency vs VOUT (3.0A IIN) 10 60 20 3128 G01 20 70 30 VIN = 1.7V VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 50 5 Efficiency vs VOUT (2.0A IIN) 100 EFFICIENCY (%) 80 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs VOUT (0.5A IIN) TA = 25°C, unless otherwise noted. 3.0 2.5 2.0 VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 TIME (s) 3128 G23 1.5 1.0 0.5 0 VIN = 2.4V VIN = 3.3V VIN = 4.2V VIN = 5.0V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 TIME (s) 3128 G24 3128f For more information www.linear.com/LTC3128 5 LTC3128 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Programmable IIN vs VIN VIN Quiescent Current vs VIN (Burst Mode Operation Sleep) 3.25 3.00 13.6 40.0 13.4 35.0 2.25 INPUT CURRENT (µA) INPUT CURRENT (µA) IIN (A) 2.5 13.0 12.8 12.6 12.4 12.2 12.0 2.00 1.75 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 VIN (V) 0.00 1.2 1.1 1.0 0.9 1.8 2.2 2.6 3.0 3.4 3.8 4.2 4.6 5.0 5.4 VOUT (V) 0.05 0.10 0.15 0.20 0.25 0.30 PFI Voltage vs Temperature (Normalized) 0.00 –0.05 –0.10 –0.15 –0.20 –0.25 –0.30 –0.35 0.35 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 95 115 –0.40 –45 –25 –5 PGOOD Pull Down Resistance vs VIN 0.00 40 30 20 10 0 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 VIN (V) 3128 G12 90 80 –0.05 70 –0.10 RESISTANCE (Ω) NORMALIZED PGOOD THRESHOLD (%) 50 95 115 3128 G11 PGOOD Threshold vs Temperature (Normalized) 90 60 15 35 55 75 TEMPERATURE (°C) 3128 G10 PFO Pull Down Resistance vs VIN 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VIN (V) 0.05 3128 G09 80 0 3128 G08 NORMALIZED PFI VOLTAGE (%) 1.3 10.0 Feedback Voltage vs Temperature (Normalized) NORMALIZED FEEDBACK VOLTAGE (%) 1.4 15.0 11.6 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 VIN (V) 0.00 1.5 20.0 3128 G07 1.8 1.6 25.0 5.00 VOUT Quiescent Current vs VOUT (Burst Mode Operation Sleep) 1.7 30.0 11.8 3128 G06 OUTPUT CURRENT (µA) VIN Quiescent Current vs VIN (Input UVLO) 13.2 2.75 RESISTANCE (Ω) TA = 25°C, unless otherwise noted. –0.15 –0.20 –0.25 50 40 30 20 –0.30 –0.35 –45 –25 –5 60 10 15 35 55 75 TEMPERATURE (°C) 95 115 3128 G13 0 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 VIN (V) 3128 G14 3128f 6 For more information www.linear.com/LTC3128 LTC3128 TA = 25°C, unless otherwise noted. Minimum and Maximum Programmed Capacitor Voltage vs Programmed VOUT Maximum Capacitor Voltage vs Temperature (Normalized) 0.8 6 0.6 5 PROGRAMMED MAXV (V) NORMALIZED MAXIMUM CAPACITOR VOLTAGE (%) TYPICAL PERFORMANCE CHARACTERISTICS 0.4 2.0 0 –0.2 –0.4 MAXIMUM 4 MINIMUM (–40°C TO 125°C) 3 MINIMUM (0°C TO 85°C) 2 1 –0.6 –0.8 –45 –25 –5 15 35 55 75 TEMPERATURE (°C) 95 115 0 2.7 3.1 3.5 8.9 4.3 VOUT (V) 4.7 3128 G15 5.1 5.5 3128 G16 Startup Waveform 1.0A Input Current Limit Startup Waveform 3.0A Input Current Limit VOUT 2V/DIV IIN 2A/DIV VMID 2V/DIV RUN 5V/DIV VOUT 2V/DIV VMID 5V/DIV IIN 0.5A/DIV 5.00s/DIV 3128 G17 5.00s/DIV 3128 G18 3128f For more information www.linear.com/LTC3128 7 LTC3128 PIN FUNCTIONS (QFN/TSSOP) SW1 (Pins 1, 19/Pins 1, 4): Switch pin where internal switches A and B are connected. Connect an inductor from SW1 to SW2. RSENP (Pin 2/Pin 5): Sense Resistor Power Output. Connect other loads in the system to this pin. A 10µF or greater ceramic capacitor should be placed as close to RSENP and GND as possible. RSENS (Pin 3/Pin 6): Sense Resistor Signal Input. This pin should be connected to RSENP through as short and wide a trace as possible. RUN (Pin 4/Pin 7): Logic-Controlled Shutdown Input. RUN ≥ 1.2V: Normal Operation RUN ≤ 0.3V: Shutdown PROG (Pin 5/Pin 8): Sets the average input current limit threshold. Connect a resistor and capacitor from PROG to GND. See below for component value selection. RPROG (kΩ) = 11/ILIMIT (A) CPROG (pF) = 1600/(RPROG (kΩ)) NC (Pins 6, 20/Pins 9, 10, 22): Not Connected. These pins should be tied to ground. VIN (Pin 7/Pin 11): Input Supply Pin. Internal VCC for the IC and high current input to the internal sense resistor. A 10µF or greater ceramic capacitor should be placed as close to VIN and GND as possible. PFO (Pin 8/Pin 13): Power Fail Output. This is an opendrain output that sinks current when the supply being monitored is less than the programmed threshold voltage. PFI (Pin 9/Pin 14): Power Fail Input. Connect resistor divider tap from supply to be monitored here. See below for component selection. MAXV (Pin 10/Pin 15): Sets the maximum capacitor voltage across each capacitor. Connect a resistor from MAXV to GND. See below for component value selection. If charging only a single capacitor, tie this pin to ground. RMAXV (kΩ) = 50 • VMAXV(V) FB (Pin 11/Pin 16): Output Voltage Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 1.8V to 5.5V. The feedback reference voltage is 0.58V. VOUT (V) = 0.58 • (1+R2/R1) PGOOD (Pin 12/Pin 17): Power Good Indicator. This is an open-drain output that pulls low when VOUT is less than 96.75% of the programmed voltage. MID (Pin 13/Pin 18): Output for the active charger balancer. This pin should be tied to the junction of the two output capacitors. If charging only a single output capacitor, tie this pin to ground as shown in the applications section. VOUTS (Pin 14/Pin 19): Output Sense Input. This pin should be connected to the VOUT capacitor through as short a trace as possible. VOUTP (Pins 15,16/Pins 20, 21): Output of the Synchronous Rectifier. Connect the output filter capacitor from this pin to GND. See the applications information section for capacitor recommendations. SW2 (Pins 17,18/Pins 23, 24): Switch pin where internal switches C and D are connected. Connect inductor from SW1 to SW2. GND (Exposed Pad Pin 21/Pins 2, 3, 12 Exposed Pad Pin 25): IC and Power Ground. The exposed pad must be soldered to the PCB ground plane through a good electrical and thermal connection. VPFI(FALLING) (V) = 0.58 • (1+R4/R3) VPFIHYST (V) = R4 • 0.2µA 3128f 8 For more information www.linear.com/LTC3128 LTC3128 BLOCK DIAGRAM RSENP SW1 SW2 RSENS D VIN VOUTP A R4 PEAK AMP RUN PFI 0.58V – + – + 5A C BALANCER LOGIC + – 6.5A VOUTS E B – + PROG LOGIC R2 ZERO AMP ILINEAR AMP F SW1 + – 0.56V – + 0.58V FB 20µA 0.2µA 0.58V + – + – R3 + – PFO PGOOD + – A=1 + A=1 – MID MAXV VOUT MID R1 FB 0.56V + – GND 3128 BD 3128f For more information www.linear.com/LTC3128 9 LTC3128 OPERATION The LTC3128 is an average input current controlled buckboost DC/DC charger offered in both a thermally enhanced 4mm × 5mm 20-lead QFN package and a thermally enhanced 24-lead TSSOP package. The buck-boost charger utilizes a proprietary switching algorithm which allows its output to be regulated above, below, or equal to the input voltage. The low RDS(ON), low gate charge synchronous switches provide high efficiency conversion to minimize the charging time of storage elements. Charger Operation The LTC3128 uses fixed frequency, average input current PWM control when charging the output capacitor(s). A proprietary switching algorithm allows the charger to switch between buck and boost modes without discontinuity in inductor current or loop characteristics. The switch topology for the buck-boost charger is shown in Figure 1. Two switches (D and E) connect SW2 to VOUT to provide high efficiency over the entire output voltage range. L VIN A SW1 B LTC3128 SW2 VOUT D C E 3128 F01 Figure 1. Buck-Boost Switch Topology The LTC3128 uses a continuous switching algorithm where both SW1 and SW2 will switch regardless of the input or output. When the input voltage is significantly greater than the output voltage, the buck-boost converter operates in buck mode. Each cycle, switches B and C turn on for a minimum of 5% of the entire switching cycle. For the remainder of the switching cycle, switch D (switch D and E when VOUT <1.5V typically) turns on continuously, switch C remains off, and switches A and B are pulse width modulated to produce the required duty cycle to support the output regulation voltage. As the input voltage decreases or as the output voltage increases, switch A remains on for a larger portion of the switching cycle. As the input voltage decreases further, switch pair CD is pulse width modulated to obtain the desired output voltage. At this point, the converter is operating solely in boost mode. When VOUT is below 1.5V typical, switch D and E are modulated. This helps to improve efficiency at low VOUT voltages. This switching algorithm provides a seamless transition between operating modes and eliminates discontinuities in average inductor current, inductor current ripple, and loop transfer function throughout all operational modes. These advantages result in increased efficiency and stability in comparison to the traditional 4-switch buck-boost converter. Error Amplifier And Compensation The LTC3128 utilizes two control loops. The hysteretic voltage loop determines whether the output is in regulation or not, and commands the LTC3128 into a low quiescent current sleep state when VOUT reaches its programmed level. The voltage loop is also equipped with a proportional gain control that reduces the charging current as VOUT approaches regulation. This helps prevent chattering into and out of sleep because of the large charging currents and possibly high equivalent series resistance (ESR) capacitors. The current loop is internally compensated and forces the input current to the programmed input current limit. When the LTC3128 is not sleeping or balancing, it operates at a fixed 1.2MHz frequency. Current Limit Operation The LTC3128 has three current limit circuits. The primary current limit is an accurate average input current limit circuit that measures the input current drawn from the source by the LTC3128 and the other loads tied to the RSENS pin via an internal 50mΩ sense resistor. The LTC3128, when not sleeping, will always try to limit the input current passing through the sense resistor. Any current drawn externally from RSENS will result in a corresponding decrease in the charging current supplied by the LTC3128. If the load tied to RSENS draws more than the programmed amount, the LTC3128 will reduce the charging current to zero, although it cannot limit the current draw from external sources. The 3128f 10 For more information www.linear.com/LTC3128 LTC3128 OPERATION input current limit is set by placing a resistor, RPROG, from PROG to GND. This resistor and the CPROG capacitor value can be calculated using the following formula: RPROG (kΩ) = 11/ILIMIT (A) CPROG (pF) ≈ 1600/(RPROG (kΩ) ) Where ILIMIT is the average input current limit in amps. dissipated in the package. The current limit will continue to be reduced to approximately 30% of the programmed limit just before thermal shutdown. The current limit will return to its full value when the die temperature drops below 135°C. See the PCB Layout Considerations section in the Applications Information portion of the data sheet for additional thermal considerations. A secondary linear current limit, limits the maximum average inductor current to 5.0A typically. If the peak inductor current reaches 6.5A (typical) switches A and C are immediately turned off, and switches B and D are turned on. The linear and peak current limits are fixed and therefore are not affected by the value of RPROG. Undervoltage Lockout Zero Current Comparator Power Failure Indicator The zero current comparator monitors the inductor current to the output and shuts off all power switches when this current reduces to approximately 30mA. This prevents the inductor current from reversing in polarity, improving efficiency at light loads. Shutdown Shutdown of the LTC3128 is accomplished by pulling the RUN pin below 0.3V and IC operation is enabled by pulling the RUN pin above 1.2V. Note that RUN can be driven above VIN or VOUT, as long as it is limited to less than the absolute maximum rating. Thermal Shutdown If the die temperature exceeds 165°C (typical) the LTC3128 will be disabled. All power devices will be turned off and both switch nodes will be pulled low. The LTC3128 will restart (if enabled) when the die temperature drops to approximately 155°C. Thermal Regulator To help prevent the part from going into thermal shut-down when charging very large capacitors at high current, the LTC3128 is equipped with a thermal regulator. If the die temperature exceeds 135°C (typical) the average current limit is lowered to help reduce the amount of power being If the input supply voltage drops below 1.60V (typical), the LTC3128 will be disabled and all power devices will be turned off. The LTC3128 will resume operation when VIN rises above 1.73V. The LTC3128 includes a power failure indicator comparator. Referring to the Block Diagram, the non-inverting input of the comparator is internally connected to a 0.58V reference and the inverting input is connected to the PFI pin. An external resistive divider can be placed from the supply being monitored to ground to program the threshold voltage. When the voltage at PFI drops below 0.58V, the open-drain N-channel MOSFET on PFO will turn on, pulling the pin low. The N-channel MOSFET is forced off when the LTC3128 is in shutdown. When PFI drops below 0.58V, a hysteresis current of 0.2µA will turn on, sinking current into the PFI pin providing hysteresis. Once the PFI pin rises above 0.58V plus the programmed hysteresis, the open-drain N-channel MOSFET on PFO will turn off. The power failure indicator voltage and hysteresis can be calculated as follows: VPFI(FALLING) (V) = 0.58 • (1 + R4/R3) VPFIHYST (V) = R4 • 0.2µA Power-Good Indicator The LTC3128 includes a power-good indicator comparator. The non-inverting input of the comparator is connected to the FB pin and the inverting input is internally connected to a 0.56V reference. When the voltage at FB drops below approximately 0.54V, the open-drain N-channel MOSFET on PGOOD will turn on, pulling the pin low. The N-channel MOSFET is forced off when the LTC3128 is in shutdown. 3128f For more information www.linear.com/LTC3128 11 LTC3128 OPERATION Maximum Capacitor Voltage Comparator The LTC3128 monitors the voltage across each capacitor of the stacked output capacitors. If a capacitor exceeds the programmed maximum capacitor voltage, the LTC3128 will stop charging the output stack and begin balancing the voltage on the two capacitors. If the capacitors cannot be balanced and the fault condition still persists, charging will be halted until the output capacitors self discharge so that a fault condition no longer exists. This condition can exist if there is a shorted or damaged output capacitor. The maximum capacitor voltage is programmed by placing a single resistor from MAXV to GND. The RMAXV resistor should be placed close to the MAXV pin to minimize the pin capacitance. The typical resistor value can be calculated using the following formula: RMAXV (kΩ) = 50 • VMAXV (V) Where VMAXV is the maximum allowable voltage across a capacitor. With the calculated RMAXV value, the observed VMAXV can vary as much as ±6%. The maximum capacitor voltage comparator is not enabled until VOUT is greater than approximately 1.5V. If the MAXV pin is tied to ground, both the maximum capacitor voltage comparator and the active charge balancer are disabled. The MAXV pin should be tied to ground if only a single output capacitor is being charged and no balancing is required. When using a single capacitor, the maximum capacitor voltage is programmed using the FB pin. The voltage loop will prevent overvoltaging of the output capacitor, and the MID pin should be grounded. Please refer to the Typical Applications section for an example. Active Charge Balancer The LTC3128 includes an active charge balancer for the stacked output capacitors. The balancer efficiently moves charge from the overcharged capacitor to the undercharged capacitor until the two capacitors are determined to be balanced. This helps to ensure the long term reliability of the capacitors by insuring one-half of the programmed output voltage is across each capacitor and eliminates the need for lossy balancing resistors or shunt regulators. The active charge balancer is enabled once the voltage on the MID pin exceeds approximately 1.2V. The LTC3128 will try to balance the stack only if VOUT has reached regulation, or if one of the capacitor voltages has exceeded the maximum programmed value. This ensures that the output stack is charged as quickly as possible while protecting each capacitor from being overcharged. The balancer is hysteretic and is enabled once the two capacitors are 60mV out of balance. Once the balancer has equalized the voltage across each capacitor, it is disabled. The active charge balancer operates by using the inductor connected between SW1 and SW2 to efficiently move charge between the two output capacitors. The charge is moved through a switch that connects the MID pin to SW1 internally. Connecting the MID pin to SW1 allows the LTC3128 to either boost charge from the bottom capacitor to the top, or buck charge from the top capacitor by modulating switches C and D. If VMID is 60mV greater than VOUT – VMID switches C and F are turned on until the inductor current reaches 400mA. Switch C is then turned off and switch D is turned on until the inductor current reaches 50mA. This switching cycle continues until VMID = VOUT – VMID. If VOUT – VMID is 60mV greater than VMID, switches D and F are turned on until the inductor current reaches –400mA. Switch D is then turned off and switch C is turned on until the inductor current reaches –50mA. The switching cycle continues until VMID = VOUT – VMID. The frequency that the balancer will operate at is dependent on the inductor value (L) and can be calculated by: fbalancer (MHz) ≈ VOUT 1.6 •L (µH) 3128f 12 For more information www.linear.com/LTC3128 LTC3128 APPLICATIONS INFORMATION A typical LTC3128 application circuit is shown on the front page of this data sheet. The external component selection is determined by the desired output voltage, input current limit, maximum capacitor voltage, and VOUT ripple requirements for each particular application. However, basic guidelines and considerations for the design process are provided in this section. Output Voltage Programming The output voltage is set by a resistive divider according to the formula: VOUT (V) = 0.58V • (1 + R2/R1) The external divider is connected to the output as shown in Figure 2. The LTC3128 buck-boost charger utilizes input current mode control, and the output divider resistance does not play a role in system stability. Large resistor values can be used to minimize output leakage. The programmed maximum capacitor voltage affects the maximum output voltage that can be programmed. This maximum programmed output voltage can be calculated by: VOUT(MAX) = 2 • (VMAXV – 440mV) (–40°C to 125°C) VOUT(MAX) = 2 • (VMAXV – 385mV) (0°C to 85°C) 1.8V ≤ VOUT ≤ 5.25V R2 FB LTC3128 R1 GND 3128 F02 less. The peak-to-peak inductor current ripple for buck and boost mode can be calculated from the following formulas, where L is the inductance in micro Henries: ∆I L,P−P,BUCK (A) = VOUT (VIN − VOUT ) VIN • L • 1.2 ∆I L,P−P,BOOST (A) = VIN (VOUT − VIN ) VOUT • L • 1.2 The 1.2MHz switching frequency allows the LTC3128 to utilize small surface mount inductors. Inductor values between 2.2µH and 4.7µH are recommended. These values provide low ripple in the inductor current, but will not adversely affect the stability of the LTC3128. An inductor value that is too small or large will limit the stable input voltage range for a given VOUT. High frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving efficiency. The inductor should have low DC resistance (approximately 20mΩ or less) to reduce the I2R power losses, and must be able to support the peak inductor current without saturating. Molded chokes and chip inductors usually do not have enough core area to support the maximum peak inductor currents of up to 9.0A seen on the LTC3128. The inductor current can still reach currents greater than 5A even at low programmed input currents due to high voltage step-down ratios at start-up. See Table 1 and the reference schematics for suggested components and suppliers. Input Capacitor Selection Figure 2. Setting the Buck-Boost Output Voltage Inductor Selection To achieve high efficiency, a low DCR inductor should be utilized for the buck-boost charger. The inductor must have a saturation rating greater than the worst case average inductor current plus half the ripple current. This is due to the fact that during start-up or high step down ratios, the inductor current will be at the linear current limit (4.0A minimum) even if the programmed input current is The style and value of capacitors used with the LTC3128 determine input voltage ripple. It is required that a low equivalent series resistance (ESR) multilayer ceramic capacitor of at least 10µF be used to bypass the VIN, RSENS and RSENP pins. The value of the capacitor on VIN directly controls the amount of input ripple for a given input current pulse, such as during a bucking switching cycle. Increasing the value of this capacitor will reduce the input ripple. 3128f For more information www.linear.com/LTC3128 13 LTC3128 APPLICATIONS INFORMATION Table 1: Recommended Inductors VENDOR VALUE (µH) DCR (mΩ) MAX DC CURRENT (A) Coilcraft XAL5030-222ME XAL5030-332ME XAL6030-332ME XAL6060-472ME 2.2 3.3 3.3 4.7 13.2 21.2 19.9 13.1 9.2 8.7 12.2 10.5 5.0 × 5.0 × 3.0 5.0 × 5.0 × 3.0 6.0 × 6.0 × 3.0 6.0 × 6.0 × 6.0 Coiltronics HC8-2R6-R HC8-3R5-R HC7-3R9-R HC7-4R7-R 2.6 3.5 3.9 4.7 11.4 16.5 7.9 9 10.2 8.5 10.4 9.2 10.9 × 10.9 × 4.0 10.9 × 10.9 × 4.0 13.0 × 13.8 × 5.5 13.0 × 13.8 × 5.5 Sumida CDRH10D68RT125NP-2R2NC CDRH10D38DHPNP-3R3PC CDRH127/HPNP-4R7RC 2.2 3.3 4.7 7.1 13.5 18.8 10.5 9.25 10.8 10.2 × 10.2 × 6.8 10.0 × 10.0 × 3.8 12.5 × 12.5 × 8.0 TDK VLF12060T-2R7N100 VLF12060T-3R9N9R0 2.7 3.9 5.3 7 10 9 11.7 × 12.0 × 6.0 11.7 × 12.0 × 6.0 Würth Elektronik 744311220 744325420 2.2 4.2 11.4 7.1 9 11 6.9 × 7.0 × 3.8 10.2 × 10.5 × 4.7 Multilayer ceramic chip capacitors (MLCC) typically have exceptional ESR performance. MLCCs combined with a tight board layout and an unbroken ground plane will yield very good performance and low EMI emissions. There are several types of ceramic capacitors available, each having considerably different characteristics. For example, X7R and X7S ceramic capacitors have the best voltage and temperature stability. X5R ceramic capacitors have higher packing density but poorer performance over their rated voltage and temperature ranges. Y5V ceramic capacitors are not recommended because of their extreme non-linear characteristic of capacitance versus voltage and poor temperature stability. OUTPUT CAPACITOR SELECTION The LTC3128 is designed to charge supercapacitors with a minimum total output capacitance value greater that 2mF. In general, lower capacitance capacitors have higher ESRs. To prevent modulation in and out of sleep due to the voltage step caused by capacitor ESR, the LTC3128 reduces charge current in the last 5% of the VOUT charge cycle. At the end of the charging cycle immediately before sleep, the input current is reduced to 20% of the programmed value. Also of importance is to try and minimize the droop SIZE (mm) W × L × H due to the ESR, and keep the droop less than 1% of the programmed output voltage. When the charging current is reduced to zero, the output voltage ESR component is eliminated. The maximum recommended ESR for the recommended 1% droop on VOUT is calculated by: (RESR1 +RESR2 )(Ω) ≅ VOUT 2 (20• VIN •ILIM • η) Where RESR1, RESR2 are the ESR of each capacitor, VIN is the input voltage to the charger, ILIM is the programmed input current in amps, η is the fractional efficiency of the charger at 20% of the programmed input current, and VOUT is the programmed output of the charger. If the ESR of the capacitors is larger than this calculated value, some chattering in and out of sleep at the end of charge may be observed. Figure 3 shows the voltage droop on VOUT caused when charging stops. The LTC3128 is stable with a total output capacitance value greater than 2mF, or 4mF for each stacked capacitor. Supercapacitors are much larger physically than ceramic or tantalum capacitors, and therefore usually cannot be placed close to the charger. To minimize layout contribution to capacitor ESR, the trace width connecting the capacitors to each other and the IC should be as large as possible. The MID pin trace is not as critical, as it only carries 200mA 3128f 14 For more information www.linear.com/LTC3128 LTC3128 APPLICATIONS INFORMATION IIN 500mV/DIV VOUT 10mV/DIV 1ms/DIV 3128 F03 Figure 3. VOUT Voltage Droop at End of Charging of average current during balancing, but the VOUT trace can carry more than 6A of current. It is recommended that local decoupling capacitors be placed from VOUT to MID and from MID to ground, as close to the IC as possible. Multilayer ceramic capacitors are an excellent choice for output decoupling as they have extremely low ESR and are available in small footprints. While a 10µF decoupling capacitor is sufficient for most applications, larger values may be used without limitation. If using a single output capacitor, where balancing is not required, the MAXV and the MID pin should be tied to ground, this prevents the LTC3128 from trying to balance. The hysteretic voltage loop of the LTC3128 will protect the output capacitor, by regulating it to the voltage programmed by the FB pin. Pulsed Output Loads A large output capacitance can be used to help with pulsed load applications by reducing the amount of current required by the LTC3128. The maximum load for a given pulsed load duty cycle and the minimum capacitance can be calculated by: ILOAD(MAX)(A) = VIN •ILIM • η D• VOUT Where ISTANDBY is the continuous load current on the output in amps, IPULSE is the pulsed load current in addition to ISTANDBY in amps, ILIM is the programmed average current in amps, η is the LTC3128 converter efficiency, D is the load pulse’s duty cycle, and T is the period of the load pulse in seconds. When selecting output supercapacitors for large pulsed loads, the magnitude and duration of the pulsed current, together with the droop voltage specification, determine the choice of the output capacitor. Both the ESR and the charge stored in the capacitors each cycle contribute to the output voltage droop. The droop due to the pulsed load and ESR is calculated by: VDROOP,LOAD (V) = VIN •ILIM • η –ISTANDBY •D• T IPULSE – VOUT COUT,TOTAL (F) VDROOP,ESR (V) = VIN •ILIM • η –ISTANDBY IPULSE – VOUT • (RESR1 +RESR2 ) Where ISTANDBY is the continuous load current on the output in amps, IPULSE is the pulsed load current in addition to ISTANDBY in amps, ILIM is the programmed average current in amps, D is the load pulse’s duty cycle, and T is the period of the load pulse in seconds. The total output voltage droop is given by: VDROOP (V) = VDROOP,LOAD + VDROOP,ESR Low ESR and high capacitance are critical to maintaining low output droop. Table 2 and the Typical Applications schematics show supercapacitors that work well with the LTC3128. COUT(MIN)(F) = VIN •ILIM • η D• t –I STANDBY • IPULSE – VOUT VDROOP 3128f For more information www.linear.com/LTC3128 15 LTC3128 APPLICATIONS INFORMATION Table 2: Recommended Supercapacitors and Ultracapacitors VENDOR VALUE (F) ESR (mΩ) VOLTAGE (A) TEMPERATURE RANGE (C) Murata Electronics DMF3R5R5L334M3DTA0 DMF3Z5R5H474M3DTA0 0.33 0.47 60 40 4.2 (5.5 Peak) 4.2 (5.5 Peak) –30 to 70 –30 to 70 14.0 × 21.0 × 2.5 14.0 × 21.0 × 3.2 Tecate TPL-10/10X30F TPL-25/16X26F TPL-100/22X45F TPLE-25/16X26F TPLE-100/22X45F TPLS-400/35X60F 10 25 100 25 100 400 85 42 15 42 15 12 2.7 2.7 2.7 2.3 2.3 2.7 –40 to 65 –40 to 65 –40 to 65 –40 to 85 –40 to 85 –40 to 65 10.0 × 10.0 × 30.0 16.0 × 16.0 × 26.0 22.0 × 22.0 × 45.0 16.0 × 16.0 × 26.0 22.0 × 22.0 × 45.0 35.0 × 35.0 × 60.0 AVX BZ015A503Z_B BZ015A104Z_B 0.05 0.1 160 80 5.5 5.5 –20 to 70 –20 to 70 28.0 × 17.0 × 4.1 28.0 × 17.0 × 6.7 CAP-XX HS206F HS230 0.6 1.2 70 50 5.5 5.5 –40 to 85 –40 to 85 39.0 × 17.0 × 2.5 39.0 × 17.0 × 3.8 Cooper Bussmann A1635-2R5475-R M1325-2R5905-R HV1860-2R7107-R 4.7 9 100 25 20 10 2.5 2.5 2.7 –25 to 70 –40 to 60 –40 to 65 16.0 × 16.0 × 35.0 13.0 × 13.0 × 26.0 18.0 × 18.0 × 60.0 Illinois Capacitor 506DER2R5SLZ 357DER2R5SEZ 50 100 30 12 2.5 2.5 –40 to 70 –40 to 70 18.0 × 18.0 × 60.0 35.0 × 35.0 × 60.0 Maxwell BCAP0005 BCAP0100T01 5 100 170 15 2.7 2.7 –40 to 65 –40 to 65 10.0 × 10.0 × 20.0 22.0 × 22.0 × 45.0 Taiyo Yuden PAS2026FR2R5504 PAS0815LS2R5105 LIC2540R3R8207 0.5 1 200 55 70 50 2.5 2.5 2.2 to 3.8 –25 to 60 –25 to 70 –25 to 70 26.0 × 20.0 × 0.9 8.0 × 8.0 × 15.0 25.0 × 25.0 × 40.0 Maximum Capacitor Voltage & Balancing The service lifetime of a supercapacitor is determined by its rated voltage, rated temperature, rated lifetime, actual operating voltage, and operating temperature. To extend the life of a supercapacitor the operating voltage and temperature should be reduced from the maximum ratings. The websites for Illinois Capacitor1 and Maxwell2 provide the means to determine their capacitor lifetime. Using the suggested derated voltage for each capacitor will improve lifetime. The LTC3128 will keep each capacitor voltage at VOUT/2 once the output has reached regulation. To prevent an overvoltage on one of the output capacitors during charging, the maximum capacitor voltage comparaNote 1: http://www.illinoiscapacitor.com/tech-center/life-calculators.aspx Note 2: http://www.maxwell.com/products/ultracapacitors/docs/ APPLICATIONNOTE1012839_1.PDF SIZE (mm) W × L × H tors continuously monitor the output stack. If a capacitor exceeds the programmed maximum capacitor voltage, the LTC3128 immediately stops charging the stack. If a capacitor exceeds its maximum voltage and the MID pin is greater than 1.2V, the LTC3128 will balance the voltage of the capacitors, otherwise the part will halt charging until the maximum capacitor voltage violation clears, typically by an external load or leakage. The LTC3128 will start balancing the stacked output capacitors if the output is in regulation and the two capacitors are more than 60mV out of balance, or any time a maximum voltage event occurs. How well the output capacitors are matched will determine the likelihood of triggering a maximum capacitor voltage fault during charging. The maximum capacitor voltage can only force the LTC3128 to stop charging and, depending on other conditions, attempt to balance the capacitors. 3128f 16 For more information www.linear.com/LTC3128 LTC3128 APPLICATIONS INFORMATION The LTC3128 has minimal current draw from VOUT, especially when the cells are in balance (typically < 2µA). Care should be taken to limit sources of current that may pull VOUT above it’s programmed regulation value, as there is no way for the LTC3128 to maintain regulation in this situation. If there is potential for external leakage to overvoltage the supercapacitors, measures should be taken to protect them. PCB Layout Considerations The LTC3128 switches large currents at high frequencies. Special care should be given to the PCB layout to ensure stable, noise free operation. Due to the high input and output power of the LTC3128 a four layer PCB with significant copper and ground planes is strongly recommended. Otherwise the thermal regulator may start to reduce the programmed input current at a lower ambient temperature, and may not be able to prevent the device from entering thermal shutdown. The LTC3128 evaluation board shows a recommended layout and part placement. Figures 4 through 9 show the part placements and routing, a LTC3128 evaluation board is available on the Linear Technology website. The layout of the PCB and the amount of copper used directly effects the θJA of the LTC3128. The θJA of the LTC3128 on the Figure 4. LTC3128 Evaluation Board Top Side Silkscreen evaluation board layout shown is 20°C/W. If thinner copper, less copper area, or fewer vias are used then this number will increase. The following items provide guidelines for layout of the LTC3128: 1.Use solid ground plane under the whole circuit (no other traces underneath) 2.Place all decoupling capacitors close to LTC3128 (that ensures low parasitic inductances) 3.Use 2 to 3 local ground vias next to the GND pad of each decoupling capacitor. 4.Place the maximum number of GND vias under the exposed pad of LTC3128 (for low thermal resistance) 5.Place a local GND via next to each component that is connected to ground. 6.Keep FB and MAXV nodes short (place the voltage divider resistors close to the pins) The LTC3128 is equipped with a thermal regulator that is designed to help protect the LTC3128 from damage due to overheating. The thermal regulator will try to prevent the die temperature from exceeding 135°C by reducing the input current limit, but if it cannot, the LTC3128 will eventually enter thermal shutdown at 165°C. When the junction temperature of the LTC3128 drops back below 135°C the input current limit will no longer be affected. Figure 5. LTC3128 Evaluation Board Top Metal For more information www.linear.com/LTC3128 3128f 17 LTC3128 APPLICATIONS INFORMATION Figure 6. LTC3128 Evaluation Board Layer 2 Metal Figure 7. LTC3128 Evaluation Board Layer 3 Metal Figure 8. LTC3128 Evaluation Board Back Side Metal Figure 9. LTC3128 Evaluation Board Back Side Silkscreen 3128f 18 For more information www.linear.com/LTC3128 LTC3128 TYPICAL APPLICATIONS USB 3.0 (900mA Programmed Input Current) Powered, 4.8V Backup Supply 3.3µH VOUT = 4.8V MAXV = 2.85V SW2 RSENP VOUTP RSENS VOUTS LTC3128 VIN MID RUN PFI PFO FB PGOOD PROG MAXV GND SW1 USB 3.0 4.5V TO 5.5V 900mA 10µF 10µF 142k 10µF 2.21M TO LOAD 300F 10µF 130pF 12.4k 300F 301k 3128 TA02 VOUT 1V/DIV MID 1V/DIV IIN 500mA/DIV 200 SECONDS/DIV 3128 TA02b 3128f For more information www.linear.com/LTC3128 19 LTC3128 TYPICAL APPLICATIONS 5.0V to 3.3V Converter with Power Ride-Through ENA GND LTC4413 ENB STAT INB OUTB 4.7µH 1.8V TO 5.5V INPUT BUCK-BOOST CONVERTER CONTROL CIRCUIT SW1 3.3µH INA SW2 VOUTP RSENP VOUTS RSENS VIN LTC3128 RUN MID VIN 5.0V 3.0A SW1 OUTA VIN VOUT = 5.0V 2.32M 200F SHDN MODE PROG 10µF SGND PFO PGOOD MAXV 147k FB PROG 0.1µF 470pF GND 3.57k 316k 33pF 182k VC PGND 22µF ×2 47k 47µF 200F 301k TO LOAD FB 10µF 10µF VOUT = 3.3V VOUT LTC3127 10µF PFI SW2 60.4k 3300pF 3128 TA04 THIS CIRCUIT WILL PROVIDE THE 3.3V OUTPUT WHILE SUPERCAPACITORS ARE DISCHARGING FROM 5V DOWN TO 1.8V. THE LARGE DELTA FROM 5V DOWN TO 1.8V ALLOWS 87% OF STORED ENERGY IN THE SUPERCAPACITORS TO BE UTILIZED VOUT 5.0V/DIV LTC3128 VOUT 5.0V/DIV LTC3127 VOUT 2.0V/DIV LTC3128 IIN 2.0A/DIV 200 SECONDS/DIV 3128 TA04b 3128f 20 For more information www.linear.com/LTC3128 LTC3128 TYPICAL APPLICATIONS Supercapacitor Backup with Secondary Converters (3A Programmed Input Current) TO MAIN SYSTEM LOADS, 3A MAXIMUM 3.3µH SW1 Li-Ion 2.8V TO 4.2V 3.0A 2.0M µP 10µF 10µF 499k SW2 VOUT = 4.8V RSENP VOUTP RSENS VOUTS LTC3128 VIN MID RUN 10µF TO LOAD 400F 10µF PFI FB PFO PGOOD PROG MAXV GND 142k 2.21M 301k 400F 470pF 3.57k 3128 TA03 THIS SUPERCAPACITOR BACKUP CIRCUIT WILL DRAW ONLY THE CURRENT THAT IS LEFT OVER FROM THE 3A OF INPUT CURRENT CONSUMED BY MAIN LOADS IN THE SYSTEM 3128f For more information www.linear.com/LTC3128 21 LTC3128 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UFD Package 20-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1711 Rev B) 0.70 ±0.05 4.50 ±0.05 1.50 REF 3.10 ±0.05 2.65 ±0.05 3.65 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.50 REF 4.10 ±0.05 5.50 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) 0.75 ±0.05 PIN 1 NOTCH R = 0.20 OR C = 0.35 1.50 REF R = 0.05 TYP 19 20 0.40 ±0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 ±0.10 (2 SIDES) 2.50 REF 3.65 ±0.10 2.65 ±0.10 (UFD20) QFN 0506 REV B 0.200 REF 0.00 – 0.05 R = 0.115 TYP 0.25 ±0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3128f 22 For more information www.linear.com/LTC3128 LTC3128 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 24-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1771 Rev B) Exposed Pad Variation AA 7.70 – 7.90* (.303 – .311) 3.25 (.128) 3.25 (.128) 24 23 22 21 20 19 18 17 16 15 14 13 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.25 REF 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 1.20 (.047) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE24 (AA) TSSOP REV B 0910 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3128f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTC3128 23 LTC3128 TYPICAL APPLICATION Single Output Capacitor Application (1.5A Programmed Input Current) 3.3µH SW2 SW1 VIN 1.8V TO 5.5V 1.5A 10µF 10µF VOUT = 2.5V RSENP VOUTP RSENS VOUTS LTC3128 VIN RUN MID PFI FB PFO PGOOD MAXV PROG GND 10µF TO LOAD 1.0M 100F 7.32k 220pF 301k 3128 TA01 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3225/LTC3225-1 150mA Supercapacitor Charger Low Noise, Constant Frequency Charging of Two Series Supercapacitors. Automatic Cell Balancing Prevents Capacitor Overvoltage During Charging. Programmable Charge Current (Up to 150mA). Selectable 2.4V or 2.65V Regulation per Cell (LTC3225), Selectable 2V or 2.25V Regulation per Cell (LTC3225-1). 2mm × 3mm DFN Package LTC3226 1×/2× Multimode Charger with Automatic Cell Balancing. Internal 2 A LDO Backup Supply. 16 Lead 3mm × 3mm QFN Package 2-Cell Supercapacitor Charger with Backup PowerPath™ Controller LTC3625/LTC3625-1 1A High Efficiency 2-Cell High Efficiency Step-Up/Step-Down Charging of Two Series Supercapacitors. Automatic Supercapacitor Charger with Automatic Cell Balancing Prevents Capacitor Overvoltage During Charging. Programmable Charging Cell Balancing Current Up to 500mA (Single Inductor), 1A (Dual Inductor). VIN = 2.7V to 5.5V, Selectable 2.4V/2.65V Regulation per Cell (LTC3625). Selectable 2V/2.25V Regulation per Cell (LTC3625-1), Low No-Load Quiescent Current: 23µA. 12-lead 3mm × 4mm DFN Package LTC3606B 800mA IOUT, Synchronous Step-Down DC/DC Converter with Average Input Current Limit 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MAX) = 0.6V, IQ = 420µA, ISD < 1µA, 3mm × 3mm DFN-8 Package LTC4425 Supercapacitor Charger with Current Limited Ideal Diode Constant-Current/Constant-Voltage Linear Charger for 2-cell Series Supercapacitor Stack. VIN: Li-Ion/Polymer Battery, a USB Port, or a 2.7V to 5.5V Current-Limited Supply. 2A Charge Current, Auto Cell Balancing, 20µA Quiescent Current, Shutdown Current < 2µA. Low Profile 12-Pin 3mm × 3mm DFN or a 12-Lead MSOP Packages LTC3127 1A Buck-Boost Converter with Programmable Input Current Limit 96% Efficiency, ±4% Accurate Average Input Current Limit, VIN: 1.8V to 5.5V, VOUT = 1.8V to 5.25V, IQ = 35μA, DFN Package LTC3125 1.2A IOUT, 1.6MHz, Synchronous Boost 94% Efficiency, VIN: 1.8V to 5.5V, VOUT(MAX) = 5.25V, IQ = 15µA, ISD < 1µA, 2mm × 3mm DC/DC Converter With Adjustable Input DFN-8 Package Current Limit 3128f 24 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3128 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3128 LT 0314 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2014