Application Note 1740 Author: Dan Goodhew Voltage Reference Evaluation Board User’s Guide Introduction ISL21090-EVALZ Board This evaluation board is designed to evaluate the performance of various precision voltage reference devices. This evaluation board includes pads for 2 different voltage reference (VREF) package types: 8 lead SOIC, and 3 lead SOT-23. Only one device type is mounted on the board for evaluation purposes (reference schematic on page 3). The evaluation board contains the ISL21090 ultra low noise voltage reference (U2), a 10µF input decoupling capacitor (C2), a 1nF compensation capacitor (LINK3), and a 0.1µF load capacitor on the output (LINK4). The evaluation board includes voltage input test points (VIN and GND1) for a power supply input. There are a pair of test points for the output as well (VOUT and GND2). The common circuitry for each reference includes a jumperable R-C damper network on the VOUT (LINK6), and the Link4 and Link5 sockets, which accept through-hole style resistors and capacitors for output load testing. The power supply leads attach to the VIN and GND1 inputs. The input voltage range is from 4.7V to 36V. The ISL21090 has an initial accuracy of 0.02% and a 7 ppm/°C output voltage temperature coefficient. The output is measured at test points TP3 and TP4 (VOUT, GND2). The board is capable of accommodating an RC damper network to improve stability by reducing transient load ringing. The damper network is added by populating R1 with a 2.2kΩ resistor, C3 with a 10µF capacitor, and LINK6 with a shunt. FIGURE 1. VOLTAGE REFERENCE EVALUATION BOARD March 5, 2012 AN1740.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Copyright Intersil Americas Inc. 2012. All Rights Reserved. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1740 Components on the Board TABLE 2. JUMPER LIST TABLE 1. COMPONENTS PARTS LIST DEVICE # VALUE DESCRIPTION DEVICE # VALUE DESCRIPTION VOLTAGE REFERENCE SECTION VOLTAGE REFERENCE SECTION C1 DNP Bypass Capacitor Link1 DNP Pin1 state jumper C2 10µF Bypass Capacitor Link2 DNP Pin8 state jumper 1nF Pin3 compensation capacitor C3 Open Optional Damper Capacitor Link3 R1 DNP Optional Damper Resistor Link4 0.1µF Pin6 Load U1 DNP SOT-23 3-Pin Package Link5 Open Pin6 Load U2 ISL21090 SOIC 8-Pin Package Link6 Open R-C Jumper TP3, TP1, TP2, TP4 VOUT, VIN, GND1, GND2 Test Point Voltage Reference Evaluation Board Layout FIGURE 2. TOP COMPONENTS FIGURE 3. BOTTOM LAYER FIGURE 4. ASSEMBLY DRAWING Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 2 AN1740.0 March 5, 2012 1 2 3 TP1 VIN U1 D 1 3 VOUT 3 LINK2 Pi n8 TP3 VOUT VIN C1 DNPF 10u LINK1 P i n1 4 D 2 GND SOT23 1 3 3 1 2 TP4 GND2 C2 10u F 3 DNC DNC VIN DNC COMP VOUT 8 C 7 6 TP 2 GND1 4 GND NC LINK6 R-C 5 LINK4 SOIC8 C3 OPEN 10u F B LINK3 COMP 1nF FIGURE 5. SCHEMATIC R1 2.2K DNP LOAD LINK4 LOAD 0.1uF LINK5 LOAD B Application Note 1740 2 2 U2 1 C AN1740.0 March 5, 2012