Application Note 1572 ISL35411 Evaluation Board User Guide Description Key Features The ISL35411DRZ-EVALZ evaluation board is a versatile stand-alone printed circuit board developed to evaluate the performance of the Intersil ISL35411 11.1Gb/s driver. • ISL35411 IC Items provided with board: • This application note • Connection to external 3.3V power supply • On-board voltage regulator that provides the 1.2V supply to the IC • Power cable • On-board de-emphasis level adjustment using provided jumpers • Ten jumpers • SMA connectors to access differential inputs and outputs References • ISL35411 Datasheet Ordering Information PART NUMBER ISL35411DRZ-EVALZ FIGURE 1. TOP OF BOARD June 22, 2016 AN1572.1 1 DESCRIPTION ISL35411 evaluation board (power cable and four jumpers included) FIGURE 2. BOTTOM OF BOARD CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2010, 2016. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1572 Operation of the ISL35411DRZ-EVALZ Evaluation Board This section describes how to setup your ISL35411DRZ-EVALZ evaluation board: making sure proper power is applied, connecting to the high-speed RF inputs and outputs and adjusting the output de-emphasis level for each channel. The board is shown in Figure 3. The ISL35411DRZ-EVALZ evaluation board is designed to minimize parasitic board effects for transparent evaluation of the ISL35411's high-speed performance. Due to the extremely low-loss nature of the evaluation board's high-speed traces, all unused channels on the board should be terminated at the input and output SMA connections with 50Ω loads to minimize reflections, which can corrupt the performance of neighboring channels. Header for power supply connection (+3.3V) Output De-Emphasis Setting Control De-emphasis Control Pin (DE) headers FIGURE 3. ISL35411DRZ-EVALZ EVALUATION BOARD Power Supply The board needs to be powered by an external +3.3V power supply via the power header located at the top of the board using the power cable provided. The red lead of the power cable should be connected to the +3.3V output of the external power supply while the black lead should be connected to the ground (-) terminal. Typical current consumption of the board when the output de-emphasis level is set to 0dB (see Table 1) is 200mA when no input signals are applied; and 220mA when a signal is applied to any one of the four high-speed inputs. Total board current will be approximately 280mA if all four channels are active simultaneously with the output de-emphasis levels set to 0dB. High-Speed Data I/O Interface Connectors The ISL35411 Driver is intended to be used at the transmit end of lossy differential copper channels. The four channels of the ISL35411 make it well-suited for high-density applications with parallel channels. The ISL35411 is optimized for use in conjunction with the Intersil ISL36411 quad lane extender at the far end of the lossy channel. Submit Document Feedback The differential input(s) of the ISL35411 should be connected to a high-speed data stream source, such as a pattern generator. This connection should be made using the input SMA connectors labeled on the board. We recommend using phase (time-delay)-matched cables for each differential input to preserve the fidelity of the differential signal. The output SMA connectors provide access to the output differential signal(s) of the ISL35411 and can be connected with phase-matched cables to the channel to be driven. Make sure proper torque (5 in-lbs) is applied to the SMA connectors for reliable measurements and to prevent damage to the connectors. 2 The output driver of each channel on the ISL35411 is capable of providing seven different levels (0 to 6) of adjustable output de-emphasis. The available output de-emphasis levels range from 0dB (DE level = 0) to 4dB (DE level = 6). The de-emphasis levels of Channels 1 and 2 are controlled simultaneously by the de-emphasis control pin headers (DE) located at JP1 on the north-side of the board and highlighted in blue in Figure 3. The de-emphasis levels of Channels 3 and 4 are controlled simultaneously by the de-emphasis control pin headers (DE) located at JP2 on the south-side of the board and highlighted in green in Figure 3. Output de-emphasis levels are set by positioning jumpers on the appropriate header as illustrated in Figure 4. For both sets of headers, DE-A and DE-B can each be set to one of three values (VDD, GND, or Floating). Table 1 gives the jumper positions required to achieve various de-emphasis levels. As an example, Figure 4 depicts the jumper positions that set the output de-emphasis level to 3dB (DE-A = GND and DE-B = VDD). TABLE 1. JUMPER POSITIONS FOR OUTPUT DE-EMPHASIS SETTINGS DE-A DE-B DE LEVEL DE LEVEL (dB) No jumper No jumper 0 0 No jumper Jumper to GND 1 0.6 No jumper Jumper to VDD 2 1.1 Jumper to GND No jumper 3 1.6 Jumper to GND Jumper to GND 4 2.3 Jumper to GND Jumper to VDD 5 3.0 Jumper to VDD 6 4.0 No jumper AN1572.1 June 22, 2016 DE DE-B DE-A DE Application Note 1572 VDD Vdd AA BB GND GND CC FIGURE 4. JUMPER CONFIGURATION FOR 3dB OUTPUT DE-EMPHASIS FIGURE 6A. 10.3125Gb/s EYE DIAGRAM AT ISL35411DRZ-EVALZ EVALUATION BOARD OUTPUT (OUTPUT LEVEL = 0dB) The ISL35411 provides an independent transmit disable feature for each of its channels. With this feature, idle and/or unused channels on the ISL35411 can be made to enter a low power standby mode. Entry into this mode is controlled by each channel's respective TDSBL pin. The TDSBL-1 pin (for Channel 1) is located at header JP1 on the north-side of the board. The TDSBL pins for the remaining channels are located at header JP2 on the south-side of the board. By using a jumper to tie a given TDSBL pin to VDD (as shown in Figure 5), the corresponding channel on the ISL35411 is disabled. While disabled, all internal circuitry associated with the channel is powered down, and the channel is incapable of driving any high-speed signal applied to its input. If the TDSBL pin is left floating (no jumper installed), the respective channel is enabled and is capable of driving high-speed data. FIGURE 6B. 10.3125Gb/s EYE DIAGRAM AT ISL35411DRZ-EVALZ EVALUATION BOARD OUTPUT (OUTPUT LEVEL = 4dB) TDSBL TDS Transmit Disable VDD Vdd AA BB GND GND CC FIGURE 5. JUMPER INSTALLED FOR TRANSMIT DISABLE Baseline Performance The eye diagrams in Figure 6 show the typical high-speed performance of the ISL35411DRZ-EVALZ evaluation board. Figure 6A shows the output of a single channel at 10.3125Gb/s with no output de-emphasis (DE level = 0dB). Figure 6B shows the output of a single channel at 10.3125Gb/s with maximum output de-emphasis (DE level = 4dB). The output de-emphasis supplied by the ISL35411 can be used to precompensate the signal for subsequent frequency-dependent channel loss. Figure 6C shows the eye diagram of a waveform that has been transmitted from the output of the ISL35411 with maximum de-emphasis (DE level = 4dB) across a 22-inch long trace on an FR408 circuit board. The trace loss at 5GHz is approximately -8dB. The open eye diagram in Figure 6C illustrates the channel equalization capabilities of the ISL35411's output de-emphasis feature. Submit Document Feedback 3 FIGURE 6C. 10.3125Gb/s EYE DIAGRAM AFTER TRANSMISSION FROM ISL35411 ACROSS 22-in. FR408 TRACE (OUTPUT DE-LEVEL = 4dB) FIGURE 6. 10.3125Gb/s EYE DIAGRAM AFTER TRANSMISSION FROM ISL35411 ACROSS 22-in. FR408 TRACE (OUTPUT DE-LEVEL = 4dB) AN1572.1 June 22, 2016 Submit Document Feedback ISL35411DRZ-EVALZ Evaluation Board Schematic 4 Application Note 1572 FIGURE 7. ISL35411DRZ-EVALZ SCHEMATIC AN1572.1 June 22, 2016 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the document is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com