IRF9640S, SiHF9640S, IRF9640L, SiHF9640L www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • • • • • • • • -200 RDS(on) () VGS = -10 V 0.50 Qg max. (nC) 44 Qgs (nC) 7.1 Qgd (nC) 27 Configuration Single Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. S D2PAK (TO-263) I2PAK (TO-262) G G G D S Surface mount Available in tape and reel Dynamic dV/dt rating Available Repetitive avalanche rated P-channel Fast switching Available Ease of paralleling Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 DESCRIPTION Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface mount power package. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. The through-hole version (IRF9640L, SiHF9640L) is available for low-profile applications. D S D P-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263) I2PAK (TO-262) SiHF9640L-GE3 SiHF9640S-GE3 - - IRF9640SPbF IRF9640STRLPbF a IRF9640STRRPbF a IRF9640LPbF SiHF9640S-E3 SiHF9640STL-E3 a SiHF9640STR-E3 a SiHF9640L-E3 Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS -200 Gate-Source Voltage VGS ± 20 Continuous Drain Current VGS at -10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID IDM Linear Derating Factor Avalanche Current a Repetitive Avalanche Energy a Maximum Power Dissipation TC = 25 °C Maximum Power Dissipation (PCB mount) e TA = 25 °C Peak Diode Recovery dV/d c Operating Junction and Storage Temperature Range Soldering Recommendations (Peak temperature) d for 10 s A -44 0.025 Single Pulse Avalanche Energy b V -11 -6.8 1.0 Linear Derating Factor (PCB mount) e UNIT W/°C EAS 700 IAR -11 A EAR 13 mJ PD 125 3.0 dV/dt -5.0 TJ, Tstg -55 to +150 300 mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = -50 V, starting TJ = 25 °C, L = 8.7 mH, Rg = 25 , IAS = -11 A (see fig. 12). c. ISD -11 A, dI/dt 150 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). S16-0754-Rev. E, 02-May-16 Document Number: 91087 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF9640S, SiHF9640S, IRF9640L, SiHF9640L www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Ambient (PCB mount) a RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = -250 μA -200 - - V VDS/TJ Reference to 25 °C, ID = -1 mA - -0.20 - V/°C VGS(th) VDS = VGS, ID = -250 μA -2.0 - -4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = -200 V, VGS = 0 V - - -100 VDS = -160 V, VGS = 0 V, TJ = 125 °C - - -500 Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance μA - - 0.50 gfs VDS = -50 V, ID = -6.6 A b 4.1 - - S VGS = 0 V, VDS = -25 V, f = 1.0 MHz, see fig. 5 - 1200 - - 370 - - 81 - - - 44 - - 7.1 RDS(on) ID = 6.6 A b VGS = -10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss pF Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd - - 27 Turn-On Delay Time td(on) - 14 - tr - 43 - - 39 - - 38 - - 4.5 - - 7.5 - 0.3 - 1.7 - - -11 - - -44 - - -5.0 V - 250 300 ns - 2.9 3.6 μC Rise Time Turn-Off Delay Time Fall Time td(off) VGS = -10 V ID = -11 A, VDS = -160 V, see fig. 6 and 13 b VDD = -100 V, ID = -11 A, Rg = 9.1 , RD = 8.6 , see fig. 10 b tf Internal Drain Inductance LD Internal Source Inductance LS Gate Input Resistance Rg Between lead, 6 mm (0.25") from package and center of die contact nC ns D nH G S f = 1 MHz, open drain Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current a ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p -n junction diode D A G S TJ = 25 °C, IS = -11 A, VGS = 0 V b TJ = 25 °C, IF = -11 A, dI/dt = 100 A/μs b Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. S16-0754-Rev. E, 02-May-16 Document Number: 91087 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF9640S, SiHF9640S, IRF9640L, SiHF9640L www.vishay.com Vishay Siliconix VGS - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom - 4.5 V - ID, Drain Current (A) Top 101 - 4.5 V 20 µs Pulse Width TC = 25 °C 100 100 101 - VDS, Drain-to-Source Voltage (V) 91087_01 RDS(on), Drain-to-Source On Resistance (Normalized) TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 3.0 ID = - 11 A VGS = - 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 Fig. 4 - Normalized On-Resistance vs. Temperature 2400 VGS - 15 V - 10 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom - 4.5 V VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 2000 - 4.5 V Capacitance (pF) - ID, Drain Current (A) Top 101 60 80 100 120 140 160 TJ, Junction Temperature (°C) 91087_04 Fig. 1 - Typical Output Characteristics, TC = 25 °C 20 40 1600 Ciss 1200 800 Coss 400 100 20 µs Pulse Width TC = 150 °C 100 0 101 100 - VDS, Drain-to-Source Voltage (V) 91087_02 Crss - VDS, Drain-to-Source Voltage (V) 91087_05 Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 25 °C 101 100 20 µs Pulse Width VDS = - 50 V 4 91087_03 5 6 7 8 9 - VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S16-0754-Rev. E, 02-May-16 - VGS, Gate-to-Source Voltage (V) - ID, Drain Current (A) 20 150 °C 101 ID = - 11 A VDS = - 160 V 16 VDS = - 100 V VDS = - 40 V 12 8 4 For test circuit see figure 13 0 10 0 91087_06 10 20 30 40 50 60 QG, Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Document Number: 91087 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF9640S, SiHF9640S, IRF9640L, SiHF9640L www.vishay.com Vishay Siliconix 10 - ID, Drain Current (A) - ISD, Reverse Drain Current (A) 12 101 25 °C 150 °C 100 6 4 2 VGS = 0 V 10-1 0.0 2.0 1.0 3.0 0 5.0 4.0 25 - VSD, Source-to-Drain Voltage (V) 91087_07 50 100 75 125 150 TC, Case Temperature (°C) 91087_09 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature RD 102 Operation in this area limited by RDS(on) 5 - ID, Drain Current (A) 8 VDS VGS 10 µs D.U.T. Rg +VDD 2 100 µs - 10 V 10 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 1 ms 5 Fig. 10a - Switching Time Test Circuit TC = 25 °C TJ = 150 °C Single Pulse 2 1 2 1 5 10 2 5 10 ms 102 2 5 td(on) td(off) tf tr VGS 103 10 % - VDS, Drain-to-Source Voltage (V) 91087_08 Fig. 8 - Maximum Safe Operating Area 90 % VDS Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 D = 0.50 PDM 0.20 0.1 0.10 0.05 t1 t2 Single Pulse (Thermal Response) 0.02 0.01 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 10-5 91087_11 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case S16-0754-Rev. E, 02-May-16 Document Number: 91087 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF9640S, SiHF9640S, IRF9640L, SiHF9640L www.vishay.com Vishay Siliconix L Vary tp to obtain required IAS IAS VDS VDS D.U.T Rg + V DD VDD IAS tp - 10 V 0.01 Ω tp VDS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 1600 ID - 4.9 A - 7.0 A Bottom - 11 A Top 1200 800 400 0 VDD = - 50 V 25 91087_12c 50 75 100 125 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG - 10 V 12 V 0.2 µF 0.3 µF QGS - QGD D.U.T. VG + VDS VGS - 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform S16-0754-Rev. E, 02-May-16 Fig. 13b - Gate Charge Test Circuit Document Number: 91087 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF9640S, SiHF9640S, IRF9640L, SiHF9640L www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg + • dV/dt controlled by Rg • ISD controlled by duty factor “D” • D.U.T. - device under test + - VDD Note • Compliment N-Channel of D.U.T. for driver Driver gate drive P.W. Period D= P.W. Period VGS = - 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = - 5 V for logic level and - 3 V drive devices Fig. 14 - For P-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91087. S16-0754-Rev. E, 02-May-16 Document Number: 91087 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0° to 8° 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail “A” Rotated 90° CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B ± 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 Package Information Vishay Siliconix I2PAK (TO-262) (HIGH VOLTAGE) A (Datum A) E B c2 A E A L1 Seating plane D1 D C L2 C B B L A c 3 x b2 E1 A1 3xb Section A - A Base metal 2xe b1, b3 Plating 0.010 M A M B c1 c (b, b2) Lead tip Section B - B and C - C Scale: None MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380 A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 - b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420 b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 - b2 1.14 1.78 0.045 0.070 e b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555 c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065 c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146 c2 1.14 1.65 0.045 0.065 2.54 BSC 0.100 BSC ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body. 3. Thermal pad contour optional within dimension E, L1, D1, and E1. 4. Dimension b1 and c1 apply to base metal only. Document Number: 91367 Revision: 27-Oct-08 www.vishay.com 1 AN826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 0.355 0.635 (16.129) (9.017) (10.668) 0.145 (3.683) 0.135 (3.429) 0.200 0.050 (5.080) (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Document Number: 73397 11-Apr-05 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000