SiHD7N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • • • • • • 650 RDS(on) max. at 25 °C (Ω) VGS = 10 V Qg max. (nC) 0.6 40 Qgs (nC) 5 Qgd (nC) 9 Configuration Single Low figure-of-merit (FOM) Ron x Qg Low input capacitance (Ciss) Reduced switching and conduction losses Ultra low gate charge (Qg) Avalanche energy rated (UIS) Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • • • • Server and telecom power supplies Switch mode power supplies (SMPS) Power factor correction power supplies (PFC) Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) D DPAK (TO-252) D G G S S N-Channel MOSFET ORDERING INFORMATION Package DPAK (TO-252) SiHD7N60E-GE3 SiHD7N60ET1-GE3 Lead (Pb)-free and Halogen-free SiHD7N60ET5-GE3 SiHD7N60ET4-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage SYMBOL TC = -25 °C, ID = 250 μA Gate-Source Voltage Continuous Drain Current (TJ = 150 °C) VDS VGS VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID IDM Linear Derating Factor LIMIT UNIT 600 575 V ± 30 7 5 A 18 0.63 W/°C Single Pulse Avalanche Energy b EAS 43 mJ Maximum Power Dissipation PD 78 W TJ, Tstg -55 to +150 °C Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dt d Soldering Recommendations (Peak Temperature) c for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 13.8 mH, Rg = 25 Ω, IAS = 2.5 A. c. 1.6 mm from case. d. ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C. S15-0291-Rev. D, 23-Feb-15 dV/dt 3 300 V/ns °C Document Number: 91510 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHD7N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 1.6 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 609 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.68 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10 - 0.5 0.6 Ω S Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) VGS = 10 V ID = 3.5 A gfs VDS = 50 V, ID = 3.5 A - 1.9 - Input Capacitance Ciss VGS = 0 V, VDS = 100 V, f = 1 MHz - 680 - - 39 - - 5 - - 34 - - 100 - - 20 40 - 5 - - 9 - μA Dynamic Output Capacitance Coss Reverse Transfer Capacitance Crss Effective Output Capacitance, Energy Related a Co(er) Effective Output Capacitance, Time Related b Co(tr) pF VDS = 0 V to 480 V, VGS = 0 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 3.5 A, VDS = 480 V nC - 13 26 - 13 26 - 24 48 - 14 28 - 1.1 - - - 7 - - 18 TJ = 25 °C, IS = 3.5 A, VGS = 0 V - - 1.2 - 230 - ns TJ = 25 °C, IF = IS = 3.5 A, dI/dt = 100 A/μs, VR = 20 V - 1.9 - μC - 14 - A VDD = 480 V, ID = 3.5 A, VGS = 10 V, Rg = 9.1 Ω f = 1 MHz, open drain ns Ω Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S V Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S15-0291-Rev. D, 23-Feb-15 Document Number: 91510 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHD7N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 16 12 3 TJ = 25 °C ID = 3.5 A RDS(on), Drain-to-Source On Resistance (Normalized) 8 4 5 10 15 20 25 30 VGS = 10 V 1 0.5 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 10 000 TJ = 150 °C Capacitance (pF) ID, Drain-to-Source Current (A) 1.5 VDS, Drain-to-Source Voltage (V) 12 9 2 0 - 60 - 40 - 20 0 0 0 2.5 6 3 Ciss 1000 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Coss 100 Crss 10 1 0 0 5 10 15 20 25 30 0 VDS, Drain-to-Source Voltage (V) 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 6 TJ = 25 °C 16 5 500 4 12 Coss (pF) ID, Drain-to-Source Current (A) 20 TJ = 150 °C 8 Coss 3 Eoss 50 Eoss (μJ) ID, Drain-to-Source Current (A) 20 2 4 1 0 5 0 5 10 15 20 25 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S15-0291-Rev. D, 23-Feb-15 0 0 100 200 300 400 500 600 VDS Fig. 6 - Coss and Eoss vs. VDS Document Number: 91510 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHD7N60E www.vishay.com Vishay Siliconix 8 VDS = 480 V VDS = 300 V VDS = 120 V 20 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 6 4 2 4 0 0 0 10 20 30 25 40 Qg, Total Gate Charge (nC) 50 75 100 125 150 TC, Case Temperature (°C) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature 750 725 TJ = 150 °C VDS, Drain-to-Source Breakdown Voltage (V) ISD, Reverse Drain Current (A) 100 TJ = 25 °C 10 1 700 675 650 625 600 575 550 VGS = 0 V 525 - 60 - 40 - 20 0 0.1 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) VSD, Source-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage 100 Operation in this Area Limited by RDS(on) Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM = Limited ID, Drain Current (A) 10 100 μs 1 Limited by RSD (on)* 1 ms 0.1 TC = 25 °C TJ = 150 °C Single Pulse 0.01 1 10 ms BVDSS Limited 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S15-0291-Rev. D, 23-Feb-15 Document Number: 91510 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHD7N60E Normalized Effective Transient Thermal Impedance www.vishay.com Vishay Siliconix 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD V DS V DS tp V GS V DD D.U.T. RG + - V DD V DS 10 V Pulse width ≤ 1 μs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms V DS QG 10 V 90 % QGS QGD VG 10 % V GS td(on) td(off) tr tf Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L Vary t p to obtain required IAS VDS 50 kΩ D.U.T. RG + - I AS 12 V 0.2 μF 0.3 μF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S15-0291-Rev. D, 23-Feb-15 Document Number: 91510 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHD7N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91510. S15-0291-Rev. D, 23-Feb-15 Document Number: 91510 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-252AA Case Outline E MILLIMETERS A C2 e b2 D1 e1 E1 L gage plane height (0.5 mm) L4 b L5 H D L3 b3 C A1 INCHES DIM. MIN. MAX. MIN. MAX. A 2.18 2.38 0.086 0.094 A1 - 0.127 - 0.005 b 0.64 0.88 0.025 0.035 b2 0.76 1.14 0.030 0.045 b3 4.95 5.46 0.195 0.215 0.024 C 0.46 0.61 0.018 C2 0.46 0.89 0.018 0.035 D 5.97 6.22 0.235 0.245 D1 4.10 - 0.161 - E 6.35 6.73 0.250 0.265 E1 4.32 - 0.170 - H 9.40 10.41 0.370 0.410 e 2.28 BSC e1 0.090 BSC 4.56 BSC 0.180 BSC L 1.40 1.78 0.055 0.070 L3 0.89 1.27 0.035 0.050 L4 - 1.02 - 0.040 L5 1.01 1.52 0.040 0.060 ECN: T16-0236-Rev. P, 16-May-16 DWG: 5347 Notes • Dimension L3 is for reference only. Revision: 16-May-16 Document Number: 71197 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-252AA (HIGH VOLTAGE) E b3 E1 L3 D1 D H L4 b2 b A c2 e A1 L1 L c θ L2 MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. E 6.40 6.73 0.252 0.265 L 1.40 1.77 0.055 L1 2.743 REF L2 0.070 0.108 REF 0.508 BSC 0.020 BSC L3 0.89 1.27 0.035 0.050 L4 0.64 1.01 0.025 0.040 D 6.00 6.22 0.236 0.245 H 9.40 10.40 0.370 0.409 b 0.64 0.88 0.025 0.035 b2 0.77 1.14 0.030 0.045 b3 5.21 5.46 0.205 e 2.286 BSC 0.215 0.090 BSC A 2.20 2.38 0.087 A1 0.00 0.13 0.000 0.094 0.005 c 0.45 0.60 0.018 0.024 c2 0.45 0.58 0.018 0.023 D1 5.30 - 0.209 - E1 4.40 - 0.173 - θ 0' 10' 0' 10' ECN: S-81965-Rev. A, 15-Sep-08 DWG: 5973 Notes 1. Package body sizes exclude mold flash, protrusion or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 0.10 mm per side. 2. Package body sizes determined at the outermost extremes of the plastic body exclusive of mold flash, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 3. The package top may be smaller than the package bottom. 4. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.10 mm total in excess of "b" dimension at maximum material condition. The dambar cannot be located on the lower radius of the foot. Document Number: 91344 Revision: 15-Sep-08 www.vishay.com 1 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR DPAK (TO-252) 0.224 0.243 0.087 (2.202) 0.090 (2.286) (10.668) 0.420 (6.180) (5.690) 0.180 0.055 (4.572) (1.397) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72594 Revision: 21-Jan-08 www.vishay.com 3 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000