SiHA22N60EL www.vishay.com Vishay Siliconix EL Series Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • • • • • • 650 RDS(on) typ. at 25 °C (Ω) VGS = 10 V Qg max. (nC) 0.171 74 Qgs (nC) 15 Qgd (nC) 15 Configuration Single Reduced figure-of-merit (FOM) Ron x Qg Low input capacitance (Ciss) Reduced switching and conduction losses Low gate charge (Qg) Avalanche energy rated (UIS) Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • Server and telecom power supplies - Switch mode power supplies (SMPS) - Power factor correction power supplies (PFC) • Lighting - High-intensity discharge (HID) - Fluorescent ballast lighting • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) D Thin-Lead TO-220 FULLPAK G GD S S N-Channel MOSFET ORDERING INFORMATION Package Thin-Lead TO-220 FULLPAK Lead (Pb)-free SiHA22N60EL-E3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 600 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) e VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID IDM Linear Derating Factor Single Pulse Avalanche Energy b EAS Maximum Power Dissipation Operating Junction and Storage Temperature Range Drain-Source Voltage Slope VDS = 0 V to 80 % VDS Reverse Diode dV/dt d Soldering Recommendations (Peak Temperature) c for 10 s UNIT V 21 13 A 45 0.28 W/°C 286 mJ PD 35 W TJ, Tstg -55 to +150 °C dV/dt 62 22 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 4.5 A. c. 1.6 mm from case. d. ISD ≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C. e. Limited by maximum junction temperature. S15-0746-Rev. A, 20-Apr-15 Document Number: 91642 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA22N60EL www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 3.6 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 600 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.71 - V/°C VGS(th) VDS = VGS, ID = 250 μA 3 - 5 V VGS = ± 20 V - - ± 100 nA VGS = ± 30 V - - ±1 μA VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10 - 0.171 0.197 Ω S Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) VGS = 10 V ID = 11 A gfs VDS = 20 V, ID = 11 A - 6.5 - Input Capacitance Ciss VGS = 0 V, VDS = 100 V, f = 1 MHz - 1690 - - 95 - - 5 - - 85 - - 296 - - 37 74 - 15 - - 15 - μA Dynamic Output Capacitance Coss Reverse Transfer Capacitance Crss Effective Output Capacitance, Energy Related a Co(er) Effective Output Capacitance, Time Related b Co(tr) pF VDS = 0 V to 400 V, VGS = 0 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 11 A, VDS = 480 V nC - 22 44 - 46 92 - 27 54 - 24 48 - 0.65 - - - 21 - - 45 TJ = 25 °C, IS = 11 A, VGS = 0 V - - 1.2 - 365 - ns TJ = 25 °C, IF = IS = 11 A, dI/dt = 100 A/μs, VR = 25 V - 5.8 - μC - 29 - A VDD = 480 V, ID = 11 A, VGS = 10 V, Rg = 9.1 Ω f = 1 MHz, open drain ns Ω Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S V Notes a. Coss(er) s a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S15-0746-Rev. A, 20-Apr-15 Document Number: 91642 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA22N60EL www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 30 3.0 TJ = 25 °C ID = 11 A RDS(on), Drain-to-Source On-Resistance (Normalized) ID, Drain-to-Source Current (A) 45 15 2.5 2.0 1.5 1.0 VGS = 10 V 0.5 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 0 30 - 60 - 40 - 20 Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics 30 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 20 10 000 TJ = 150 °C Ciss 1000 C, Capacitance (pF) ID, Drain-to-Source Current (A) TOP 10 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 100 Coss 10 Crss 0 0 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) 1 30 0 100 200 300 400 500 VDS, Drain-to-Source Voltage (V) 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 14 5000 12 TJ = 25 °C 30 TJ = 150 °C 8 Coss Eoss 500 6 15 Eoss (μJ) 10 Coss (pF) ID, Drain-to-Source Current (A) 45 4 VDS = 28.8 V 2 50 0 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S15-0746-Rev. A, 20-Apr-15 25 0 0 100 200 300 VDS 400 500 600 Fig. 6 - Coss and Eoss vs. VDS Document Number: 91642 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA22N60EL www.vishay.com Vishay Siliconix 25 VDS = 480 V VDS = 300 V VDS = 120 V 20 20 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 10 5 4 0 0 0 20 40 60 Qg, Total Gate Charge (nC) 25 80 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 50 75 100 125 TC, Case Temperature (°C) 150 Fig. 10 - Maximum Drain Current vs. Case Temperature 100 750 VDS, Drain-to-Source Breakdown Voltage (V) ISD, Reverse Drain Current (A) 15 TJ = 150 °C 10 TJ = 25 °C 1 VGS = 0 V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-Drain Voltage (V) 1.4 Fig. 8 - Typical Source-Drain Diode Forward Voltage Operation in this Area Limited by RDS(on) 100 725 700 675 650 625 ID = 250 μA 600 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM Limited ID, Drain Current (A) 10 100 μs Limited by RDS(on)* 1 1 ms 0.1 10 ms TC = 25 °C TJ = 150 °C Single Pulse BVDSS Limited 0.01 1 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S15-0746-Rev. A, 20-Apr-15 Document Number: 91642 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA22N60EL www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS QG 10 V 90 % QGS 10 % VGS QGD VG td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L Vary tp to obtain required IAS VDS 50 kΩ D.U.T RG + - IAS 12 V 0.2 µF 0.3 µF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S15-0746-Rev. A, 20-Apr-15 Document Number: 91642 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHA22N60EL www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91642. S15-0746-Rev. A, 20-Apr-15 Document Number: 91642 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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