SiHG40N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • Low figure-of-merit (FOM) Ron x Qg 650 RDS(on) typ. () at 25 °C VGS = 10 V • Low input capacitance (Ciss) 0.065 Qg max. (nC) 197 • Reduced switching and conduction losses Qgs (nC) 33 • Ultra low gate charge (Qg) Qgd (nC) 54 • Avalanche energy rated (UIS) Configuration Single • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS D • Server and telecom power supplies TO-247AC • Switch mode power supplies (SMPS) • Power factor correction power supplies (PFC) G • Lighting - High-intensity discharge (HID) S - Fluorescent ballast lighting D S G • Industrial N-Channel MOSFET - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) ORDERING INFORMATION Package TO-247AC Lead (Pb)-free and Halogen-free SiHG40N60E-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 600 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID IDM Linear Derating Factor UNIT V 40 26 A 123 2.63 W/°C Single Pulse Avalanche Energy b EAS 691 mJ Maximum Power Dissipation PD 329 W TJ, Tstg -55 to +150 °C Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dt d Soldering Recommendations (Peak temperature) c for 10 s dV/dt 70 4.5 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 7 A. c. 1.6 mm from case. d. ISD ID, dI/dt = 100 A/μs, starting TJ = 25 °C. S16-0659-Rev. A, 18-Apr-16 Document Number: 91802 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG40N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 0.38 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) Gate-Source Leakage Zero Gate Voltage Drain Current VDS VGS = 0 V, ID = 250 μA 600 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V VGS = ± 20 V - - ± 100 nA μA IGSS IDSS VGS = ± 30 V - - ±1 VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 10 μA - 0.065 0.075 gfs VDS = 30 V, ID = 20 A - 13.5 - S Input Capacitance Ciss 4436 - Coss - 208 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output Capacitance - 6 - Effective Output Capacitance, Energy Related a Co(er) - 126 - Effective Output Capacitance, Time Related b Co(tr) - 542 - - 131 197 - 33 - Drain-Source On-State Resistance Forward Transconductance RDS(on) VGS = 10 V ID = 20 A Dynamic pF VDS = 0 V to 480 V, VGS = 0 V Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd - 54 - Turn-On Delay Time td(on) - 35 70 Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 20 A, VDS = 480 V VDD = 480 V, ID = 20 A, VGS = 10 V, Rg = 9.1 - 71 107 - 127 191 - 66 99 f = 1 MHz, open drain 0.3 0.6 1.2 - - 40 - - 123 nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IS = 6.5 A, VGS = 0 V TJ = 25 °C, IF = IS = 20 A, dI/dt = 100 A/μs, VR = 25 V S - - 1.2 V - 595 1190 ns - 9.9 19.8 μC - 26 52 A Notes a. Co(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S16-0659-Rev. A, 18-Apr-16 Document Number: 91802 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG40N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 90 3.0 TJ = 25 °C ID = 20 A RDS(on), Drain-to-Source On-Resistance (Normalized) ID, Drain-to-Source Current (A) 120 60 30 0 2.0 1.5 1.0 VGS = 10 V 0.5 0 0 5 10 15 VDS, Drain-to-Source Voltage (V) 20 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics 100 000 75 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 50 TJ = 150 °C 10 000 C, Capacitance (pF) ID, Drain-to-Source Current (A) 2.5 25 Ciss 1000 Coss VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 100 Crss 10 1 0 0 5 10 15 VDS, Drain-to-Source Voltage (V) 0 20 100 200 300 400 500 VDS, Drain-to-Source Voltage (V) 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 30 25 TJ = 25 °C TJ = 150 °C 50 Coss Eoss 15 500 Eoss (μJ) 20 Coss (pF) ID, Drain-to-Source Current (A) 5000 100 10 5 VDS = 25 V 0 50 0 5 10 15 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S16-0659-Rev. A, 18-Apr-16 20 0 0 100 200 300 VDS 400 500 600 Fig. 6 - Coss and Eoss vs. VDS Document Number: 91802 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG40N60E www.vishay.com Vishay Siliconix 40 VDS = 480 V VDS = 300 V VDS = 120 V 20 30 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 20 10 4 0 0 0 50 100 150 200 Qg, Total Gate Charge (nC) 250 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 25 50 75 100 125 TC, Case Temperature (°C) 150 Fig. 10 - Maximum Drain Current vs. Case Temperature VDS, Drain-to-Source Breakdown Voltage (V) 750 ISD, Reverse Drain Current (A) 100 TJ = 150 °C 10 TJ = 25 °C 1 VGS = 0 V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-Drain Voltage (V) 1.4 Fig. 8 - Typical Source-Drain Diode Forward Voltage Operation in this area Limited by RDS(on) 725 700 675 650 625 600 575 ID = 250 μA 550 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM limited ID, Drain Current (A) 100 10 100 μs Limited by RDS(on)* 1 ms 1 10 ms 0.1 0.01 TC = 25 °C TJ = 150 °C Single pulse BVDSS limited 1 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S16-0659-Rev. A, 18-Apr-16 Document Number: 91802 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG40N60E www.vishay.com 1 Vishay Siliconix Duty cycle = 0.5 Normalized Effective Transient Thermal Impedance 0.2 0.1 0.1 0.05 0.02 0.01 0.001 Single pulse 0.0001 0.00001 0.0001 0.001 0.01 Pulse Time (s) 0.1 1 Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms VDS QG 10 V 90 % QGS 10 % VGS QGD VG td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform L Vary tp to obtain required IAS Current regulator Same type as D.U.T. VDS 50 kΩ D.U.T RG + - IAS 12 V 0.2 µF 0.3 µF V DD + D.U.T. 10 V tp 0.01 Ω - VDS VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S16-0659-Rev. A, 18-Apr-16 Document Number: 91802 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHG40N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91802. S16-0659-Rev. A, 18-Apr-16 Document Number: 91802 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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