REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED 12-10-29 C. SAFFLE Update boilerplate paragraphs to current MIL-PRF-38535 requirements. Delete references to device class M requirements. - ro A REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY DAN WONNELL STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY RAYMOND MONNIN APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A RAYMOND MONNIN DRAWING APPROVAL DATE 98-01-06 REVISION LEVEL A MICROCIRCUIT, LINEAR, 4-CHANNEL DIFFERENTIAL, ANALOG MULTIPLEXER, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-97620 1 OF 10 5962-E348-12 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 97620 Federal stock class designator \ RHA designator (see 1.2.1) 01 Q E A Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 Circuit function HI-1828A 4-channel differential analog multiplexer 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter E 2 Descriptive designator Terminals GDIP1-T16 or CDIP2-T16 CQCC1-N20 16 20 Package style Dual-in-line Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 2 1.3 Absolute maximum ratings. 1/ Voltage between supply pins ..................................................................................... 40 V +VSUPPLY to ground ................................................................................................. 20 V -VSUPPLY to ground .................................................................................................. 20 V VL to ground .............................................................................................................. 30 V Analog input voltage: +VS ........................................................................................................................ +VSUPPLY + 2 V -VS ......................................................................................................................... -VSUPPLY - 2 V Digital input voltage: +V EN +VA ............................................................................................................ +VSUPPLY -V EN –VA ............................................................................................................. Continuous current, S or D ........................................................................................ Peak current, S or D (pulsed at 1 ms, 10% duty cycle max) ...................................... Junction temperature (TJ) .......................................................................................... -VSUPPLY 20 mA 40 mA +175°C Power dissipation (PD) at +75°C : Case E ................................................................................................................... 1.11 mW Case 2 ................................................................................................................... 1.20 mW Power dissipation (PD) derating factor above +75°C : Case E ................................................................................................................... 11.1 mW/°C Case 2 ................................................................................................................... 12.0 mW/°C Storage temperature range ........................................................................................ -65°C to +150°C Lead temperature (soldering, 10 seconds) ................................................................ +275°C Thermal resistance, junction-to-case (θJC) : Case E.................................................................................................................... 35°C/W Case 2 .................................................................................................................... 25°C/W Thermal resistance, junction-to-ambient (θJA) : Case E.................................................................................................................... 90°C/W Case 2 .................................................................................................................... 83°C/W 1.4 Recommended operating conditions. Operating supply voltage (±VSUPPLY) ....................................................................... ±15 V Ambient operating temperature range (TA) ............................................................... -55°C to +125°C Analog input voltage (VS) .......................................................................................... ±VSUPPLY Logic low level (VAL) .................................................................................................. 0 V to 0.4 V Logic high level (VAH) ................................................................................................ 4.0 V to +VSUPPLY +5.0 V supply (VL) ..................................................................................................... +5.0 V RMS current S or D max ........................................................................................... 11 mA ________ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 4 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55°C ≤ TA ≤ +125°C Group A subgroups Device type Limits Unit +VSUPPLY = +15 V, -VSUPPLY = -15 V, Min Max -1.0 1.0 -1.0 1.0 -10 +10 VL = +5 V, +V EN = 0.4 V unless otherwise specified Input leakage current Leakage current into the source terminal of an “OFF” switch Leakage current into the drain terminal of an “OFF” switch Leakage current from an “ON” driver into the switch (drain) IIH Measure inputs sequentially, connect all unused inputs to GND IIL Measure inputs sequentially, connect all unused inputs to 5V +IS VS = +10 V, VD = -10 V, (OFF) V EN = 4 V, 1 01 01 all unused inputs = -10 V 2,3 -50 +50 -IS VS = -10 V, VD = +10 V, 1 -10 +10 (OFF) V EN = 4 V, all unused inputs = +10 V 2,3 -50 +50 +ID VD = +10 V, V EN = 4 V, 1 -10 +10 (OFF) all unused inputs = -10 V 2,3 -125 +125 -ID VD = -10 V, V EN = 4 V, 1 -10 +10 (OFF) all unused inputs = +10 V 2,3 -125 +125 +ID VS = VD = +10 V, -10 +10 (ON) V EN = 0.4 V, 2,3 -125 +125 1 -10 +10 all unused inputs = +10 V 2,3 -125 +125 VAL = 0.4 V, VAH = 4.0 V, 1,2,3 01 1,2,3 01 1,2,3 01 1 all unused inputs = -10 V Positive supply current 1,2,3 -ID VS = VD = -10 V, (ON) V EN = 0.4 V, I(+) 01 01 0.5 µA nA nA nA mA V EN = 0.4 V Negative supply current I(-) VAL = 0.4 V, VAH = 4.0 V, -1.0 mA V EN = 0.4 V Logic supply current IL VAL = 0.4 V, VAH = 4.0 V, 1.0 mA V EN = 0.4 V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 5 TABLE I. Electrical performance characteristics – Continued. Test Symbol Conditions -55°C ≤ TA ≤ +125°C Group A subgroups Device type Limits Unit +VSUPPLY = +15 V, -VSUPPLY = -15 V, Min Max VL = +5 V, +V EN = 0.4 V unless otherwise specified Switch “ON” resistance +RDS1 -RDS1 Logic level voltage 1 VS = 10 V, ID = 1 mA VS = -10 V, ID = -1 mA VAL Low digital input for all dc tests VAH High digital input for all dc tests Break before make time delay tOPEN RL= 200 Ω, CL = 12.5 pF, Propagation delay times tA Ω 400 2,3 500 1 400 2,3 500 1,2,3 01 0.4 V 4.0 9 01 9 01 5 ns see figure 3 RL = 10 MΩ, CL = 12.5 pF, address inputs to I/O channel times, see figure 3 Enable to I/O 01 500 10,11 9 ns 1000 01 500 ns tON(EN) RL= 200 Ω, CL = 12.5 pF, tOFF(EN) see figure 3 Address capacitance CA V+ = V- = 0 V, f = 1 MHz 1/ 4 01 10 pF Output switch capacitance COS V+ = V- = 0 V, f = 1 MHz 1/ 4 01 25 pF Input switch capacitance CIS V+ = V- = 0 V, f = 1 MHz 1/ 4 01 10 pF Charge transfer error VCTE VS = GND, VGEN = 0 V to 5 V 1/ 4 01 10 mV Off isolation VISO V EN = 4 V, RL = 1 kΩ, 4 01 10,11 1/ 1000 -50 dB CL = 15 pF, VS = 7 V rms, f = 100 kHz 1/ These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 6 Device type 01 Case outline E Terminal number 2 Terminal symbol 1 ADDRESS A1 NC 2 +5 V SUPPLY ADDRESS A1 3 ENABLE +5 V SUPPLY 4 OUT 5 THRU 8 ENABLE 5 IN 8 OUT 5 THRU 8 6 IN 7 NC 7 IN 6 IN 8 8 IN 5 IN 7 9 IN 4 IN 6 10 IN 3 IN 5 11 IN 2 NC 12 OUT 1 THRU 4 IN 4 13 IN 1 IN 3 14 +VSUPPLY IN 2 15 -VSUPPLY OUT 1 THRU 4 16 ADDRESS A0 NC 17 --- IN 1 18 --- +VSUPPLY 19 --- -VSUPPLY 20 --- ADDRESS A0 FIGURE 1. Terminal connections. ADDRESS “ON” A1 A0 L L EN L CHANNELS L H L 2 and 6 1 and 5 H L L 3 and 7 H H L 4 and 8 X X H NONE FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 7 FIGURE 3. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 8 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5, 6, 7, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 9 TABLE II. Electrical test requirements. Test requirements Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) 1 Subgroups (in accordance with MIL-PRF-38535, table III) Device Device class Q class V 1 1,2,3,9 1/ 10,11 1,2,3,4,9, 2/ 10,11 1 1,2,3,9, 1/ 10,11 1,2,3,4,9, 2/ 10,11 1 1 1 --- --- 1/ PDA applies to subgroup 1. 2/ See 4.4.1c. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in MIL-HDBK-103 and QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-97620 A REVISION LEVEL A SHEET 10 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 12-10-29 Approved sources of supply for SMD 5962-97620 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9762001QEA 3/ HI1-1828A/883 5962-9762001Q2A 3/ HI4-1828A/883 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. The last approved source is listed below. Vendor CAGE number 34371 Vendor name and address Intersil Corporation 1001 Murphy Ranch Road Milpitas, CA 95035-6803 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.