96707

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Changes in accordance with NOR 5962-R320-97.
97-10-22
Monica L. Poelking
B
Update boilerplate to MIL-PRF-38535 and updated appendix A. Editorial
changes throughout. - tmh
00-06-14
Monica L. Poelking
REV
SHEET
REV
B
B
B
SHEET
15
16
17
REV STATUS
REV
B
B
B
B
B
B
B
B
B
B
B
B
B
B
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
Thanh V. Nguyen
STANDARD
MICROCIRCUIT
DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
CHECKED BY
Thanh V. Nguyen
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
Monica L. Poelking
DRAWING APPROVAL DATE
95-12-19
AMSC N/A
REVISION LEVEL
B
MICROCIRCUIT, DIGITAL, RADIATION
HARDENED ADVANCED CMOS, NONINVERTING
OCTAL BIDIRECTIONAL BUS TRANSCEIVER
WITH THREE-STATE OUTPUTS, MONOLITHIC
SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-96707
17
5962-E300-00
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
F
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
96707
01
V
Device
type
(see 1.2.2)
/
X
C
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
Generic number
ACS245
02
ACS245A
03 1/
ACS245-02
04 1/
ACS245A-02
Circuit function
Radiation hardened SOS, advanced CMOS,
noninverting octal bidirectional bus
transceiver with three-state outputs
Radiation hardened SOS, advanced CMOS,
noninverting octal bidirectional bus
transceiver with three-state outputs
Radiation hardened SOS, advanced CMOS,
noninverting octal bidirectional bus
transceiver with three-state outputs
Radiation hardened SOS, advanced CMOS,
noninverting octal bidirectional bus
transceiver with three-state outputs
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
R
X
Descriptive designator
CDIP2-T20
CDFP4-F20
Terminals
20
20
Package style
dual-in-line package
flat package
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1/ Device type -02 is the same as device type -01 except that the device type -02 products are manufactured at an overseas
wafer foundry. Device type -02 is used to positively identify, by marketing part number and by brand of the actual device,
material that is supplied by an overseas foundry.
STANDARD
MICROCIRCUIT DRAWING
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APR 97
SIZE
5962-96707
A
REVISION LEVEL
B
SHEET
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (VCC) .................................................................................
DC input voltage range (V IN) ...............................................................................
DC output voltage range (VOUT) ..........................................................................
DC input current, any one input (IIN) ...................................................................
DC output current, any one output (IOUT) ............................................................
Storage temperature range (TSTG) ......................................................................
Lead temperature (soldering, 10 seconds) .........................................................
Thermal resistance, junction-to-case (θJC):
Case outline R ..................................................................................................
Case outline X ..................................................................................................
Thermal resistance, junction-to-ambient (θJA):
Case outline R ..................................................................................................
Case outline X ..................................................................................................
Junction temperature (TJ) ...................................................................................
Maximum package power dissipation at TA = +125°C (PD): 4/
Case outline R ..................................................................................................
Case outline X ..................................................................................................
1.4 Recommended operating conditions. 2/ 3/
Supply voltage range (VCC) .................................................................................
Input voltage range (VIN) .....................................................................................
Output voltage range (VOUT) ...............................................................................
Maximum low level input voltage (VIL)
Device 01, 03 ..................................................................................................
Device 02, 04 ..................................................................................................
Minimum high level input voltage (VIH)................................................................
Case operating temperature range (TC)..............................................................
Maximum input rise and fall time at VCC = 4.5 V (tr, tf) ........................................
Radiation features:
Total dose........................................................................................................
Single event phenomenon (SEP) effective
linear energy threshold (LET) no upsets (see 4.4.4.4) ..................................
Dose rate upset (20 ns pulse) .........................................................................
Latch-up ..........................................................................................................
Dose rate survivability .....................................................................................
-0.5 V dc to +7.0 V dc
-0.5 V dc to VCC + 0.5 V dc
-0.5 V dc to VCC + 0.5 V dc
±10 mA
±50 mA
-65°C to +150°C
+265°C
24°C/W
28°C/W
72°C/W
107°C/W
+175°C
0.69 W
0.47 W
+4.5 V dc to +5.5 V dc
+0.0 V dc to VCC
+0.0 V dc to VCC
30% of VCC
20% of VCC
70% of VCC
-55°C to +125°C
10 ns/V
5
> 3 x 10 Rads (Si)
2
> 100 MeV/(cm /mg) 5/
11
> 1 x 10 Rads (Si)/s 5/
None 5/
12
> 1 x 10 Rads (Si)/s 5/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
1/
2/
3/
4/
5/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Unless otherwise specified, all voltages are referenced to VSS.
The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of
-55°C to +125°C unless otherwise noted.
If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is
based on θJA) at the following rate:
Case R .......................................................................................................................... 13.9 mW/°C
Case X .......................................................................................................................... 9.3 mW/°C
Guaranteed by design or process but not tested.
STANDARD
MICROCIRCUIT DRAWING
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APR 97
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5962-96707
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REVISION LEVEL
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3
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-973 MIL-STD-1835 -
Test Method Standard Microcircuits.
Configuration Management.
Interface Standard For Microcircuit Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings (SMD's).
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveform and test circuit. The switching waveforms and test circuits shall be as specified on figure 4.
3.2.6 Radiation exposure circuit. The radiation test connections shall be as specified in table III herein.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
STANDARD
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APR 97
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A
REVISION LEVEL
B
SHEET
4
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered
to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 37 (see MIL-PRF-38535, appendix A).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be
in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96707
A
REVISION LEVEL
B
SHEET
5
TABLE I. Electrical performance characteristics.
Test
High level output
voltage
Symbol
VOH
Device
type
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
For all inputs affecting
output under test
VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
01, 03
4.5 V
Limits 2/
01, 03
M, D, L, R, F 3/
5.5 V
4.40
1
4.40
1, 2, 3
5.40
1
5.40
1, 2, 3
4.40
1
4.40
1, 2, 3
5.40
1
5.40
01, 03
For all inputs affecting
output under test
VIN = 3.15 V or 0.9 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
02, 04
M, D, L, R, F 3/
4.5 V
02, 04
For all inputs affecting
output under test
VIN = 3.85 V or 1.1 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
02, 04
M, D, L, R, F 3/
5.5 V
02, 04
For all inputs affecting
output under test
VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
01, 03
M, D, L, R, F 3/
4.5 V
For all inputs affecting
output under test
VIN = 5.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
01, 03
M, D, L, R, F 3/
5.5 V
V
V
1, 2, 3
0.1
1
0.1
1, 2, 3
0.1
1
0.1
01, 03
01, 03
Unit
Max
1, 2, 3
01, 03
For all inputs affecting
output under test
VIN = 5.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
VOL
Group A
subgroups
Min
M, D, L, R, F 3/
Low level output
voltage
VCC
V
See footnotes at end of table.
STANDARD
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COLUMBUS, OHIO 43216-5000
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REVISION LEVEL
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6
TABLE I. Electrical performance characteristics - Continued.
Test
Low level output
voltage
Symbol
VOL
Device
type
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
For all inputs affecting
output under test
VIN = 3.15 V or 0.9 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
02, 04
02, 04
M, D, L, R, F 3/
VT+
02, 04
VT-
02, 04
02, 04
M, D, L, R, F 3/
IIL
For input under test, VIN = 5.5 V
For all other inputs
VIN = VCC or GND
All
IOH
4/
1, 2, 3
0.1
1
0.1
4.5 V
1, 2, 3
2.15
3.15
1
2.15
3.15
4.5 V
1, 2, 3
0.90
1.90
1
0.90
1.90
4.5 V
1, 2, 3
0.80
2.25
1
0.80
2.25
5.5 V
1
+0.5
2, 3
+1.0
1
+1.0
1
-0.5
2, 3
-1.0
1
-1.0
All
For input under test, VIN = GND
For all other inputs
VIN = VCC or GND
All
M, D, L, R, F 3/
Output current high
(Source)
0.1
02, 04
M, D, L, R, F 3/
Input current low
1
02, 04
VH
IIH
5.5 V
5.5 V
All
01, 03
For all inputs affecting output
under test, VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
VOUT = 4.1 V
M, D, L, R, F 3/
1
-16.0
2, 3
-12.0
1
-12.0
1
-12.0
2, 3
-8.0
1
-8.0
4.5 V
01, 03
02, 04
For all inputs affecting output
under test, VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
VOUT = 4.1 V
M, D, L, R, F 3/
4.5 V
02, 04
Unit
Max
0.1
02, 04
M, D, L, R, F 3/
Input current high
Limits 2/
1, 2, 3
02, 04
M, D, L, R, F 3/
Hysteresis
(VT+ - VT-)
4.5 V
02, 04
For all inputs affecting
output under test
VIN = 3.85 V or 1.1 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
Negative-going
threshold
Group A
subgroups
Min
M, D, L, R, F 3/
Positive-going
threshold
VCC
V
V
V
V
µA
µA
mA
mA
See footnotes at end of table.
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REVISION LEVEL
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TABLE I. Electrical performance characteristics - Continued.
Test
Output current low
(Sink)
Symbol
IOL
4/
Device
type
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
IOZH
01, 03
For all inputs affecting output
under test, VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
VOUT = 0.4 V
Three-state output
leakage current
low
IOZL
02, 04
VOUT = 0.4 V
02, 04
Quiescent supply
current
ICC
M, D, L, R, F 3/
OE = 5.5 V
For all other inputs
VIN = 0.0 V or 5.5 V
All
M, D, L, R, F 3/
All
M, D, L, R, F 3/
CIN
12.0
1
12.0
1
12.0
2, 3
8.0
1
8.0
5.5 V
VIN = VCC or GND
All
01, 03
2, 3
+35.0
1
+35.0
1
-1.0
2, 3
-35.0
1
-35.0
1
20.0
2, 3
400.0
1
400.0
4
15
4
10
4
10
4
20
4
75
5, 6
75
4
53
5, 6
60
5.5 V
5.5 V
5.0 V
02, 04
I/O capacitance
CI/O
01, 03
5.0 V
02, 04
Power dissipation
capacitance
CPD
5/
01, 03
5.0 V
02, 04
Functional test
6/
VIH = 3.15 V, VIL = 1.35 V
See 4.4.1b
01, 03
M, D, L, R, F 3/
4.5 V
7, 8
L
H
7
L
H
7, 8
L
H
7
L
H
01, 03
VIH = 3.15 V, VIL = 0.9 V
See 4.4.1b
02, 04
M, D, L, R, F 3/
4.5 V
mA
+1.0
All
VIH = 5.0 V, VIL = 0.0 V
f = 1 MHz, see 4.4.1c
mA
1
All
M, D, L, R, F 3/
Input capacitance
2, 3
4.5 V
02, 04
Unit
Max
16.0
All
OE = 5.5 V
For all other inputs
VIN = 0.0 V or 5.5 V
VOUT = 0.0 V
Limits 2/
1
4.5 V
01, 03
For all inputs affecting output
under test, VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
VOUT = 5.5 V
Group A
subgroups
Min
M, D, L, R, F 3/
Three-state output
leakage current
high
VCC
µA
µA
µA
pF
pF
pF
See footnotes at end of table.
STANDARD
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REVISION LEVEL
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TABLE I. Electrical performance characteristics - Continued.
Test
Propagation delay
time, An to Bn or
Bn to An
Symbol
tPLH
7/
Device
type
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
02, 04
M, D, L, R, F 3/
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
02, 04
M, D, L, R, F 3/
tPZH
7/
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
02, 04
M, D, L, R, F 3/
8.5
10, 11
1.0
10.0
9
1.0
10.0
9
2.0
12.0
10, 11
2.0
12.0
9
2.0
12.0
9
1.0
8.0
10, 11
1.0
9.0
9
1.0
9.0
9
2.0
12.0
10, 11
2.0
12.0
9
2.0
12.0
9
2.0
12.5
10, 11
2.0
15.0
9
2.0
15.0
9
2.0
20.0
10, 11
2.0
20.0
9
2.0
20.0
9
2.0
11.5
10, 11
2.0
15.0
9
2.0
15.0
9
2.0
20.0
10, 11
2.0
20.0
9
2.0
20.0
9
2.0
14.5
10, 11
2.0
15.0
9
2.0
15.0
9
2.0
20.0
10, 11
2.0
20.0
9
2.0
20.0
4.5 V
4.5 V
4.5 V
4.5 V
4.5 V
02, 04
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
4.5V
01, 03
02, 04
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
tPHZ
7/
1.0
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
Propagation delay
time, output
disable, OE to
An or Bn
9
4.5 V
02, 04
M, D, L, R, F 3/
tPZL
7/
Max
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
4.5 V
02, 04
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
4.5 V
01, 03
02, 04
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
Limits 2/
Min
02, 04
M, D, L, R, F 3/
Propagation delay
time, output
enable, OE to
An or Bn
Group A
subgroups
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
tPHL
7/
VCC
4.5 V
02, 04
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
See footnotes at end of table.
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TABLE I. Electrical performance characteristics - Continued.
Test
Propagation delay
time, output
disable, OE to
An or Bn
Symbol
tPLZ
7/
Device
type
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
02, 04
M, D, L, R, F 3/
tTHL,
tTLH
7/
Group A
subgroups
Max
9
2.0
13.5
10, 11
2.0
14.5
9
2.0
14.5
9
2.0
20.0
10, 11
2.0
20.0
9
2.0
20.0
9
1.0
5.0
10, 11
1.0
5.0
9
1.0
5.0
4.5 V
4.5 V
02, 04
All
CL = 50 pF
RL = 500Ω
See figure 4
M, D, L, R, F 3/
Limits 2/
Min
01, 03
CL = 50 pF
RL = 500Ω
See figure 4
Output transition
time
VCC
4.5 V
All
Unit
ns
ns
ns
1/
Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table I herein.
Output terminals not designated shall be high level logic, low level logic, or open, except for the ICC test, the output terminals shall be
open. When performing the ICC test, the current meter shall be placed in the circuit such that all current flows through the meter.
2/
For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the
direction of current flow respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum
limits, as applicable, listed herein.
3/
Devices supplied to this drawing meet all levels M, D, L, R, and F of irradiation. However, this device is only tested at the "F" level.
Pre and post irradiation values are identical unless otherwise specified in table I. When performing post irradiation electrical
measurements for any RHA level, TA = +25°C.
4/
Force/Measure functions may be interchanged.
5/
Power dissipation capacitance (CPD) determines both the power consumption (PD) and current consumption (IS). Where
PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC)
IS = (CPD + CL) VCCf + ICC
f is the frequency of the input signal.
6/
The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to
output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. For V OUT measurements, L ≤
0.5 V and H ≥ 4.0 V.
7/
AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V. For propagation delay tests, all paths must be tested.
STANDARD
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REVISION LEVEL
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Device type
All
Case outlines
R and X
Terminal
number
Terminal
symbol
Terminal
number
Terminal
symbol
1
DIR
11
B7
2
A0
12
B6
3
A1
13
B5
4
A2
14
B4
5
A3
15
B3
6
A4
16
B2
7
A5
17
B1
8
A6
18
B0
9
A7
19
OE
10
GND
20
VCC
FIGURE 1. Terminal connections.
Inputs
Operation
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
H = High voltage level
L = Low voltage level
X = Immaterial
FIGURE 2. Truth table.
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FIGURE 3. Logic diagram.
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NOTES:
1.
When measuring tPZL and tPLZ, S1 is closed and S2 is open.
2.
When measuring tPLH, tPHL, tPZH, and tPHZ, S1 is open and S2 is closed.
3.
CL = 50 pF minimum or equivalent (includes test jig and probe capacitance).
4.
RL = 500Ω or equivalent.
5.
Input signal from pulse generator: VIN = 0.0 V to VCC; PRR ≤ 10 MHz; tr ≤ 3.0 ns; tf ≤ 3.0 ns; tr and tf shall be measured from 10%
VCC to 90% VCC and from 90% VCC to 10% VCC, respectively.
FIGURE 4. Switching waveforms and test circuit.
STANDARD
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4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of
MIL-PRF-38535 permits alternate in-line control testing. Quality conformance inspection for device class M shall be in
accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be
those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in
accordance with MIL-STD-883, test method 5012 (see 1.5 herein).
c.
Subgroup 4 (CIN, CI/O and CPD measurement) shall be measured only for the initial qualification and after process or
design changes which may affect capacitance. CIN, CI/O shall be measured between the designated terminal and
GND at a frequency of 1 MHz. For CIN, CI/O and CPD the tests shall be sufficient to validate the limits defined in table I
herein.
TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
1, 7, 9
1, 7, 9
1, 7, 9
Final electrical
parameters (see 4.2)
1, 2, 3, 7, 8, 9, 10, 11
1/
1, 2, 3, 7, 8, 9,
10, 11 1/
1, 2, 3, 7, 8,
9, 10, 11 2/ 3/
Group A test
requirements (see 4.4)
1, 2, 3, 4, 5, 6, 7, 8,
9, 10, 11
1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11
1, 2, 3, 4, 7,
8, 9, 10, 11
Group C end-point electrical
parameters (see 4.4)
1, 2, 3, 7, 8, 9, 10, 11
1, 2, 3, 7, 8, 9,
10, 11
1, 2, 3, 7, 8,
9, 10, 11 3/
Group D end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
Group E end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
1/ PDA applies to subgroup 1 and 7.
2/ PDA applies to subgroups 1, 7, 9 and deltas.
3/ Delta limits as specified in table IIB shall be required where specified, and the delta limits shall be completed
with reference to the zero hour electrical parameters (see Table I)
TABLE IIB. Burn-in and operating life test, Delta parameters (+25°C).
Parameters 1/
Delta limits
ICC
±4 µA
IOL/IOH
±15%
IOZL/IOZH
±200 nA
1/ These parameters shall be recorded before and after the required burn-in
and life test to determine delta limits.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
STANDARD
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REVISION LEVEL
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4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein). RHA levels for device classes M, Q and V shall be as specified in MIL-PRF-38535. End-point
electrical parameters shall be as specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019 and as specified herein.
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater
than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the
pre-irradiation end-point electrical parameter limit at +25°C ±5°C. Testing shall be performed at initial qualification and after
any design or process changes which may affect the RHA response of the device.
4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test
method 1020 of MIL-STD-883 and as specified herein (see 1.4 herein). Tests shall be performed on devices, SEC, or approved
test structures at technology qualification and after any design or process changes which may effect the RHA capability of the
process.
4.4.4.3 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with test method 1021 of MILSTD-883 and herein (see 1.4 herein).
a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes
which may effect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.
b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-PRF-38535.
4.4.4.4 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.4 herein). SEP testing shall
be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by
the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup
characteristics. The recommended test conditions for SEP are as follows:
a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤
angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b. The fluence shall be ≥ 100 errors or ≥ 10 ions/cm .
6
2
5
2
2
c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d. The particle range shall be ≥ 20 microns in silicon.
e. The test temperature shall be +25°C and the maximum rated operating temperature ±10°C.
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f. Bias conditions shall be defined by the manufacturer for latchup measurements.
g. Test four devices with zero failures.
4.5 Methods of inspection. Methods of inspection shall be as specified as follows:
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
Table III. Irradiation test connections. 1/
Open
Ground
VCC = 5 V ± 0.5 V
-
10
1, 2, 3, 4, 5, 6, 7, 8, 9,
11, 12, 13, 14, 15, 16,
17, 18, 19, 20
1/ Each pin except VDD and GND will have a series resistor of 47KΩ ±5%, for irradiation testing.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692,
Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0525.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone
(614) 692-0674.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
GND ............................................
ICC ................................................
IIL .................................................
IIH .................................................
TC.................................................
TA .................................................
VCC...............................................
CIN ...............................................
COUT .............................................
CPD...............................................
Ground zero voltage potential.
Quiescent supply current.
Input current low.
Input current high.
Case temperature.
Ambient temperature.
Positive supply voltage.
Input terminal-to-GND capacitance.
Output terminal-to-GND capacitance.
Power dissipation capacitance.
STANDARD
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DSCC FORM 2234
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SIZE
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A
REVISION LEVEL
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16
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
6.7 Additional information. A copy of the following additional data shall be maintained and available from the device
manufacturer:
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of upsets (SEP).
d. Number of transients (SEP).
e. Occurrence of latchup (SEP).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
B
SHEET
17
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 9xApproved sources of supply for SMD 5962-96707 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962F9670701VRC
34371
ACS245DMSR
5962F9670701VXC
34371
ACS245KMSR
5962F9670702VRC
34371
ACS245ADMSR
5962F9670702VXC
34371
ACS245AKMSR
5962F9670703VRC
34371
ACS245DMSR-02
5962F9670703VXC
34371
ACS245KMSR-02
5962F9670704VRC
34371
ACS245ADMSR-02
5962F9670704VXC
34371
ACS245AKMSR-02
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
PO Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.