DATASHEET

ACS374MS
Radiation Hardened
Octal D Flip-Flop, Three-State
April 1995
Features
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD FINISH C
TOP VIEW
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose 300K RAD (Si)
• Single Event Upset (SEU) Immunity
<1 x 10-10 Errors/Bit-Day (Typ)
OE
1
Q0
2
19 Q7
D0
3
18 D7
• Dose Rate Upset >1011 RAD (Si)/s, 20ns Pulse
D1
4
17 D6
• Latch-Up Free Under Any Conditions
Q1
5
16 Q6
Q2
6
15 Q5
D2
7
14 D5
D3
8
13 D4
Q3
9
12 Q4
GND 10
11 CP
• SEU LET Threshold >80 MEV-cm2/mg
• Military Temperature Range:
-55oC
to
+125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
20 VCC
20 LEAD CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C
TOP VIEW
- VIH = 70% of VCC Min
• Input Current ≤1µA at VOL, VOH
Description
The Intersil ACS374MS is a radiation hardened octal D-type flipflop with three-state outputs. The eight edge-triggered flip-flops
enter data into their registers on the low to high transition of clock
(CP). The Output Enable (OEN) controls the three-state outputs
and is independent of the register operation. When the OEN is
high, the outputs will be in the high impedance state.
The ACS374MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of the
radiation hardened, high-speed, CMOS/SOS Logic Family.
OE
1
20
VCC
Q0
2
19
Q7
D0
3
18
D7
D1
4
17
D6
Q1
5
16
Q6
Q2
6
15
Q5
D2
7
14
D5
D3
8
13
D4
Q3
9
12
Q4
10
11
CP
GND
Ordering Information
PART NUMBER
ACS374DMSR
TEMPERATURE RANGE
-55oC to +125oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
-55oC to +125oC
+25oC
+25oC
+25oC
ACS374KMSR
ACS374D/Sample
ACS374K/Sample
ACS374HMSR
Truth Table
Functional Diagram
INPUTS
OE
CP
OUTPUTS
Dn
Qn
L
H
H
L
L
L
L
X
X
Q0
H
X
X
Z
H = High Level
L = Low Level
Q0
X = Immaterial
Z = High Impedance
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
1 OF 8
FF
D
D
Q
Q
CP
OE
COMMON CONTROLS
CP
= Transition from Low to High Level
= the level of Q before the indicated input conditions
were established
OE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
518820
File Number 3997
Spec Number
Specifications ACS374MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V
Input Voltage Range . . . . . . . . . . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±50mA
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
(All Voltages Reference to VSS)
Thermal Impedance
θJA
θJC
DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
72oC/W
24oC/W
Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . 107oC/W 28oC/W
Maximum Package Power Dissipation at +125oC
DIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7W
Flatpack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5W
Maximum Device Power Dissipation. . . . . . . . . . . . . . . . . . .(TBD)W
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Gates
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . VCC to 70% of VCC
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . .0V to 30% of VCC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . 10ns/V Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
Output Current
(Source)
Output Current
(Sink)
Output Voltage High
Output Voltage Low
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
20
µA
2, 3
+125oC, -55oC
-
400
µA
1
+25oC
-12
-
mA
2, 3
+125oC, -55oC
-8
-
mA
1
+25oC
12
-
mA
2, 3
+125oC, -55oC
8
-
mA
VCC = 5.5V, VIH = 3.85V
VIL = 1.65V, IOH = -50µA
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1
-
V
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = -50µA
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1
-
V
VCC = 5.5V, VIH = 3.85V
VIL = 1.65V, IOH = 50µA
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = 50µA
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1
+25oC
-
±0.5
µA
2, 3
+125oC, -55oC
-
±1.0
µA
1
+25oC
-
±1
µA
2, 3
+125oC, -55oC
-
±35
µA
7, 8A, 8B
+25oC, +125oC, -55oC
-
-
V
(NOTE 1)
CONDITIONS
SYMBOL
ICC
IOH
IOL
VOH
VOL
IIN
IOZ
FN
VCC = 5.5V,
VIN = VCC or GND
VCC = VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V, (Note 2)
VCC = VIH = 4.5V,
VOUT = 0.4V,
VIL = 0V, (Note 2)
VCC = 5.5V,
VIN = VCC or GND
VCC = 5.5V,
Force Voltage = 0V or VCC
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, (Note 3)
LIMITS
NOTES:
1. All voltages referenced to device GND.
2. Force/measure functions may be interchanged.
3. For functional tests, VO ≥4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”.
Spec Number
2
518820
Specifications ACS374MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
(NOTES 1, 2)
CONDITIONS
SYMBOL
TPHL1
TPLH1
TPZL1
TPZH1
TPLZ1
TPHZ1
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
2
14
ns
10, 11
+125oC, -55oC
2
17
ns
9
+25oC
2
16
ns
10, 11
+125oC, -55oC
2
20
ns
9
+25oC
2
15
ns
10, 11
+125oC, -55oC
2
19
ns
9
+25oC
2
16
ns
10, 11
+125oC, -55oC
2
20
ns
9
+25oC
2
15
ns
10, 11
+125oC, -55oC
2
19
ns
9
+25oC
2
15
ns
10, 11
+125oC, -55oC
2
19
ns
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
LIMITS
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
Output Capacitance
Pulse Width Time
Setup Time
Hold Time
Maximum Frequency
CP
SYMBOL
CPD
CIN
COUT
TW
TSU
TH
FMAX
CONDITIONS
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
NOTE
TEMP
MIN
TYP
MAX
UNITS
1
+25oC
-
25
-
pF
+125oC
-
30
-
pF
+25oC
-
-
10
pF
+125oC
-
-
10
pF
+25oC
-
-
20
pF
+125oC
-
-
20
pF
+25oC
4.5
-
-
ns
+125oC
5
-
-
ns
+25oC
3.5
-
-
ns
+125oC
4
-
-
ns
+25oC
3.5
-
-
ns
+125oC
4
-
-
ns
+25oC
0
-
100
MHz
+125oC
0
-
100
MHz
1
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
1
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
1
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
1
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
1
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
1
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number
3
518820
Specifications ACS374MS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
RAD LIMITS
PARAMETER
(NOTE 1)
CONDITIONS
SYMBOL
TEMP
MIN
MAX
UNITS
Supply Current
ICC
VCC = 5.5V, VIN = VCC or GND
+25oC
-
400
µA
Output Current (Source)
IOH
VCC = VIH = 4.5V,
VOUT = VCC -0.4V, VIL = 0
+25oC
-8
-
mA
Output Current (Sink)
IOL
VCC = VIH = 4.5V, VOUT = 0.4V,
VIL = 0
+25oC
8
-
mA
Output Voltage High
VOH
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOH = -50µA
+25oC
VCC -0.1
-
V
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = -50µA
+25oC
VCC -0.1
-
V
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOH = 50µA
+25oC
-
0.1
V
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = 50µA
+25oC
-
0.1
V
Output Voltage Low
VOL
Input Leakage Current
IIN
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±1
µA
Three-State Output
Leakage Current
IOZ
VCC = 5.5V,
Force Voltage = 0V or VCC
+25oC
-
±35
µA
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, (Note 2)
+25oC
-
-
V
TPHL1
VCC = 4.5V, VIH = 4.5V, VIL = 0V
+25oC
2
17
ns
TPLH1
VCC = 4.5V, VIH = 4.5V, VIL = 0V
+25oC
2
20
ns
TPZL1
VCC = 4.5V, VIH = 4.5V, VIL = 0V
+25oC
2
19
ns
TPZH1
VCC = 4.5V, VIH = 4.5V, VIL = 0V
+25oC
2
20
ns
TPLZ1
VCC = 4.5V, VIH = 4.5V, VIL = 0V
+25oC
2
19
ns
TPHZ1
VCC = 4.5V, VIH = 4.5V, VIL = 0V
+25oC
2
19
ns
Propagation Delay
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO ≥4.0V is recognized as a logic “1”, and VO ≤0.5V is recognized as a logic “0”.
TABLE 5. DELTA PARAMETERS (+25oC)
PARAMETER
SYMBOL
(NOTE1)
DELTA LIMIT
UNITS
Supply Current
ICC
±4.0
µA
Three-State Leakage Current
IOZ
±200
nA
Output Current
IOL/IOH
±15
%
NOTE:
1. All delta calculations are referenced to 0 hour readings or pre-life readings.
Spec Number
4
518820
Specifications ACS374MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
METHOD
GROUP A SUBGROUPS
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test 1 (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
Interim Test 2 (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H, IOZL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test 3 (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group A (Note 1)
Group B
Group D
READ AND RECORD
ICC, IOL/H, IOZL/H
Subgroups 1, 2, 3, 9, 10, 11
NOTE:
1. Alternate Group A testing may be exercised in accordance with MIL-STD-883, Method 5005.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE GROUP
Group E Subgroup 2
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. BURN-IN TEST CONNECTIONS (+125oC < TA < 139oC)
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ±0.5V
VCC = 6V ±0.5V
50kHz
25kHz
1, 3, 4, 7, 8, 10, 11,
13, 14, 17, 18
2, 5, 6, 9, 12, 15, 16, 19
20
-
-
10
2, 5, 6, 9, 12, 15, 16, 19
1, 3, 4, 7, 8, 11, 13,
14, 17, 18, 20
-
-
1, 10
2, 5, 6, 9, 12, 15, 16, 19
20
11
3, 4, 7, 8, 13,
14, 17, 18
STATIC BURN-IN 1 (Note 1)
STATIC BURN-IN 2 (Note 1)
DYNAMIC BURN-IN (Note 1)
NOTE:
1. Each pin except VCC and GND will have a series resistor of 500Ω ±5%.
TABLE 9. IRRADIATION TEST CONNECTIONS (TA = +25oC, ±5oC)
FUNCTION
Irradiation Circuit (Note 1)
OPEN
GROUND
VCC = 5V ±0.5V
2, 5, 6, 9, 12, 15, 16, 19
10
1, 3, 4, 7, 8, 11, 13, 14, 17, 18, 20
NOTE:
1. Each pin except VCC and GND will have a series resistor of 47kΩ ±5%. Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures.
Spec Number
5
518820
ACS374MS
Intersil - Space Products MS Screening
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM)
100% Static Burn-In 2 Method 1015, 24 Hours at +125oC Min
Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Interim Electrical Test 2 (Note 1)
100% Nondestructive Bond Pull Method 2023
100% Dynamic Burn-In Method 1015, 240 Hours at +125oC
or 180 Hours at +135oC
100% Internal Visual Inspection Method 2010
100% Interim Electrical Test 3 (Note 1)
100% Temperature Cycling Method 1010 Condition C
(-65o to +150oC)
100% Final Electrical Test
100% Constant Acceleration
100% Radiographics Method 2012 (2 Views)
100% PIND Testing
100% External Visual Method 2009
100% External Visual Inspection
Group A (All Tests) Method 5005 (Class S)
100% Serialization
Group B (Optional) Method 5005 (Class S) (Note 2)
100% Initial Electrical Test
Group D (Optional) Method 5005 (Class S) (Note 2)
100% Static Burn-In 1 Method 1015, 24 Hours at +125oC Min
CSI and/or GSI (Optional) (Note 2)
100% Interim Electrical Test 1 (Note 1)
Data Package Generation (Note 3)
100% Fine and Gross Seal Method 1014
NOTES:
1. Failures from interim electrical tests 1 and 2 are combined for determining PDA (PDA = 5% for subgroups 1, 7, 9 and delta failures combined, PDA = 3% for subgroup 7 failures). Interim electrical tests 3 PDA (PDA = 5% for subgroups 1, 7, 9 and delta failures combined,
PDA = 3% for subgroup 7 failures).
2. These steps are optional, and should be listed on the purchase order if required.
3. Data Package Contents:
Cover Sheet (P.O. Number, Customer Number, Lot Date Code, Intersil Number, Lot Number, Quantity).
Certificate of Conformance (as found on shipper).
Lot Serial Number Sheet (Good Unit(s) Serial Number and Lot Number).
Variables Data (All Read, Record, and delta operations).
Group A Attributes Data Summary.
Wafer Lot Acceptance Report (Method 5007) to include reproductions of SEM photos. NOTE: SEM photos to include percent of step coverage.
X-Ray Report and Film, including penetrometer measurements.
GAMMA Radiation Report with initial shipment of devices from the same wafer lot; containing a Cover Page, Disposition, RAD Dose,
Lot Number, Test Package, Spec Number(s), Test Equipment, etc. Irradiation Read and Record data will be on file at Intersil.
Propagation Delay Timing Diagram and Load Circuit
DUT
VIH
VS
TEST
POINT
RL
500Ω
CL
50pF
INPUT
VSS
TPLH
TPHL
VOH
VS
OUTPUT
AC VOLTAGE LEVELS
VOL
PARAMETER
ACS
UNITS
VCC
4.50
V
VIH
4.50
V
VS
2.25
V
VIL
0
V
GND
0
V
Spec Number
6
518820
ACS374MS
Pulse Width, Setup, Hold Timing Diagram Positive Edge Trigger and AC Load Circuit
INPUT
VIH
DUT
TW
TEST
POINT
RL
500Ω
CL
50pF
VS
VIL
TSU
INPUT CP
VIH
TH
TW
PULSE WIDTH, SETUP, HOLD VOLTAGE LEVELS
VS
VIL
PARAMETER
VCC
VIH
VS
VIL
GND
TH = HOLD TIME
TSU = SETUP TIME
TW = PULSE WIDTH
ACS
UNITS
4.50
4.50
2.25
0
0
V
V
V
V
V
Three-State High Timing Diagram and Load Circuit
DUT
VIH
VS
INPUT
RL
500Ω
CL
50pF
VSS
TPZH
TEST
POINT
TPHZ
VOH
VT
OUTPUT
VW
VOZ
PULSE WIDTH, SETUP, HOLD VOLTAGE LEVELS
PARAMETER
VCC
VIH
VS
VT
VW
GND
ACS
UNITS
4.50
4.50
2.25
2.25
3.60
0
V
V
V
V
V
V
Three-State Low Timing Diagram and Load Circuit
VCC
VIH
VS
INPUT
RL
500Ω
VSS
TPZL
TPLZ
VT
OUTPUT
TEST
POINT
DUT
VOZ
CL
50pF
VW
VOL
PULSE WIDTH, SETUP, HOLD VOLTAGE LEVELS
PARAMETER
VCC
VIH
VS
VT
VW
GND
ACS
UNITS
4.50
4.50
2.25
2.25
0.90
0
V
V
V
V
V
V
Spec Number
7
518820
ACS374MS
Die Characteristics
DIE DIMENSIONS:
102 mils x 102 mils
2,600mm x 2,600mm
DIE ATTACH:
Material: Silver Glass or JM 7000 after 7/1/95
WORST CASE CURRENT DENSITY:
< 2.0 x 105A/cm2
METALLIZATION:
Type: AlSiCu
Metal 1 Thickness: 6.75kÅ (Min), 8.25kÅ (Max)
Metal 2 Thickness: 9kÅ (Min), 11kÅ (Max)
BOND PAD SIZE:
> 4.3 mils x 4.3 mils
> 110µm x 110µm
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ±1kÅ
Metallization Mask Layout
ACS374MS
D0
(3)
Q0
(2)
OE
(1)
VCC
(20)
Q7
(19)
D7
(18)
D1 (4)
(17) D6
Q1 (5)
(16) Q6
NC
NC
NC
NC
Q2 (6)
(15) Q5
D2 (7)
(14) D5
(8)
D3
(9)
Q3
(10)
GND
(11)
CP
(12)
Q4
(13)
D4
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
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Spec Number
8
518820