bd9g101g e

Datasheet
Single-chip Type with Built-in FET Switching Regulators
Simple Step-down
Switching Regulators
with Built-in Power MOSFET
BD9G101G
●General Description
The BD9G101G is switching regulator with integrated
internal high-side 42V Power MOSFET.
It provides 0.5A DC output with small SOT-23 package.
Operating frequency is fixed 1.5MHz, allowing the use
of small inductor and ceramic capacitor.
The components of phase compensation is built in.
The BD9G101G is available in SOT-23-6(SSOP6)
package.
●Features
■ High and Wide Input Range (VCC=6V~42V)
■ 45V/800mΩ Internal Power MOSFET
■ 1.5MHz Fixed Operating Frequency
■ Feedback Pin Voltage 0.75V±1.5%
■ Internal compensated
■ Internal Over Current protection, Under
Voltage Locked Out, Thermal shutdown
■ 0μA Shutdown Supply Current
■ 6-Lead SOT-23 package(SSOP6)
●Key Specifications
■ Input Voltage
■ Ref. Precision (Ta=25℃)
(Ta=-25~105℃)
■ Max Output Current
■ Operating Temperature
■ Max Junction Temperature
●Packages
SSOP6
6~42 [V]
±1.5[%]
±2.0[%]
0.5 [A] (Max.)
-40℃~105℃
150℃
2.90 ㎜×2.80 ㎜×1.25 ㎜
SSOP6
●Applications
■ Industrial distributed power applications
■ Automotive Applications
■ Battery powered equipment
■ OA instruments
●Typical Application Circuits
15000pF
5V/0.5A
L1: 6.8μH
Lx
BST
D1
GND
VCC
C2:10μF/25V
VCC
C1:4.7μF/50V
FB
680Ω
0.1μF
EN
ON/OFF control
3.9k
Figure 1. Typical Application Circuit
○Structure:Silicon Monolithic Integrated Circuit
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○This product is not designed for normal operation with in a radioactive.
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BD9G101G
●Pin Configuration
BST
1
6
Lx
GND
2
5
VCC
FB
3
4
EN
Figure 2. Pin Configuration (TOP VIEW)
●Pin Description
Pin No.
Pin Name
Description
1
BST
The pin is power supply for floating Power NMOS driver. Connected a
bypass capacitor between the pin and Lx pin for bootstrap operation.
2
GND
Ground. It should be connected as possible to the output capacitor ground
avoiding the high current switch paths.
3
FB
Voltage feedback pin. This pin is error-amp input, the DCDC is set 0.75V at
this pin with feed-back operation.
4
EN
Enable input pin. The DCDC is start-up to apply over 2.0V.
This pin is pull-down about 550kΩ, the DCDC is shutdown to open or apply
under 0.8V.
5
VCC
6
Lx
Input supply. It should be connected as near as possible to the bypass
capacitor.
Power FET switch output. It should be connected as near as possible to the
schottky barrier diode, and inductor.
●Block Diagram
ON/OFF
EN
VCC
TSD
UVLO
Reference
REG
VREF
Current Sense
AMP
shutdown
FB
0.75V
+
+
Error
AMP
OCP
Σ
Current
Comparator
R Q
+
S BST
800mΩ
VOUT
LX
Soft
Start
Oscillator
1.5MHz
GND
Figure 3. Block Diagram
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BD9G101G
●Description of Blocks
1.
Reference
This block generates reference voltage and current. It start operation by applying EN more than 2.0V.
It provides reference voltage and current to error-amp , oscillator ,and etc.
2.
REG
This is a gate drive voltage generator and 4.2V regulator for internal circuit power supply.
3.
OSC
This is a precise wave oscillation circuit with operation frequency fixed to 1.5MHz fixed.
To protect from output shorted to GND, Frequency fold-back function is built in.
4.
Soft Start
This block does Soft Start to the output voltage of DC/DC comparator, and prevents in-rush current during Start-up.
Soft Start Time depend on application and start-condition because Frequency fold-back function is built in.
5.
ERROR AMP
This is an error amplifier what detects output signal, and outputs PWM control signal.
Internal reference voltage is set to 0.75V. Also, the BD9G101G has internal phase compensated element between
input and output.
6.
Current Comparator
This is a comparator that outputs PWM signal from current feed-back signal and error-amp output for current-mode.
7.
Nch FET SW
This is an 45V/800mΩ Power Nch MOSFET SW that converts inductor current of DC/DC converter.
8.
UVLO
This is a low voltage error prevention circuit.
This prevents internal circuit error during increase of power supply voltage and during decline of power supply voltage.
It monitors VCC pin voltage, And when VCC voltage becomes 5.4V and below, it turns OFF all output FET and turns
OFF DC/DC comparator output, and Soft Start circuit resets.
Now this Threshold has hysteresis of 200mV.
9.
EN
When a Voltage of 2.0V or more is applied, it turns ON, at Open or 0V application, it turns OFF.
About 550kΩ Pull-down Resistance is contained within the Pin.
10. OCP
The current of power MOSFET is limited by this function.
The power MOSFET current is sensed by current sense FET. If the current of power MOSFET is over 1.2A(typ), this
function reduce duty by pulse –by- pulse and restrict the and restraint on over current.
11.TSD
Circuit for preventing malfunction at high Temperature .
When it detects an abnormal temperature exceeding Tj=175℃, it turns OFF DC/DC Comparator Output. The threshold
of TSD has Hysteresis(25℃). If Temperature falls 150℃,the IC automatically returns.
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BD9G101G
●Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
VCC
VCC
45
V
Maximum input current
Imax
1.0
A
BST to GND
VBST
50
V
BST to LX
⊿VBST
7
V
EN
VEN
45
V
Lx
VLx
45
V
FB
VFB
Power Dissipation
Pd
0.675
7
V
Operating Temperature
Topr
-40~+105
Storage Temperature
Tstg
-55~+150
℃
Junction Temperature
Tjmax
150
℃
(*1)
W
(*2)
℃
(*1)During mounting of 70×70×1.6t mm 1layer board.Reduce by 5.4mW for every 1℃ increase. (Above 25℃)
(*2)Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator
will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage.
thermal shutdown engages at Tj=175℃(typ) and disengages at Tj=150℃ (typ)
●Electrical Characteristics (Unless otherwise specified Ta=25℃, VCC=24V, Vo=5V,EN=3V )
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Condition
【Circuit Current】
Stand-by Current
Ist
-
0
5
µA
VEN=0V
Operating Current
Icc
-
0.7
1.2
mA
FB=1.2V
Vuv
5.1
5.4
5.7
V
Vuvhy
-
200
300
mV
【Under Voltage Lock Out (UVLO)】
Threshold Voltage
Hysteresis width
【Oscillator】
Switching Frequency
fosc
1.3
1.5
1.7
MHz
Dmax
85
-
-
%
VFBN
0.739
0.750
0.761
V
VFBA
IFB
Tsoft
0.735
-100
1.2
0.750
0
4.0
0.765
100
-
V
nA
ms
GCS
-
3
-
A/V
Nch MOSFET ON Resistance
RonH
-
800
-
mΩ
Min ON Time
Tmin
-
100
-
nsec
Switch Current Limit
Iocp
0.85
1.2
-
A
VENON
2.0
-
VCC
V
OFF VENOFF
REN
-0.3
2.7
-
5.5
0.8
11
V
µA
Max Duty Cycle
【Error AMP】
FB Pin Reference Voltage
FB Pin Bias Current
Soft-Start Time
Ta=25℃
Ta=-25~105℃
VFB=2.0V
【Current Comparator】
Trans-conductance
【Output】
【CTL】
EN Thresohold Voltage
EN Input Bias Current
ON
VEN=3V
◎ Not designed to withstand radiation.
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BD9G101G
●Operating Ratings
Item
Symbol
Input Voltage
VCC
Output Voltage
VOUT
Ratings
Min
Typ
Max
6
-
42
1.0
(*2)
V
(*3)
-
Output Current
IOUT
(*2)Restricted by minimum on pulse typ. 100nsec
(*3)Restricted by maxduty ,Ron and BST-UVLO.
Unit
VCC×0.7
-
500
V
mA
●input and output voltage restriction
The input voltage range of BD9G101G is limited by Ron, Maxduty(min85%) and preventing malfunction at low voltage
between BST and LX(BST-UVLO).
①BST-UVLO
BSTUVLO is the function that prevent the IC from abnormal operation that is caused by shortage of charge of High-SideFET
driving. If the voltage between BST and Lx is lower than 1.5V, High-Side FET is turned off and there are new pass to charge
voltage VCC to BST. BST voltage is charged by Vcc and goes over BST-UVLO threshold. As a result , BST-UVLO is turned
off.
The condition that BST-UVLO is working property is
VCC>>(BST-UVLO threshold + Vf )+ Vout.
Therefore maximum output voltage is lower than Vin -3V.
BST charging current (normal mode)
4.2V
BST
BST charging current
(BST-UVLO mode)
BSTUVLO
VCC
NchFET OFF
(BST-UVLO mode)
LX
Figure 4. BST-UVLO image
※When operation can be considered by Vin-Vout<3V, output voltage leaps up to near input voltage by BSTUVLO operation at
the time of a light load.
The waveform of operation and a mechanism are shown.
①BSTUVLO detection →Nch MOS FET is turned OFF
↓
②Vout、Lx are discharged
⇒ErrorAMP output is raised
↓
Vout
③ The voltage between BST-Lx is secured enough
1v/div
→BSTUVLO release
↓
④ In order to carry out a start of operation with Max Duty
cycle, an output leaps up.
↓
Figure 5. BSTUVLO operation waveform
Vout=5V Vin=7V Iout=0mA
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⑤ The voltage between BST-Lx is insufficient.
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BD9G101G
As a measure, it is necessary to lower the order of division resistance and to put in a feed-forward capacitor between output-FB
terminals.
The setting method of the feed-forward capacitor between output division resistance and output-FB terminals is shown in below.
・Output voltage setting
The internal reference voltage of ERROR AMP is 0.75V. Output voltage is determined like (1) types.
Vout
Csp
(R1+R2)
R1
Vo=
FB
R2
0.75V
R2
×0.75[V] ・・・ (1)
+
+
Figure 6. Output voltage setting
However, in order to avoid the BSTUVLO operation at the time of a reduced power and light load, please set up R1+R2 is
satisfied the following formulas.
R1  R2  Vout  103 ・・・ (2)
The example of output resistances setting :
output voltage 5V
R1=3.9kΩ R2=0.68kΩ
output voltage 12V
R1=7.5kΩ R2=0.51kΩ
・Feed-forward capacitor Csp
Please mount feed-forward capacitor in parallel to output resistance R1.
In order that a feed-forward capacitor may adjust the loop characteristic by adding the pair of a pole and zero to the loop
characteristic. A phase margin is improved and transient response speed improves.
The feed-forward capacitor Csp should use the value near the following formulas.
Csp 
The example of a Csp setting:
4.7k
 0.15 [uF ] ・・・ (3)
R1
output voltage 5V
output voltage 12V
R1=3.9kΩ R2=0.68kΩ Csp = 0.1uF or 0.22uF
R1=7.5kΩ R2=0.51kΩ Csp = 0.1uF
By above mentioned measure, there is not BSTUVLO operation in litgh load and Vin-Vout<3V.
②Max duty , Ron
Maximum output voltage is limited by maxduty(min85%) and FET Ron.
In the case of Io=500mA, VCC drop down 500mA×0.8Ω=0.6V besides maxduty.
Vomax = (Vcc-Ron×Iomax)×0.85 (casually formula)
Considering the negative voltage in the case of pulling diode current,
Formula of maximum output voltage is
Vomax = VCC×0.7.
③minimum on pulse
Minimum output voltage is limited by minimum on pulse (typ 100nsec).
Output voltage = frequency(typ 1.5MHz) × FET on time ×Vin
If output voltage is lower than this formula , Output ripple voltage is boosted by intermittent spring.
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BD9G101G
●Frequency fold-back function
This IC has the frequency fold-back function to prevent from over current with the circuit output is shorted.
The frequency fold-back has the function that the frequency is changed by FB voltage.
Figure.5 shows FB voltage vs frequency Characteristics.
1600
1400
1200
Frequency[kHz]
1000
800
600
400
200
0
0
0.2
0.4
0.6
0.8
1
1.2
FB Voltage [ V ]
Figure 7. FB voltage -frequency Characteristics
When the output node is shorted, the IC narrows the frequency to 150kHz(typ) so that input current limiting.
This IC operates on1.5MHz in case of normal mode, the voltage of FB is about 0.75V.
●Start-up Characteristics
When the IC is starting up, frequency reacts to the voltage of FB on the function of frequency fold back.
For the Softstart is operated by internal frequency clock, according to rising to the output voltage, the Softstart rising speed is
more faster. Please check the using condition and the application waveform (P.11,P14) because of the Start-up characteristics
changes to the output load and the output capacitor.
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BD9G101G
2
2
1.8
1.8
1.6
1.6
1.4
1.4
input current [mA]
Input current [mA]
●Typical Performance Characteristics
(Unless otherwise specified, Ta=25℃, VCC=12V, Vo=5V, EN=3V)
1.2
1
Ta=105℃
Ta=150℃
0.8
0.6
Ta=25℃
0.4
Ta=-50℃
1.2
1
0.6
Vin=12V
0.4
0.2
Vin=42V
Vin=24V
0.8
Vin=6V
0.2
0
0
6
12
18
24
30
36
42
-40
-20
0
20
Vcc [V]
40
60
80
100
Ta[℃ ]
Figure 8. Operating Current - Input Voltage
Figure 9. Operating Current - Temperature
1.8
Frequency[MHz]
1.7
1.6
1.5
1.4
1.3
1.2
-40
-20
0
20
40
60
80
100
Ta[℃]
Figure 10. UVLO Threshold - Temperature
Figure 11. Oscillation frequency - Temperature
0.761
95
93
91
0.756
FB threshold [V]
Max duty[%]
89
87
85
83
0.751
81
0.746
79
77
0.741
75
-40
-20
0
20
40
60
80
100
6.0
Ta[℃ ]
18.0
24.0
30.0
36.0
42.0
Input Voltage [V]
Figure 13. FB Pin Reference Voltage – Input Voltage
Figure 12. Max Duty - Temperature
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BD9G101G
2000
0.765
1800
0.760
1600
High-Side FET Ron[mΩ]
1400
FB threshold [V]
0.755
0.750
0.745
1200
1000
800
600
400
0.740
200
0.735
-40
-20
0
20
40
60
80
0
100
-40
-20
0
20
Ta [℃ ]
60
80
100
Figure 15. Nch MOSFET ON Resistance Temperature
Figure 14. FB Threshold - Temperature
200
2000
180
1800
160
1600
1400
Min_on_pulse[ns]
OCP threshold [mA]
40
Ta [℃ ]
1200
1000
800
600
140
120
100
80
60
400
40
200
20
0
-40 -20
0
20
40
60
0
80 100 120 140 160
-40 -20
Ta [℃]
0
20
40
60
80
100
Ta[℃]
Figure 17. Min ON Time Temperature
Figure 16. OCP threshold- Temperature
2
1.8
1.6
Vin=12V
Vin=6V
EN threshold [V]
1.4
Vin=42V
1.2
1
0.8
0.6
0.4
0.2
0
-40
-20
0
20
40
60
80
100
Ta[℃ ]
Figure 18. EN Threshold Voltage Temperature
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BD9G101G
●Reference Characteristics of typical Application Circuits
15000pF
5V/0.5A
L1: 6.8μH
BST
Lx
D1
GND
C2:10μF/25V
VCC
VCC
C1:4.7μF/50V
FB
680Ω
EN
ON/OFF control
3.9k
0.1μF
Figure 19. Typical Application Circuit (VOUT=5V)
Parts
L1 :
TOKO
TAIYO YUDEN
DEM4518C 1235AS-H-6R8M
NR4018
6.8μH
6.8μH
C1 :
Murata
GRM32EB31H475KA87
4.7μF/50V
C2 :
Murata
GRM31CB11A106KA01
10μF/10V
D1 :
Rohm
RB060M-60
100
90
Vin=12V
80
Vin=8V
70
Efficiency η [%]
60
Vin=24V
50
Vin=42V
40
30
20
10
0
1
10
Output Current [mA]
Figure 20. Efficiency - Output Current
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100
1000
VOUT=5V
TSZ02201-0Q1Q0AJ00140-1-2
16.Feb.2015 Rev.006
BD9G101G
EN 10V/div
EN 10V/div
Lx
10V/div
Lx
10V/div
VOUT
1V/div
VOUT
1V/div
IOUT 0.2A/div
IOUT 0.2A/div
Figure 21. Start-up Characteristics
VIN=8V, IOUT=0mA ,VOUT=5V
Figure 22. Start-up Characteristics
VIN=8V, IOUT=500mA, VOUT=5V
EN 20V/div
Lx
10V/div
EN 20V/div
Lx
10V/div
VOUT
1V/div
VOUT
1V/div
IOUT 0.2A/div
IOUT 0.2A/div
Figure 23. Start-up Characteristics
VIN=12V, IOUT=0mA, VOUT=5V
Figure 24. Start-up Characteristics
VIN=12V, IOUT=500mA ,VOUT=5V
EN 10V/div
EN 10V/div
Lx
10V/div
Lx
10V/div
VOUT
1V/div
VOUT
1V/div
IOUT 0.2A/div
IOUT 0.2A/div
Figure 25. Start-up Characteristics
VIN=42V, IOUT=0mA, VOUT=5V
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Figure 26. tart-up Characteristics
VIN=42V, IOUT=500mA, VOUT=5V
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BD9G101G
Io
[100mA/div]
Vout:offset 5V
10mV/div
Overshoot Voltage:46mV
Vout(AC)
[100mV/div]
UnderOvershoot Voltage:43mV
Figure 27. Load Response
Io=50mA⇔200mA
Figure 28. Lx Switching/ Vout
Ripple
Io = 20mA
Vout:offset 5V
10mV/div
Phase
Gain
Figure 30. Frequency Response
Io=100mA, VOUT=5V
Figure 29. Lx Switching/ Vout
Ripple
Io=200mA
Phase
Gain
Figure 31. Frequency Response
Io=500mA, VOUT=5V
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BD9G101G
●Reference Characteristics of typical Application Circuits
15000pF
12V/0.5A
L1: 10μ H
Lx
BST
D1
GND
C2:10μ F/25V
VCC
VCC
C1:4.7μ F/50V
FB
0.1μ F
510Ω
EN
ON/OFF control
7.5k
Figure 32. Typical Application Circuit (VOUT=12V)
使用部品
:L1 : TOKO
TAIYO YUDEN
DEM4518C 1235AS-H-6R8M
NR4018
10μH
10μH
C1 :
Murata
GRM32EB31H475KA87
4.7μF/50V
C2 :
Murata
GRM319B31E106KA12
10μF/25V
D1 :
Rohm
RB060M-60
100
90
Vin=24V
80
Vin=18V
Efficiency η [%]
70
Vin=36V
60
Vin=42V
50
40
30
20
10
0
1
10
Output Current [mA]
100
1000
*The efficiency is fall when the switching waveform is turning from intermittent mode to
continuous mode
Figure 33. Efficiency - Output Current VOUT=12V
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BD9G101G
EN 20V/div
EN 20V/div
Lx
20V/div
Lx
20V/div
IOUT 1A/div
IOUT 1A/div
VOUT
2V/div
VOUT
2V/div
Figure 34. Start-up Characteristics
VIN=18V, IOUT=0mA, VOUT=12V
Figure 35. Start-up Characteristics
VIN=18V, IOUT=500mA, VOUT=12V
EN 20V/div
EN 20V/div
Lx
20V/div
Lx
20V/div
IOUT 1A/div
IOUT 1A/div
VOUT
2V/div
VOUT
2V/div
Figure 37. Start-up Characteristics
VIN=24V, IOUT=500mA, VOUT=12V
Figure 36. Start-up Characteristics
VIN=24V, IOUT=0mA, VOUT=12V
EN [50V/div]
EN [50V/div]
Lx
[50V/div]
Lx
[50V/div]
IOUT [1A/div]
IOUT [1A/div]
VOUT
[2V/div]
VOUT
[2V/div]
Figure 38. Start-up Characteristics
VIN=42V, IOUT=0mA, VOUT=12V
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Figure 39. Start-up Characteristics
VIN=42V, IOUT=500mA, VOUT=12V
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BD9G101G
Io
[100mA/div]
Vout:offset 5V
20mV/div
Overshoot Voltage:78mV
Vout(AC)
[100mV/div]
UnderOvershoot Voltage:78mV
Figure 40. Load Response
Io=50mA⇔200mA, VOUT=12V
Figure 41. Lx Switching/ Vout Ripple
Io = 50mA, VOUT=12V
Vout:offset 5V
20mV/div
Phase
Gain
Figure 42. Lx Switching/ Vout Ripple
Io = 200mA, VOUT=12V
Figure 43. Frequency Response
Io=100mA, VOUT=12V
Phase
Gain
Figure 44. Frequency Response
Io=500mA, VOUT=12V
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BD9G101G
●Application Components Selection Method
(1) Inductors
Something of the shield type that fulfills the current rating (Current value
Ipeak below), with low DCR is recommended.Value of Inductance influences
Inductor Ripple Current and becomes the cause of Output Ripple.
In the same way as the formula below, this Ripple Current can be made small
for as big as the L value of Coil or as high as the Switching Frequency.
Ipeak =Iout + ⊿IL/2 [A]
Δ IL
(4)
Figure 45. Inductor Current
⊿IL=
Vin-Vout
L
Vout
Vin ×
×
1
f
[A]
(5)
(⊿IL: Output Ripple Current, f: Switching Frequency)
For design value of Inductor Ripple Current, please carry out design tentatively with about 20%~50% of Maximum
Input Current.
In the BD9G101G, it is recommended the below series of 2.2μH~10μH inductance value.
Recommended Inductor
TOKO DE4518C Series
TAIYO YUDEN NR4018 Series
(2) Input Capacitor
In order for capacitor to be used in input to reduce input ripple, mount low ceramic capacitor of ESR near the Vcc pin.
In the BD9G101G, it is recommended the 4.7uF or more capacitor value. In case of using the electrolytic capacitor,
mount 1uF ceramic capacitor in parallel in order to prevent oscillation
(3) Output Capacitor
In order for capacitor to be used in output to reduce output ripple, Low ceramic capacitor of ESR is recommended.
Also, for capacitor rating, on top of putting into consideration DC Bias characteristics, please use something whose
maximum rating has sufficient margin with respect to the Output Voltage.
Output ripple voltage is looked for using the following formula.
1
Vpp=⊿IL×
2π×f×Co
+ ⊿IL×RESR
[V]
(6)
Please design in a way that it is held within Capacity Ripple Voltage.
In the BD9G101G, it is recommended a ceramic capacitor over 10μF.
(4) Output voltage setting
The internal reference voltage of ERROR AMP is 0.75V. Output voltage is determined like (7) types.
Vout
Csp
(R1+R2)
R1
Vo=
FB
R2
0.75V
R2
×0.75[V] ・・・ (7)
+
+
Figure 46. Output voltage setting
However, in order to avoid the BSTUVLO operation at the time of a reduced power and light load, please set up R1+R2
is satisfied the following formulas.
R1  R2  Vout 103 ・・・ (8)
The example of output resistances setting : output voltage 5V
R1=3.9kΩ R2=0.68kΩ
output voltage 12V
R1=7.5kΩ R2=0.51kΩ
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BD9G101G
(5)Feed-forward capacitor Csp
Please mount feed-forward capacitor in parallel to output resistance R1.
In order that a feed-forward capacitor may adjust the loop characteristic by adding the pair of a pole and zero to the
loop characteristic. A phase margin is improved and transient response speed improves.
The feed-forward capacitor Csp should use the value near the following formulas.
Csp 
The example of a Csp setting:
4.7k
 0.15 [uF ] ・・・ (9)
R1
output voltage 5V
output voltage 12V
R1=3.9kΩ R2=0.68kΩ Csp = 0.1uF or 0.22uF
R1=7.5kΩ R2=0.51kΩ Csp = 0.1uF
By above mentioned measure, there is not BSTUVLO operation in litgh load and Vin-Vout<3V.
(6) Bootstrap Capacitor
Please connect from 15000pF (Laminate Ceramic Capacitor) between BST Pin and Lx Pins.
(7) Diode
Select suitable shottky diode for break down voltage and input current.
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BD9G101G
●Cautions on PC Board layout
VOUT
VIA
Output
Capacitor
Inductor
Catch
Diode
SGND
BST
Lx
GND
VCC
Input
Capacitor
FB
EN
POWER
GND
Feed back Line
Figure 47. Reference PCB layout
Layout is a critical portion of good power supply design. There are several signals paths that conduct fast changing currents
or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies
performance. To help eliminate these problems, the VCC pin should be bypassed to ground with a low ESR ceramic bypass
capacitor with B dielectric. Care should be taken to minimize the loop area formed by the bypass capacitor connections, the
VCC pin, and the anode of the catch diode. See Figure.45 for a PCB layout example.
In the BD9G101G, since the LX connection is the switching node, the catch diode and output inductor should be located
close to the LX pins, and the area of the PCB conductor minimized to prevent excessive capacitive coupling. And GND area
should not be connected directly power GND, connected avoiding the high current switch paths. The additional external
components can be placed approximately as shown.
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BD9G101G
●Power Dissipation
t
It is shown below reducing characteristics of power dissipation to mount 70mm×70mm×1.6mm , 1layer PCB.
Junction temperature must be designed not to exceed 150℃
Power Dissipation : Pd (W)
1.5
1
675mW
0.5
0
0
25
50
75
100
125
150
Ambient Temperature: Ta(℃)
t
Figure 48. Power Dissipation ( 70mm×70mm×1.6mm 1layer PCB)
●Power Dissipation Estimate
The following formulas show how to estimate the device power dissipation under continuous mode operations. They should
not be used if the device is working in the discontinuous conduction mode.
The device power dissipation includes:
2
1) Conduction loss: Pcon = IOUT × RonH × VOUT/VCC
–9
2) Switching loss: Psw = 2.5 × 10 × VCC × IOUT × fsw
–9
3) Gate charge loss: Pgc = 4.88 × 10 × fsw
–3
4) Quiescent current loss: Pq = 0.8× 10 × VCC
Where:
IOUT is the output current (A), RonH is the on-resistance of the high-side MOSFET(Ω), VOUT is the output voltage (V).
VCC is the input voltage (V), fsw is the switching frequency (Hz).
Therefore
Power dissipation of IC is the sum of above dissipation.
Pd = Pcon + Psw + Pgc + Pq
For given Tj, Tj =Ta + θja × Pd
Where:
Pd is the total device power dissipation (W), Ta is the ambient temperature (℃)
Tj is the junction temperature (℃), θja is the thermal resistance of the package (℃)
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BD9G101G
●I/O equivalent circuit
Pin.
No
Pin
Name
6
Lx
2
GND
Pin Equivalent Circuit
Pin.
No
Pin
Name
4
EN
Pin Equivalent Circuit
BST
1
BST
5
VCC
VCC
Lx
GND
EN
GND
FB
3
FB
GND
Figure 49. I/O equivalent circuit
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BD9G101G
●Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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BD9G101G
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure50. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
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BD9G101G
●Ordering part number
B
D
9
G
1
0
Part Number
1
G
-
package
G: SSOP6
TR
Packaging and forming specification
TR: Embossed tape and reel
●External information
1pin mark
LOT No
SSOP6
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
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Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
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Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
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3.
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Products or this document for any military purposes, including but not limited to, the development of mass-destruction
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4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
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liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
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