MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−24 WB LESS PIN 21 CASE 752AB−01 ISSUE O DATE 17 AUG 2010 2X SCALE 1:1 0.20 C A-B D D A H NOTE 7 24 E 2X 13 E1 1 NOTES 5 & 6 L2 12 0.33 C 0.10 C D B PIN 1 INDICATOR 2X 24X b NOTE 7 0.25 TOP VIEW M L C DETAIL A C A-B D NOTES 3 & 4 NOTE 9 h x 45 _ 0.10 C 0.10 C A e A1 NOTE 8 C c SEATING PLANE DETAIL A END VIEW SIDE VIEW M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.10 mm TOTAL IN EXCESS OF ’b’ AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD AND ARE MEASURED BETWEEN 0.10 AND 0.25 FROM THE LEAD TIP. 5. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 mm PER SIDE. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 6. DIMENSIONS D AND E1 ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, PROTRUSIONS, TIE BAR BURRS, OR GATE BURRS BUT INCLUSIVE OF ANY MOLD MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM H. 8. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. 9. THIS CHAMFER IS OPTIONAL. IF IT IS NOT PRESENT, THEN A PIN 1 IDENTIFIER MUST BE LOCATED IN THE INDICATED AREA. DIM A A1 b J D E E1 e h L L2 M RECOMMENDED SOLDERING FOOTPRINT* 1.62 0.52 11.00 1 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: GENERIC MARKING DIAGRAM* 23X 23X 98AON52585E MILLIMETERS MIN MAX 2.35 2.65 0.10 0.29 0.31 0.51 0.20 0.33 15.40 BSC 10.30 BSC 7.50 BSC 1.27 BSC 0.25 0.75 0.40 1.27 0.25 BSC 0_ 8 _ XXXXXXXXXXXXXX XXXXXXXXXXXXXX XXXXXXXXXXXXXX AWLYYWWG 1 XXXXX A WL YY WW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed STATUS: ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped “CONTROLLED COPY” in red. NEW STANDARD: © Semiconductor Components Industries, LLC, 2002 Case Outline Number: http://onsemi.com SOIC−24 WB LESS PIN 21 DESCRIPTION: October, 2002 − Rev. 0 PAGE 1 OFXXX 2 1 DOCUMENT NUMBER: 98AON52585E PAGE 2 OF 2 ISSUE O REVISION RELEASED FOR PRODUCTION. REQ. BY M. RAMOS. DATE 17 AUG 2010 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. © Semiconductor Components Industries, LLC, 2010 August, 2010 − Rev. 01O Case Outline Number: 752AB