LT1002 - Dual, Matched Precision Operational Amplifier

LT1002
Dual, Matched Precision
Operational Amplifier
U
FEATURES
■
■
■
■
■
■
■
DESCRIPTIO
The LT ®1002 dual, matched precision operational amplifiers combine excellent individual amplifier performance
with tight matching and temperature tracking between
amplifiers.
Guaranteed low offset voltage
LT1002A
60µV max
LT1002
100µV max
Guaranteed offset voltage match
LT1002A
40µV max
LT1002
80µV max
Guaranteed low drift
LT1002A
0.9µV/°C max
LT1002
1.3µV/°C max
Guaranteed CMRR
LT1002A
110dB min
LT1002
110dB min
Guaranteed channel separation
LT1002A
132dB min
LT1002
130dB min
Guaranteed matching characteristics
Low noise 0.35µVP-P
In the design, processing, and testing of the device,
particular attention has been paid to the optimization of the
entire distribution of several key parameters and their
matching. Consequently, the specifications of even the
low cost commercial grade (LT1002C) have been spectacularly improved compared to presently available devices.
Essentially, the input offset voltage of all units is less than
80µV, and matching between amplifiers is consistently
beter than 60µV (see distribution plot below). Input bias
and offset currents, channel separation, common mode
and power suply rejections of the LT1002C are all specified at levels which were previsouly attainable only on very
expensive, selected grades of other dual devices. Power
dissipation is nearly halved compared to the most popular
precision duals, without adversely affecting noise or speed
performance. A by-product of lower dissipation is decreased warm-up drift. For even better performance in a
single precision op amp, refer to the LT1001 data sheet. A
bridge signal conditioning application is shown below.
This circuit illustrates the requirement for both excellent
matching and individual amplifier specifications.
U
APPLICATIO S
■
■
■
■
■
■
Thermocouple Amplifiers
Strain Gauge Amplifiers
Low level signal processing
Medical instrumentation
Precision dual limit threshold detection
Instrumentation amplifiers
, LTC and LT are registered trademarks of Linear Technology Corporation
U
TYPICAL APPLICATIO
Strain Gauge Signal Conditioner with Bridge Excitation
15V
Distribution of Offset Voltage Match
15V
8.2k
LM329
4
4.99k*
3
100Ω 5W
+
1/2
LT1002
–
13 2k
2N2219
70
REFERENCE OUT
TO MONITORING
A/D CONVERTER
60
3
350Ω BRIDGE
301k*
10
11
–
+
10k
ZERO 2
+
6
6
LT1001
–
1µF
GAIN
TRIM
IN4148
1/2
LT1002
VS = ±15V
TA = 25°C
287 UNITS TESTED
IN4148
2N2907
0V TO 10V
OUT
340k*
1.1k*
50
40
30
20
10
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE MATCH (µV)
2k
100Ω
5W
*RN60C FILM RESISTORS
–15V
NUMBER OF UNITS
2k*
1002 TA01
1002 TA02
1002fb
1
LT1002
W
U
U
U
W W
W
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Supply Voltage (Note 7) ........................................ ±22V
Differential Input Voltage ...................................... ±30V
Input Voltage Equal to Supply Voltage
Output Short Circuit Duration ......................... Indefinite
Operating Temperature Range
LT1002AM/LT1002M (OBSOLETE) .. – 55°C to 125°C
LT1002AC/LT1002C ............................... 0°C to 70°C
Storage Temperature Range
All Grades ......................................... – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
ORDER
PART NO.
OFFSET
VOLTAGE
MAX
at 25°C
LT1002ACN
LT1002CN
60µV
100µV
LT1002AMJ
LT1002MJ
LT1002ACJ
LT1002CJ
60µV
100µV
60µV
100µV
TOP VIEW
NULL (A) 1
14 V+ (A)
NULL (A) 2
–IN (A) 3
+IN (A) 4
13 OUT (A)
–
12 V– (A)
A
+
V– (B) 5
+
B
–
11 +IN (B)
10 –IN (B)
OUT (B) 6
9 NULL (B)
V+ (B) 7
8 NULL (B)
N PACKAGE
14 PIN PLASTIC
TJMAX = 125°C, θJA = 100°C/W
NOTE: Device may be operated even if insertion
is reversed; this is due to inherent symmetry of
pin locations of amplifiers A and B. (Note 7)
J PACKAGE
14 PIN HERMETIC
TJMAX = 125°C, θJA = 100°C/W
OBSOLETE PACKAGE
Consider the N Package for Alternate Source
Consult LTC Marketing for parts specified with wider operating temperature ranges.
U
W
ELECTRICAL CHARACTERISTICS, I DIVIDUAL A PLIFIERS
VS = ±15V, TA = 25°C, unless otherwise noted
LT1002AM/LT1002AC
MIN TYP
MAX
20
60
LT1002M/LT1002C
MIN
TYP
MAX
25
100
SYMBOL
VOS
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 2)
∆VOS
∆Time
IOS
Long Term Input Offset Voltage
Stability
(Notes 3 and 4)
IB
Input Bias Current
en
Input Noise Voltage
0.1Hz to 10Hz (Note 3)
0.35
0.7
0.38
0.75
µVp-p
en
Input Noise Voltage Density
fO = 10Hz (Note 6)
fO = 1000Hz (Note 3)
10.3
9.6
20.0
11.5
10.5
9.8
20.0
12.0
nV√Hz
Input Offset Current
UNITS
µV
0.3
1.5
0.4
2.0
µV/month
0.3
2.8
0.4
4.2
nA
±0.6
±3.0
±0.7
±4.5
nA
AVOL
Large Signal Voltage Gain
RL ≥ 2kΩ, VO = ±12V
RL ≥ 1kΩ, VO = ±10V
400
250
800
500
350
220
800
500
V/mV
CMRR
Common Mode Rejection Ratio
VCM = ±13V
110
126
110
126
dB
PSRR
Power Supply Rejection Ratio
VS = ±3V to ±18V
108
123
105
123
dB
Rin
Input Resistance Differential Mode
(Note 5)
20
100
13
80
MΩ
Input Voltage Range
±13
±14
±13
±14
V
±13
±12
±14
±13.5
±13
±12
±14
±13.5
V
0.25
V/µs
VOUT
Maximum Output Voltage Swing
RL ≥ 2kΩ
RL ≥ 1kΩ
SR
Slew Rate
RL ≥ 2kΩ (Note 5)
0.1
0.4
GBW
Gain Bandwidth Product
(Note 5)
Pd
Power Dissipation
per amplifier
No load
No load, VS = ±3V
0.25
0.1
0.8
46
4
0.4
75
7
0.8
48
4
MHz
85
8
mW
1002fb
2
LT1002
U
W
ELECTRICAL CHARACTERISTICS, I DIVIDUAL A PLIFIERS
The ● denotes the specifications which apply over the temperature range – 55°C ≤ TA ≤ 125°C, VS = ±15V,unless otherwise noted.
SYMBOL
VOS
∆VOS
∆Temp
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 2)
MIN
●
LT1002AM
TYP
MAX
30
150
Input Offset Current
●
0.8
5.6
1.2
8.5
nA
IB
Input Bias Current
●
±1.0
±6.0
±1.5
±9.0
nA
AVOL
Large Signal Voltage Gain
RL ≥ 2kΩ, VO = ±10V
●
300
700
200
700
V/mV
CMRR
Common Mode Rejection Ratio
VCM = ±13V
●
106
122
104
120
dB
Power Supply Rejection Ratio
VS = ±3V to ±18V
●
117
dB
102
117
±13
±12.5 ±13.5
VOUT
Output Voltage Swing
RL ≥ 2kΩ
●
Pd
Power Dissipation
per amplifier
No load
●
96
±14
55
±13
±14
±12.0
±13.5
90
60
1.3
µV/°C
IOS
●
0.3
UNITS
µV
●
Input Voltage Range
0.9
LT1002M
TYP
MAX
45
230
Average Input Offset Voltage Drift
PSRR
0.2
MIN
V
V
100
mW
The ● denotes the specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C, VS = ±15V, unless otherwise noted.
SYMBOL
VOS
PARAMETER
Input Offset Voltage
CONDITIONS
(Note 2)
MIN
●
LT1002AC
TYP
MAX
20
100
MIN
LT1002C
TYP
MAX
30
160
UNITS
µV
Average Input Offset Voltage Drift
●
0.2
0.9
0.3
1.3
µV/°C
IOS
Input Offset Current
●
0.5
4.2
0.6
5.7
nA
IB
Input Bias Current
±0.7
±4.5
±1.0
±6.0
AVOL
Large Signal Voltage Gain
CMRR
PSRR
∆VOS
∆Temp
●
nA
RL ≥ 2kΩ, VO = ±10V
●
350
750
250
750
V/mV
Common Mode Rejection Ratio
VCM = ±13V
●
108
124
106
123
dB
Power Supply Rejection Ratio
VS = ±3V to ±18V
●
105
120
100
120
dB
●
±13
±14
±13
±14
V
±12.5
±13.8
Input Voltage Range
VOUT
Output Voltage Swing
RL ≥ 2kΩ
●
Pd
Power Dissipation
per amplifier
No Load
●
±12.5 ±13.8
50
85
55
V
90
mW
W
U
ATCHI G CHARACTERISTICS
VS = ±15V, TA = 25°C, unless otherwise noted.
IB +
Average Non-Inverting Bias
Current
–
±0.6
±3.5
–
±0.7
±4.8
nA
IOS+
Non-Inverting Offset Current
–
0.6
3.5
–
0.7
6.0
nA
Inverting Offset Current
–
0.6
3.5
–
0.7
6.0
nA
IOS
∆CMRR
∆PSRR
MIN
–
LT1002M/C
TYP
MAX
25
80
PARAMETER
Input Offset Voltage Match
–
CONDITIONS
LT1002AM/AC
MIN TYP
MAX
–
15
40
SYMBOL
UNITS
µV
Common Mode Rejection Ratio
Match
VCM = ±13V
110
132
–
108
132
–
dB
Power Supply Rejection Ratio
Match
VS = ±3V to ±18V
108
130
–
102
128
–
dB
Channel Seperation
f ≤ 10Hz (Note 5)
132
148
–
130
146
–
dB
1002fb
3
LT1002
W
U
ATCHI G CHARACTERISTICS
The ● denotes the specifications which apply over the temperature range – 55°C ≤ TA ≤ 125°C, VS = ±15V, unless otherwise noted.
SYMBOL
IB
+
IOS
+
PARAMETER
Input Offset Voltage Match
CONDITIONS
LT1002AM
TYP
MAX
50
140
MIN
–
LT1002M
TYP
MAX
60
230
●
MIN
–
Input Offset Voltage Tracking
●
–
0.3
1.0
–
0.4
Average Non-Inverting Bias
Current
●
–
±1.5
±6.0
–
±1.8
±10.0
nA
1.5
UNITS
µV
µV/°C
Non-Inverting Offset Current
●
–
1.5
6.5
–
1.8
12.0
nA
IOS–
Inverting Offset Current
●
–
1.5
6.5
–
1.8
12.0
nA
∆CMRR
Common Mode Rejection Ratio
Match
VCM = ±13V
●
106
126
102
124
–
dB
Power Supply Rejection Ratio
Match
VS = ±3V to ±18V
●
102
122
94
120
–
dB
∆PSRR
The ● denotes the specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C, VS = ±15V, unless otherwise noted.
SYMBOL
IB
+
IOS
+
PARAMETER
Input Offset Voltage Match
CONDITIONS
LT1002AC
TYP
MAX
30
85
MIN
–
LT1002C
TYP
MAX
45
150
●
MIN
–
UNITS
µV
Input Offset Voltage Tracking
●
–
0.3
1.0
–
0.4
1.5
µV/°C
Average Non-Inverting Bias
Current
●
–
±1.0
±4.5
–
±1.2
±7.0
nA
Non-Inverting Offset Current
●
–
1.0
5.0
–
1.2
8.5
nA
IOS–
Inverting Offset Current
●
–
1.0
5.0
–
1.2
8.5
nA
∆CMRR
Common Mode Rejection Ratio
Match
VCM = ±13V
●
108
130
–
105
128
–
dB
Power Supply Rejection Ratio
Match
VS = ±3V to ±18V
●
105
126
–
98
124
–
dB
∆PSRR
For MIL-STD components, please refer to LTC 883C data sheet for test
listing and parameters.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Offset voltage measured with high speed test equipment,
approximately 1second after power is applied.
Note 3: This parameter is tested on a sample basis only.
Note 4: Long Term Input Offset Voltage Stability refers to the averaged
trend line of VOS versus Time over extended periods after the first 30 days
of operation. Excluding the initial hour of operation, changes in VOS during
the first 30 operating days are typically 2.5µV.
Note 5: Parameter is guaranteed by design.
Note 6: 10Hz noise voltage density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request.
Note 7: The V + supply terminals are completely independent and may be
powered by separate supplies if desired (this approach, however, would
sacrifice the advantages of the power supply rejection ratio matching). The
V – supply terminals are both connected to the common substrate and
must be tied to the same voltage. Both V – pins should be used.
1002fb
4
LT1002
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Offset Voltage Drift
with Temperature
(Individual Amplifiers)
Distribution of Offset Voltage of
Individual Amplifiers
70
VS = ±15V
TA = 25°C
60
VS = ±15V
30
260 UNITS TESTED
574 UNITS TESTED
NUMBER OF UNITS
NUMBER OF UNITS
80
35
VS = ±15V
60
40
130 UNITS TESTED
50
25
NUMBER OF UNITS
100
Distribution of Offset Voltage
Match Drift with Temperature
40
30
20
20
15
10
20
10
5
0
–1.2
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
1002 G01
100
80
80
LT1002M
40
LT1002AM
0
LT10
20
2AM
002AM
0
LT1
–20
LT1002M
–40
LT1002M
–60
60
VS = ±15V
LT1002M
LT1002AM
40
LT
AM
1002
20
2M
T100
0
L
–20
LT1002AM
–40
LT1002M
–60
–80
–80
–100
–50
50
0
75
25
TEMPERATURE (°C)
–25
100
125
–100
–50
–25
50
0
75
25
TEMPERATURE (°C)
Long Term Stability of Four
Representative Units
VS = ±15V
TA = 25°C
4
N14 PLASTIC PACKGE
3
J14 HERMETIC DIP PACKGE
2
1
0
0
1002 G04
1002 G04
0.1Hz to 10Hz Noise
1
3
4
2
TIME AFTER POWER ON –
BOTH AMPLIFIERS (MINUTES)
5
1002 G06
Noise Spectrum
100
10
10
0
–5
VOLTAGE NOISE nV/√Hz
5
30
3
1/f CORNER
4Hz
VOLTAGE
10
1
1/f CORNER
70Hz
3
0.3
CURRENT NOISE pA/√Hz
TA = 25°C
VS = ±3 TO ±18V
NOISE VOLTAGE 100nV/DIV
OFFSET VOLTAGE CHANGE (µV)
Warm-Up Drift
125
100
0
+0.4 +0.8 +1.2
–0.8 –0.4
OFFSET VOLTAGE MATCH DRIFT
WITH TEMPERATURE (µV/°C) 1002 G03
5
CHANGE IN OFFSET VOLTAGE (MICROVOLTS)
100
60
–1.2
Offset Voltage Tracking with Temperature
of Six Representative Units
OFFSET VOLTAGE MATCH (µV)
INDIVIDUAL AMPLIFIER OFFSET VOLTAGE (µV)
Offset Voltage Drift with Temperature
of Six Representative Units
0
+0.4 +0.8 +1.2
–0.8 –0.4
INPUT OFFSET VOLTAGE DRIFT
WITH TEMPERATURE (µV/°C) 1002 G02
CURRENT
–10
0
1
3
2
TIME (MONTHS)
4
5
1001 G07
0
2
6
4
TIME (SECONDS)
8
10
1001 G08
1
1
10
100
FREQUENCY (Hz)
0.1
1000
1002 G09
1002fb
5
LT1002
U W
TYPICAL PERFORMANCE CHARACTERISTICS
30
1.5
VS = ±15V
1.6
1.4
MATCHING: NON INVERTING
BIAS CURRENT
1.2
1.0
M
N O ATC
N -I H I N G
N V . : IN V
IVI
DU
OFFS ERING &
AL
ET C U
A
RRENT
M
IND
P BI
AS C
IV I
DU
URRE
AL A
NT
MP O
FF S E T C U R
RENT
IN D
0.8
0.6
0.4
0.2
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
Ib
VCM
0.5
DEVICE WITH POSITIVE INPUT CURRENT
VS = ±15V
TA = 25°C
0
–.5
DEVICE WITH NEGATIVE INPUT CURRENT
–1.0
–1.5
–15
125
IB ≈ 1 nA
10
–5
0
5
–10
COMMON-MODE INPUT VOLTAGE
0
0.1
15
Gain, Phase Shift vs. Frequency
200k
120
100
80
VS = ±15V
60
40
VS = ±3V
20
100
–20
0.1
125
1
10
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
1002 G13
0.6
0.4
PERCENT GAIN MISMATCH =
OUTPUT A – OUTPUT B
× 100%
1/2 (OUTPUT A + OUTPUT B)
10k
100k
1002 G16
180
VS = ±15V
200
PHASE MARGIN –55°C = 63°
125°C = 57°
–8
0.1
0.2
220
2
0.5
1
FREQUENCY (MHz)
1002 G15
Power Supply Rejection and
PSRR Match vs Frequency
10
AV = 1000
1
AV = +1
0.1
IO = ±1mA
VS = ±15V
TA = 25°C
0.001
1k
100
FREQUENCY (Hz)
160
160
0.01
0
10
0
100
OUTPUT IMPEDANCE (Ω)
OPEN LOOP GAIN MISMATCH (PERCENT)
0.8
1
GAIN 125°C
140
GAIN 25°C & –55°C
Closed Loop Output Impedance
VS = ±15V
TA = 25°C
0.2
4
25°C
PHASE
MARGIN
= 60°
1002 G14
Open Loop Gain Mismatch
vs Frequency
1.0
120
8
POWER SUPPLY REJECTION (dB)
50
25
75
0
TEMPERATURE (°C)
100
PHASE 25°C
12
–4
0
0
–50 –25
80
16
TA = 25°C
VOLTAGE GAIN (dB)
400k
OPEN LOOP VOLTAGE GAIN (dB)
OPEN LOOP VOLTAGE GAIN (V/V)
VS = ±3V, VO = ±1V
600k
30
20
140
800k
0.3
1.0
3.0
10
± DIFFERENTIAL INPUT (VOLTS)
1002 G12
Open Loop Voltage Gain
Frequency Response
VS = ±15V, VO = ±12V
10
1002 G11
Open Loop Voltage Gain
vs Temperature
1000k
20
COMMON-MODE
INPUT RESISTANCE = 28V = 280GΩ
0.1nA
1001 G10
1200k
VS = ±15V
TA = 25°C
PHASE SHIFT (DEGREES)
1.0
–
+
INVERTING OR NON-INVERTING
INPUT BIAS CURRENT (mA)
1.8
INPUT BIAS CURRENT (nA)
INPUT BIAS AND OFFSET CURRENTS (nA)
2.0
Input Bias Current vs.
Differential Input Voltage
Input Bias Current
Over the Common Mode Range
Matching and Individual Amplifier
Bias and Offset Currents vs Temperature
1
10
1k
100
FREQUENCY (Hz)
10k
100k
1002 G17
VS = ±15V ±2V pp
TA = 25°C
MATCH (NEGATIVE SUPPLY)
140
120
100
80
60
NEGATIVE SUPPLY
POSITIVE SUPPLY
40
MATCH (POSITIVE SUPPLY)
20
0
0.1
1
10
100
1k
FREQUENCY (Hz)
10k
100k
1002 G18
1002fb
6
LT1002
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Common Mode Rejection and
CMRR Match vs Frequency
Channel Separation vs Frequency
CHANNEL SEPARATION (dB)
150
RS =10Ω
140
130
120
RS =100Ω
110
100
RS =1k
90
160
VS = ±15V
TA = 25°C
140
120
MATCH (< CMRR)
100
CMRR
80
60
40
20
0
80
100
1k
100k
10k
FREQUENCY (Hz)
1
1M
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
Supply Current vs. Supply Voltage
For Each Amplifier
V + = 12 to 18V
V – = –12 to –18V
V – = –1.2 to –4V
50
25
75
0
TEMPERATURE (°C)
125°C
1.0
0.5
100
125
1002 G21
Maximum Undistorted
Output vs. Frequency
OUTPUT VOLTAGE, PEAK-TO-PEAK (VOLTS)
25°C
1.5
±3
V + = 1.2 to 4V
+1.0
+.8
+.6
+.4
+.2
V–
–50 –25
Large Signal Transient Response
2.0
–55°C
V+
–0.2
–0.4
–0.6
–0.8
–1.0
1002 G20
1002 G19
28
VS = ±15V
TA = +25°C
24
20
16
12
8
4
0
± 6 ± 9 ± 12 ± 15 ± 18 ± 21
SUPPLY VOLTAGE (V)
1002 G23
1
10
100
FREQUENCY (kHz)
1000
1002 G24
1002 G22
Voltage Follower Overshoot
vs Capacitive Load
Small Signal Transient Response
100
80
PERCENT OVERSHOOT
SUPPLY CURRENT (mA)
COMMON MODE LIMIT (VOLTS)
REFERRED TO POWER SUPPLY
VS = ±15V
TA = 25°C
COMMON MODE REJECTION (dB)
160
Common Mode Limit
vs Temperature
Small Signal Transient Response
VS = ±15V
TA = 25°C
VIN = 100mV
RL > 50k
60
40
20
0
100
AV = +1, CL = 50pF
1002 G25
10,000
1000
CAPACITIVE LOAD (PICOFARADS)
100,000
AV = +1, CL = 1000pF
1002 G27
1002 G26
1002fb
7
LT1002
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Output Short Circuit Current
vs Time
Output Swing vs. Load Resistance
16
SHORT CIRCUIT CURRENT (mA)
SINKING SOURCING
50
OUTPUT SWING (VOLTS)
NEGATIVE SWING
12
POSITIVE SWING
8
4
VS = ±15V
TA = 25°C
0
100
300
1000
3k
LOAD RESISTANCE (Ω)
40
–55°C
30
20
25°C
125°C
10
VS = ±15V
–10
125°C
–20
25°C
–30
–55°C
–40
10k
–50
0
1
3
2
TIME FROM OUTPUT SHORT (MINUTES)
1002 G28
4
1002 G29
U
W
U
U
APPLICATIONS INFORMATION
The LT1002 dual amplifier may be inserted directly into
OP-10, OP207, OP227 sockets with or without removal of
external nulling potentiometers.
nately, the guaranteed offset voltage match of the LT1002
is very low, in most applications offset adjustment will be
unnecessary.
Standard Adjustment
Offset Voltage Adjustment The input offset voltage of the
LT1002, and its drift with temperature, are permanently
trimmed at wafer testing to a low level. However, if further
adjustment of VOS is necessary, nulling with a 10k or 20k
potentiometer will not degrade drift with temperature.
Trimming to a value other than zero creates a drift of (VOS/
300)µV/°C, e.g. if VOS is adjusted to 300µV, the change in
drift will be 1µV/°C. The adjustment range with a 10k or
20k pot is approximately ±2.5mV. If less adjustment
range is needed, the sensitivity and resolution of the
nulling can be improved by using a smaller pot in conjunction with fixed resistors. The example has an approximate
null range of ±100µV.
10k
or
20k
1
(8)
2
3 –
(10)
INPUT
4
(11)
+
15V
(9)
1/2
LT1002
14 (7)
13 (6)
12 (5)
–15V
1002 TA03
Improved Sensitivity Adjustment
7.5k
1k
In matching applications, both amplifiers can be trimmed
to zero, or the offset of one amplifier can be trimmed to
match the offset of the other. Offset adjustment, however,
slightly degrades the gain, common-mode and powersupply rejection match between the two op amps. Fortu-
OUTPUT
7.5k
(8)
2 (9)
3 –
14
(7)
(10)
1/2
INPUT
LT1002
13 (6)
4 +
12 (5)
(11)
15V
1
–15V
OUTPUT
1002 TA04
1002fb
8
LT1002
U
U
W
U
APPLICATIONS INFORMATION
0.1Hz to 10Hz Noise Test Circuit
Test Circuit for Offset Voltage
and its Drift with Temperature
0.1µF
50k*
100k
15V
3
–
(10)
100Ω*
4
(11)
+
10Ω
14 (7)
13 (6)
1/2
LT1002
–15V
VO = 1000 VOS
–
A
1/2 LT1002
2k
+
VO
12 (5)
50k*
VOLTAGE GAIN = 50,000
PEAK TO PEAK NOISE MEASURED IN 10 SEC INTERVAL
* RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL.
DEVICE
UNDER
TEST
+
B
1/2 LT1002
4.7µF
–
100k
24.3k
1002 TA05
4.3k
0.1µF
22µF
SCOPE
×1
RIN = 1MΩ
2.2µF
110k
1002 TA06
This circuit is also used as burn-in configuration for the
LT1002, with supply voltages increased to ±20V.
Unless proper care is exercised, thermocouple effects,
caused by temperature gradients across dissimilar metals
at the contacts to the input terminals, can exceed the
inherent drift of the amplifier. Air currents should be
minimized, package leads should be short, the two input
leads should be as close together as possible and maintained at the same temperature.
Channel Separation
This parameter is defined as the ratio of the change in input
offset voltage of one amplifier to the change in output
voltage of the other amplifier causing the offset change.
At low frequencies the LT1002’s channel separation is an
almost unmeasurable 148dB. As frequency increases, pin
to pin capacitance of the package, between the output of
one amplifier and the inputs of the other, becomes dominant. Since these pins are non-adjacent, the capacitance is
only 0.02pF. To maintain the LT1002’s excellent channel
separation at higher frequencies, the socket and PC board
capacitances should be minimized.
The device under test should be warmed up for three
minutes and shielded from air currents. Turn the device
180° to measure the noise of side B.
Power supplies
The LT1002 is specified over a wide range of power supply
voltages from ±3V to ±18V. Operation with lower supplies
is possible, down to ±1.2V (two Ni-Cad batteries). However, with ±1.2V supplies, the device is stable only in
closed loop gains of + 2 or higher (or inverting gain of one
or higher).
The V+ supply terminals are completely independent and
may be powered by separate supplies if desired (this
approach, however, would sacrifice the advantages of the
power supply rejection ratio matching). The V– supply
terminals are both connected to the common substrate
and must be tied to the same voltage. Both V – pins should
be used.
1002fb
9
LT1002
U
W
U
U
APPLICATIONS INFORMATION
Advantages of Matched Dual Op Amps In many applications the performance of a system depends on the matching between two operational amplifiers rather than the
individual characteristics of the two op amps. Two or three
op amp instrumentation amplifiers, tracking voltage references and low drift active filters are some of the circuits
requiring matching between two op amps.
The well-known triple op amp configuration illustrates
these concepts. Output offset is a function of the difference between the offsets of the two halves of the LT1002.
This error cancellation principle holds for a considerable
number of input referred parameters in addition to offset
voltage and its drift with temperature. Input bias current
will be the average of the two non-inverting input currents
(IB+). The difference between these two currents (IOS+) is
the offset current of the instrumentation amplifier. The
difference between the inverting input currents (IOS–) will
cause errors flowing through R1, R2, and R3. Commonmode and power supply rejections will be dependent only
on the match between the two amplifiers (assuming
perfect resistor matching).
The concepts of common mode and power supply rejection ratio match (∆CMRR and ∆PSRR) are best demonstrated with a numerical example:
Assume CMRRA = + 1.0µV/V or 120dB,
and CMRRB = + 0.75µV/V or 122.5dB,
then ∆CMRR = 0.25µV/V or 132dB;
if CMRRB = – 0.75µV/V which is still 122.5dB,
then ∆CMRR = 1.75µV/V or 115dB.
Three Op Amp Instrumentation Amplifier
INPUT
–
+
A
1/2 LT1002
–
R3
2.1k
1%
–
R8
200Ω
–
R6
10k
1%
R4
100Ω
1%
R1
10k
1%
R10
100k
C1
100pF
LT1037
OUTPUT
+
R2
10k
1%
GAIN = 1000
B
1/2 LT1002
INPUT
+
+
R5
100Ω
1%
R7
9.76k
1%
R9
200Ω
1002 TA07
Trim R8 for gain
Trim R9 for DC common mode rejection
Trim R10 for AC common mode rejection
Typical performance of the instrumentation amplifier:
Input offset voltage = 25µV
Input bias current = 0.7nA
Input resistance = 200 GΩ
Input offset current = 0.6nA
Input noise = 0.5µV p-p
Power bandwidth (V0 = ±10V) = 80kHz
Clearly, the LT1002, by specifying and guaranteeing all of
these matching parameters, can significantly improve the
performance of matching dependent circuits.
1002fb
10
LT1002
U
U
W
U
APPLICATIONS INFORMATION
Precision ±10V Reference
15V
130k
5%
3.3k
1%
OUT 1
10.000V
10k
4
3
14
+
13
1/2
LT1002
–
10k
0.1%
12
LM129A
0.1%
10
11
3.3k
1%
8.2k
1%
7
–
1/2
LT1002
+
6
OUT 2
–10.000V
5
1k
–15V
1002 TA08
The LT1002 contributes less than 5% of the total drift with
temperature, noise and long term drift of the reference.
The accuracy of the –10V output is limited by the matching
of the two 10k resistors.
Dual Limit Microvolt Comparator
15V
430k
1%
14
UPPER
LIMIT
3
4
–
1
1/2
LT1002
+
1k
5%
39.2Ω
1%
FLV117
15k
1%
13
20k
5%
1/4 CA3118
12
1/4 CA3118
–15V
INPUT
430k
1%
10
LOWER
LIMIT
11
7
–
8
1/2
LT1002
+
39.2Ω
1%
15k
1%
6
5
1/4 CA3118
1/4 CA3118
–15V
1002 TA09
When the upper or lower limit is exceeded the LED lights
up. Positive feedback to one of the nulling terminals
creates 5 to 20µV of hysteresis on both amplifiers. This
feedback changes the offset voltage of the LT1002 by less
than 5µV. Therefore, the basic accuracy of the comparator
is limited only by the low offset voltage of the LT1002.
1002fb
11
LT1002
U
U
W
U
APPLICATIONS INFORMATION
Two Op Amp Instrumentation Amplifier
R5
2.2k†
R1
100k*
R2
10k
R4
100k
R3
10k
–
1/2
LT1002
–
–
1/2
LT1002
+
OUTPUT
+
INPUTS
+
1002 TA10
* TRIM FOR COMMON-MODE REJECTION
† TRIM FOR GAIN
GAIN =
R4
1
1+
R3
2
(
)
R2 R3
R2 + R3
+
+
≈ 100
R1 R4
R5
Precision Amplifier Drives 500Ω Load to ±10V
1.1Rf + 0.1RS
110k
15V
RS
100Ω
–
B
1/2 LT1002
+
–15V
Rf
100k
0.2RL
100Ω
15V
RS
100Ω
–
A
1/2 LT1002
+
–15V
INPUT
This application utilizes the guaranteed 10mA load driving
capability of the LT1002. The offset voltage of amplifier A
is the offset of the configuration. Amplifier B provides the
additional 10mA load current. When load resistor RL is
OUTPUT
RL
500Ω
1002 TA11
removed, amplifier A sinks this current without affecting
accuracy. In the gain of 1000 configuration shown, approximately 0.3% gain accuracy can be realized.
1002fb
12
LT1002
U
U
W
U
APPLICATIONS INFORMATION
Dead Zone Generator
INPUT
Q4
100k**
100k**
2
BIPOLAR SYMMETRY IS EXCELLENT
BECAUSE ONE DEVICE, Q2, SETS BOTH LIMITS
6
8
+
100k
Q3
Q2
–
LM301A
3
VSET
DEAD ZONE
CONTROL INPUT
0 to 5V
10k*
47pF
10k*
4.7k
2k
1
3
30pF
Q1
2N4393
10k**
–
4
IN914
10k** 10
13
1/2
LT1002
+
10k
11
15V
100k
15pF
2
–
LM301A
3
6
+
1/2
LT1002
6
VOUT
+
10k
Q6
2N4393
4.7k
15pF
–
4.7k
3.3k
IN914
Q5
VSET
VOUT
1k
–15V
VIN
* 1% FILM
** RATIO MATCH 0.05%
Q2, 3, 4, 5 CA 3096 TRANSISTOR ARRAY
VSET
1002 TA12
Precision Absolute Value Circuit
10k
0.1%
10k
0.1%
INPUT
–10 to 10V
10k
0.1%
3
4
IN4148
–
1/2
LT1002
10k
0.1%
10
13
11
+
–
1/2
LT1002
6
OUTPUT
0 to 10V
+
IN4148
10k
0.1%
1002 TA13
1002fb
13
LT1002
U
U
W
U
APPLICATIONS INFORMATION
22k*
43k*
100Ω (SELECT)
3
15V
100Ω 5W
–
2k
1/2
LT1002
15V
4
Dual Precision Power Supply
(1) 0 to 10V in 100µV Steps
(2) 0 to 100V in 1mV Steps
2N2219
13
+
OUTPUT 1
0-10V
25mA
IN914
8.2k
VN-46
LM399
TRIAD TY-90
DIODES =
SEMTECH #
FF-15
KVD
00000 –
99999 + 1
–15V
KVD = ESI#DP311
* = JULIE RSCH. LABS
#R-44
25k
OUTPUT 2
0V-100V, 25mA
+
VN-46
KELVIN-VARLEY
DIVIDER
ESI#DP311
4
0.1µF
2.2µF
10k* (SELECT)
+
TRIM–100V
100Ω
680pF
2
–
LT301A
3
+
D
CLK
6
Q
2N6533
2k
Q
33k
+
74C74
22µF
33k
15V
90k*
33k
6
IN914
–
10
+
11
1/2
LT1002
15Ω
15V
15V
1.8k
CLAMP SET
2N2907
5k
IN914
1002 TA14
1002fb
14
LT1002
W
W
SCHE ATIC DIAGRA
V+
6k
6k
Q29
Q27
NULL
40k
Q24
Q25
Q28
NULL 40k
1.5k
Q5
25k
Q12
Q11
Q6
Q13 Q14
3k
Q8
Q7
Q31
Q4
Q3
55pF
20pF
Q33
20
+
500
Q1A
Q1B
Q2B
30pF
Q2A
Q26
3k
IN
–
OUT
Q21
20
Q34
Q16
Q10
500
Q15
IN
2k
2k
180Ω
1/2 LT1002
Q32
Q22
T1
Q20
Q23
Q17
Q30
Q9
Q18
8k
Q19
V–
120
240
1002 SS
U
PACKAGE DESCRIPTION
J Package
14-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
0.200
(5.080)
MAX
0.300 BSC
(0.762 BSC)
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0.005
(0.127)
MIN
0.785
(19.939)
MAX
14
13
12
11
10
9
8
0.220 – 0.310
(5.588 – 7.874)
0.025
(0.635)
RAD TYP
0° – 15°
1
0.045 – 0.065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0.014 – 0.026
(0.360 – 0.660)
0.100
(2.54)
BSC
2
3
4
5
6
7
0.125
(3.175)
MIN
J14 1298
OBSOLETE PACKAGE
1002fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1002
U
PACKAGE DESCRIPTION
N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
0.770*
(19.558)
MAX
14
13
12
11
10
9
8
1
2
3
4
5
6
7
0.255 ± 0.015*
(6.477 ± 0.381)
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.325
(7.620 – 8.255)
0.045 – 0.065
(1.143 – 1.651)
0.020
(0.508)
MIN
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325 –0.015
0.005
(0.125)
MIN 0.100
(2.54)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
BSC
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
(
+0.889
8.255
–0.381
)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N14 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1001
Single LT1002
60µV VOS, 1µV/°C Precision Op Amp
LT1884/LT1885
Dual/Quad Precision Op Amp with Rail-to-Rail Output
50µV Max VOS, 400pA Max IB
1002fb
16
Linear Technology Corporation
LT/CPI 1101 1.5K REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 1985