DFP www.vishay.com Vishay Dale Thick Film Resistor Networks, Flat Pack FEATURES • Isolated and bussed schematics available • 0.065" (1.65 mm) height for high density packaging • Low temperature coefficient (-55 °C to +125 °C) ± 100 ppm/°C • Hot solder dipped leads • Highly stable thick film • Wide resistance range • All devices are capable of passing the MIL-STD-202, method 210, condition C “Resistance to Soldering Heat” test STANDARD ELECTRICAL SPECIFICATIONS POWER RATING PACKAGE P25 °C W 0.65 0.65 POWER GLOBAL RATING MODEL ELEMENT P25 °C W 0.25 DFP 0.15 CIRCUIT SCHEMATIC 11 12 MAXIMUM WORKING VOLTAGE (3) VDC 75 75 TEMPERATURE COEFFICIENT (1) ± ppm/°C TOLERANCE (2) ±% RESISTANCE RANGE TCR TRACKING ± ppm/°C 100 100 1, 2, 5 1, 2, 5 10 to 1M 10 to 1M 50 50 Notes • Consult factory for stocked values. (1) Temperature range: -55 °C to +125 °C. (2) ± 2 % standard, ± 1 % and ± 5 % available. (3) Continuous working voltage shall be P x R or maximum working voltage, whichever is less. TECHNICAL SPECIFICATIONS 11 Schematic 7 or 8 isolated resistors The DFPxx11 provides the user with 7 or 8 nominally equal resistors with each resistor isolated from all others. Commonly used in the following applications: • “Wired OR” pull-up • Long-line impedance balancing • Power driven pull-up • LED current limiting • Power gate pull-up • ECL output pull-down • Line termination • TTL input pull-down DFP1411 Pin #1 DFP1611 12 Schematic 13 or 15 resistors with one pin common The DFPxx12 provides the user with a choice of 13 or 15 nominally equal resistors, each connected to a common pin (14 or 16). Commonly used in the following applications: • MOS/ROM pull-up/pull-down • TTL input pull-down • Open collector pull-up • Digital pulse squaring • “Wired OR” pull-up • TTL unused gate pull-up • Power driven pull-up • High speed parallel pull-up • • • • • • • • DFP1412 Pin #1 DFP1612 GLOBAL PART NUMBER INFORMATION New Global Part Numbering: DFP14121K00GD05 (preferred part number information) D F GLOBAL MODEL P 1 4 1 2 1 PIN COUNT SCHEMATIC 14 16 11 = Isolated 12 = Bussed DFP K 0 0 G D 0 5 RESISTANCE VALUE TOLERANCE CODE PACKAGING SPECIAL R= K = k M = M 10R0 = 10 680K = 680 k 1M00 = 1.0 M F=±1% G=±2% J=±5% E05 = Lead (Pb)-free, tube Blank = Standard (Dash number) (Up to 3 digits) From 1 to 999 as applicable D05 = Tin/lead, tube Historical Part Number Example: DFP1412102G (will continue to be accepted) DFP 14 12 102 G D05 HISTORICAL MODEL PIN COUNT SCHEMATIC RESISTANCE VALUE TOLERANCE CODE PACKAGING Note • For additional information on packaging, refer to the Surface Mount Network Packaging document (www.vishay.com/doc?31540). Revision: 12-Sep-13 Document Number: 31513 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 DFP www.vishay.com Vishay Dale DIMENSIONS in inches (millimeters) Pin #1 0.250 (6.35) Min. 0.365 (9.27) Min. 0.385 (9.78) Max. 0.050 (1.27) Typ. 0.019 ± 0.006 (0.48 ± 0.15) 0.250 (6.35) Min. 0.825 (20.96) Max. A 0.265 (6.73) Max. GLOBAL MODEL DFP14 DFP16 DIMENSION A 0.037 ± 0.010 (0.94 ± 0.25) 0.012 ± 0.010 (0.30 ± 0.25) TECHNICAL SPECIFICATIONS MECHANICAL SPECIFICATIONS PARAMETER UNIT DFP14/16 M > 100 ppm/V < 50 typical Maximum operating voltage VDC 75 Operating temperature range °C -55 to +125 Terminals Storage temperature range °C -55 to +150 Body Isolation resistance 11 schematic Voltage coefficient of resistance Model number, schematic number, value tolerance, pin 1 indicator, date code Marking Marking resistance to solvents Permanency testing per MIL-STD-202, method 215 Solderability Per MIL-STD-202, method 208E Per MIL-STD-1276 DFPxx11, DFPxx12 = type G (hot solder dipped). Hot solder dipped leads supplied as standard finish. Epoxy filled ceramic sandwich 12 Schematic Power Rating (W) 11 Schematic Power Rating (W) 0.005 + 0.004 - 0.002 (0.127 + 0.102 - 0.051) 0.065 (1.65) Max. Package 0.65 0.50 Package 0.65 0.50 Single Resistor 0.25 Single Resistor 0.15 - 55 Derating + 25 + 70 + 125 + 150 - 55 Derating Ambient Temperature °C + 25 + 70 + 125 + 150 Ambient Temperature °C PERFORMANCE TEST Power conditioning Thermal shock Short time overload CONDITIONS MAX. R (TYPICAL TEST LOTS) 1.5 x rated power, applied 1.5 h “ON” and 0.5 h “OFF” for 100 h ± 4 h at +25 °C ambient temperature ± 0.50 % R 5 cycles between -65 °C and +125 °C ± 0.50 % R 2.5 x rated working voltage, 5 s ± 0.25 % R 45 min at full rated working voltage at -65 °C ± 0.25 % R 240 h with humidity ranging from 80 % RH to 98 % RH ± 0.50 % R Leads immersed in +260° C solder to within 1/16" of body for 10 s ± 0.25 % R Total of 18 shocks at 100 g's ± 0.25 % R Vibration 12 h at maximum of 20 g's between 10 Hz and 2000 Hz ± 0.25 % R Load life 1000 h at +70 °C, rated power applied 1.5 h “ON”, 0.5 h “OFF” for full 1000 h period. Derated according to the curve. ± 0.50 % R Terminal strength 1.5 pound pull for 30 s ± 0.25 % R Insulation resistance 10 000 M (minimum) - No evidence of arcing or damage (200 VRMS for 1 min) - Low temperature operation Moisture resistance Resistance to soldering heat Shock Dielectric withstanding voltage Revision: 12-Sep-13 Document Number: 31513 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000