cd00004434

AN1715
- APPLICATION NOTE
®
VIPower: SMPS Solutions for Power Line
Modem Application with VIPerX2A
F. Cacciotto - F. Gennaro - M. Sciortino
1. ABSTRACT
This application note investigates about possible power supply solutions based on VIPerX2A family,
realized in order to power a Power Line Modem System (PLMS).
As a starting point, the power supplies have been designed and developed according to the
specifications for a complete PLMS based on ST7538 (by STMicroelectronics), but other diffused PLMS
can be suitably supplied.
2. INTRODUCTION
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The growth of the automation system in home appliance has brought the development of systems able
to exchange information using the electrical network as a communication medium.
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As a result, there is no need to install extra control cable and all the system components can be
connected to the network by plugging them in a wall socket.
These virtual networks also improve the flexibility and the expansibility of the system, since new devices
can be instantly connected to the system by means of a wall socket.
New dedicated modem integrated circuits have been developed in order to make these applications
feasible. A typical PLMS is shown in figure 1.
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The Power Line Modem (PLM) is a half duplex asynchronous FSK modem with a carrier frequency
complying with Europe’s CENELEC EN50065 standard, which specifies the use of carrier frequencies
from 125kHz to 140kHz for home automation and US FCC regulations, which specifies the use of carrier
frequencies lower than 450kHz.
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The Power Line Interface (PLI) connects the PLM to the power lines. It consists in a line driver, which
amplifies the Analog Transmit Output signal (ATO) from the PLM and a line interface, which adapts the
line driver to the power line and insulates the PLMS from the electrical network. Some PLMs directly
integrate the line interface on the chip. The PLI has the following functions:
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- TX Mode: amplifies and filters the transmit signal from the ATO;
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- RX Mode: provides received signal from power lines to the Receive Analog Input (RAI).
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The PLM is connected to a microcontroller or to a Personal Computer (through the RS232 driver
interface), in order to build a home LAN, where each device is able to use any information required
whether it is local (washing machine) or remote (remote control system).
In the previous typical application, the power supply has to be able to provide a single output.
3. VIPerX2A DESCRIPTION
The VIPerX2A family is a range of smart power devices with current mode PWM controller, start-up
circuit and protections integrated in a monolithic chip using VIPower M0 Technology.
May 2003
1/16
AN1715 - APPLICATION NOTE
Figure 1: Power Line Modem: System configuration
Mains
50/60 Hz
PLMS
PLMS
Switch Mode
Power Supply
+10V
+5V
AV CC
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+5V LDO
Regulator
Power
Line Modem
µC
Power
Driver
Analog
Front End
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Power Line Modem System (PLMS)
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Line interface
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Remote Control
System
Washing
machine
+5V
DV CC
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The VIPerX2A family includes:
- VIPer12A, with a 0.4A peak drain current limitation and 730V breakdown voltage;
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- VIPer22A, with a 0.7A peak drain current limitation and 730V breakdown voltage.
The switching frequency is internally fixed at 60kHz by the integrated oscillator of the VIPerX2A. The
internal control circuit offers the following benefits:
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- Large input voltage range on the VDD pin accommodates changes in auxiliary supply voltage;
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- Automatic burst mode in low load condition;
- Overtemperature, overcurrent and overvoltage protection with auto-restart.
The internal current mode structure is shown in figure 2.
The feedback pin (FB pin) is sensitive to current and controls the operation of the device. The Power
MOSFET delivers a sense current IS which is proportional to the drain current ID.
R2 receives this current and the current coming from the FB pin. The voltage across R2 is then compared
to a fixed reference voltage of 0.23 V.
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AN1715 - APPLICATION NOTE
Figure 2: VIPerX2A current internal structure
DRAIN
60kHz
Oscillator
ID
S
PWM Q
LATCH
+VDD
R
IS
Secondary
feedback
0.23V
1kΩ
IFB
FB
R1
230Ω
R2
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SOURCE
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The mosfet is switched off when the following condition is reached:
R 2 ⋅ (I S + I FB ) = 0.23V
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(1)
Using the current sense ratio of the mosfet, GID and considering (1), ID is given by:
 0.23V

I D = G ID ⋅ I S = G ID ⋅ 
− I FB 
 R2

(s)
(2)
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The FB pin is commonly driven by the emitter of an optocoupler but a discrete BJT or a zener diode can
also be used, behaving as a current source. This current is filtered by a small capacitor C to guarantee
the feedback stability. It is necessary to keep this capacitor very close to the FB pin, to avoid high
frequency instability on the compensation loop.
For low drain currents, (2) applies as long as IFB<IFBsd, where IFBsd is an internal threshold of the
VIPerX2A. If IFB exceeds this threshold, the device will stop switching. When the output load is
decreased and the regulation loop increases the FB current to reach the IFBsd threshold, the device
enters burst mode operation by skipping switching cycles and, consequently, reducing the average
switching frequency.
This is achieved when the power drained by the load goes below:
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POUT =
(V
IN DC(min)
⋅ t ON(min) )
2⋅L
2
⋅ f SW
(3)
This feature is especially important when the converter is lightly loaded, in order to have very low input
power consumption.
3/16
AN1715 - APPLICATION NOTE
4. POWER SUPPLY DESCRIPTION AND DESIGN
The SMPS specifications are listed in table 1.
Table 1: SMPS specifications.
185VAC ÷ 265VAC
10V ± 25%
23mA in RX mode
480mA in TX mode
Input Voltage
VOUT
IOUT(min)
IOUT(max)
Due to the low power related to the RX mode, as low as possible switching frequency can be chosen, in
order to have higher order harmonics in the carrier frequency band.
The only way to reduce the switching frequency is to optimise the burst mode operation.
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4.1. Clamp Design
The drain voltage needs to be clamped in order to prevent voltage spikes, due to leakage inductance,
from exceeding the breakdown voltage of the device (730V minimum). The most used solution is the
RCD clamp, as shown in figure 3a. This is a very simple and cheap solution, but it impacts on the
efficiency even at no load condition. If the standby efficiency is important, a zener clamp is
recommended, as shown in figure 3b. However such a solution gives higher power dissipation at full
load, even if the clamp voltage is exactly defined.
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Figure 3: Clamp circuit topology: (a) RCD clamp and (b) Zener clamp
RCD CLAMP
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R
ZENER CLAMP
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(a)
(b)
The capacitor value is calculated in order to charge it with the energy from the leakage inductance and
must ensure that the maximum VSPIKE is never exceeded, thus from energy balance consideration, the
minimum capacitance value is:
C≥
4/16
L LK ⋅ I 2DLIM
(VSPIKE + VR ) 2 − VR2
(4)
AN1715 - APPLICATION NOTE
In order to have a proper operation of the clamp, the minimum value of resistance is:
R≥
1

 V
f SW ⋅ C ⋅ ln1 + SPIKE 
VR 

(5)
Its power rating will be:
PR =
VR2 1
+ ⋅ L ⋅ I2 ⋅ f
R 2 LK DLIM SW
(6)
For a zener clamp, the zener voltage should be:
VZ = VR + VSPIKE
(7)
with a power capability equal to:
PZ =
VZ
1
⋅
⋅ L LK ⋅ I 2DLIM ⋅ f SW
2 VZ − VR
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(8)
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5. APPLICATION DESCRIPTION
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In this chapter, two solutions are presented in order to power a typical PLMS in both isolated and non
isolated applications. The first configuration is typical in home automation systems and the last is suitable
for many industrial applications.
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The regulation is obtained by means of a zener diode in either solution, considering the high output
voltage tolerance for this application.
The transformer has been designed with lower primary inductance compared to a typical 5W application.
This enables the device to work in burst mode during RX condition, reducing the average switching
frequency.
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5.1. Isolated Solution
The first proposed solution regards the isolated Flyback topology with a single input rectifier diode and an
input C-L-C filter. Such a filter provides both DC voltage stabilization and EMI filtering.
In the considered application, the transformer has a secondary winding with galvanic insulation and an
auxiliary winding to supply the VIPer.
In table 2 the transformer specifications are listed and the converter schematic is shown in figure 4.
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Table 2: Isolated transformer specifications
Core geometry
Core material
BSAT
Air Gap
Primary Inductance
Leakage Inductance
Primary Winding
Auxiliary Winding
Output Winding
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E13/7/14
N27 or equivalent
380mT
0.24mm
1.8mH
54µH
166 turns
52 turns
22 turns
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AN1715 - APPLICATION NOTE
The converter has been tested in several load conditions and in the whole input voltage range, i.e. from
185VAC to 265VAC. Load and line regulation results are shown in figure 5 and figure 6 respectively.
The efficiency measurement has been done using a DC power source and an amperometer, in order to
have a higher accuracy than in AC measurements: the results are shown in figure 7.
In all the considered operating conditions, the converter meets the specifications given in table 1.
Figure 4: Isolated Flyback converter
R-fuse
D1
L1
1N4007
470uH
AC IN
10
TF1
1.2k
C6
470uF
STTH106
D2
+10V
L2
22uH
D4
C5
100pF
R2
150k
R1
BYW100-200
+
C7
47uF
+
D3
uc
BAS21
+ C1
4.7uF
+ C2
4.7uF
FB
+
C3
10uF
P
e
let
CONTROL
OPT
PC817
SOURCE
VIPer12A
C4
47nF
AC IN
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Figure 5: Load Regulation
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9.8
185V
220V
265V
9.6
9.4
VOUT (V)
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C8
2.2nF-2kV/Y2
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R4
220
DRAIN
VDD
9.2
9.0
8.8
0
100
200
300
IOUT (mA)
6/16
400
500
DZ1
8.2V
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GND OUT
AN1715 - APPLICATION NOTE
Figure 6: Line Regulation
10,0
Rx Mode
Full load
VOUT (V)
9,5
9,0
8,5
180
200
220
240
260
280
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VINAC(V)
Figure 7: Efficiency Vs. output current
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90
Efficiency (%)
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70
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185V
230V
265V
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60
50
40
0
100
200
300
400
500
IOUT (mA)
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In figures. 8, 9 and 10 typical waveforms in RX mode and full load are shown: it is important to point out
that, in RX Mode, the converter works in burst mode, limiting the maximum switching frequency to
30kHz.
The startup transient is shown in figure 11. The maximum drain voltage has been measured under worstcase operations, i.e. start-up at VIN=265VAC and full load.
The maximum measured value is 594V, as shown in figure 11(b) and the output voltage ripple at full load
and VIN=230VAC is shown in figure 12.
7/16
AN1715 - APPLICATION NOTE
Figure 8: Typical waveforms at 185VAC: (a) RX mode and (b) Full load
Ch1 ∆Freq – 29.41kHz
Ch1 Freq – 14.65kHz
Ch1 Max – 376V
Ch2 Max – 140mA
Ch1 Freq – 58.40kHz
Ch1 Max –444V
Ch2 Max – 304mA
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Figure 9: Typical waveforms at 230VAC: (a) RX mode and (b) Full load
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Ch1 ∆Freq – 29.41kHz
Ch1 Freq – 14.67kHz
Ch1 Max – 444V
Ch2 Max – 156mA
Ch1 Freq – 58.19kHz
Ch1 Max –504V
Ch2 Max – 296mA
(a)
8/16
(b)
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AN1715 - APPLICATION NOTE
Figure 10: Typical waveforms at 265VAC: (a) RX mode and (b) Full load
Ch1 ∆Freq – 29.41kHz
Ch1 Freq – 14.65kHz
Ch1 Max – 500V
Ch2 Max – 164mA
Ch1 Freq – 58.22kHz
Ch1 Max –560V
Ch2 Max – 296mA
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(b)
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Figure 11: (a) Start up time at 230VAC and (b) VDS during start-up at 265VAC at full load
VDD
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VOUT
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VDS
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Ch1 Freq – 59.74kHz
Ch1 Max –594V
Ch1 Max – 524V
Ch2 Max – 17.1V
Ch3 Max – 9.2V
(a)
(b)
9/16
AN1715 - APPLICATION NOTE
Figure 12: Output voltage ripple at 230VAC and full load
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5.2. Non Isolated Flyback Description
For non-isolated applications, the following solution can be used.
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The transformer specifications are the previous ones, but galvanic insulation and auxiliary winding are
not required. The converter schematic is shown in figure 13.
The VDD voltage is provided rectifying the transformer output voltage. This allows to have a supply
voltage higher of 0.8V (forward voltage drop on D4), avoiding a VDD lower than VDDoff(MAX)=9V.
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Figure 13: Non isolated Flyback converter
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R2
AC IN
1k
R1
10
D1
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1N4007
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L1
470uH
C1
4.7uF
400V
du
10/16
D2
1N4148
C6
470uF
+
C7
47uF
+
D3
STTH106
C3
10uF
+ C2
4.7uF
400V
TF1
VIPer12A
VDD
FB
C4
10nF
AC IN
+10V
C5
100pF
R2
150k
DZ1
9.1V
L2
22uH
D4
+
+
BYW100-200
DRAIN
CONTRO
L
SOURCE
GND OUT
AN1715 - APPLICATION NOTE
Load and line regulation results are shown in figures 14 and 15 respectively, while the efficiency is shown
in Figure 16. The converter shows good performance concerning the output voltage regulation, with
efficiency higher than 75% at full load.
Figure 14: Load Regulation
10,6
185V
220V
265V
10,4
VOUT (V)
10,2
10,0
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9,6
0
100
200
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300
IOUT (mA)
Figure 15: Line Regulation
11,0
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VOUT (V)
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400
)
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Rx Mode
Full load
10,5
10,0
9,5
9,0
180
200
220
240
260
280
VINAC (V)
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AN1715 - APPLICATION NOTE
Figure 16: Efficiency Vs. output current
100
185V
230V
265V
90
Efficiency (%)
80
70
60
50
40
0
100
200
300
400
500
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IOUT (mA)
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In figures 17, 18 and 19 typical waveforms in RX mode and full load are shown: even in this case, in RX
Mode, the converter works in burst mode, with a maximum switching frequency of 30kHz.
The startup transient is shown in figure 20. The maximum drain voltage has been measured under worstcase operations, i.e. start-up @VIN=265VAC and full load.
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The maximum measured value is 612V, as shown in figure 20(b) and the output voltage ripple at full load
and VIN=230VAC is shown in figure 21.
Figure 17: Typical waveforms at 185VAC: (a) RX and (b) Full load
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Ch1 ∆Freq – 19.84kHz
Ch1 Freq – 29.33kHz
Ch1 Max – 380V
Ch2 Max – 112mA
12/16
Ch1 Freq – 58.47kHz
Ch1 Max –454V
Ch2 Max – 312mA
(a)
(b)
AN1715 - APPLICATION NOTE
Figure 18: Typical waveforms at 230VAC: (a) RX mode and (b) Full load
Ch1 ∆Freq – 29.07kHz
Ch1 Freq – 19.52kHz
Ch1 Max – 456V
Ch2 Max – 128mA
Ch1 Freq – 58.23kHz
Ch1 Max –518V
Ch2 Max – 304mA
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(b)
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Figure 19: Typical waveforms at 265VAC: (a) RX mode and (b) Full load
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Ch1 ∆Freq – 29.76kHz
Ch1 Freq – 14.67kHz
Ch1 Max – 512V
Ch2 Max – 128mA
Ch1 Freq – 58.11kHz
Ch1 Max –570V
Ch2 Max – 304mA
(a)
(b)
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AN1715 - APPLICATION NOTE
Figure 20: (a) Start up time at 230VAC and (b) VDS during start-up at 265VAC at full load
VDD
VOUT
VDS
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Ch1 Freq – 60.11kHz
Ch1 Max –612V
Ch1 Max – 548V
Ch2 Max – 15.2V
Ch3 Max – 10.3V
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(b)
(a)
Figure 21: Output voltage ripple at 230VAC and full load
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7. SPECTRUM FREQUENCY COMPARISON
If lower switching frequency is required during RX mode due to interference issues, the primary
inductance of the transformer has to be reduced down to 800µH, resulting in a higher drain peak current.
This imposes a higher drain current capability device such as the VIPer22A, whose minimum peak drain
current is of 560mA.
In figure 22 the comparison between the solutions with VIPer12A and VIPer22A is shown: it is important
14/16
AN1715 - APPLICATION NOTE
to point out that, due to the lower primary inductance, the converter with VIPer22A in burst mode works
with a lower average switching frequency respect to the solution using VIPer12A, but with a higher peak
drain current.
The harmonic current spectra for the two converters are shown in figure 23 and 24 respectively.
It is possible to note that, in the frequency range up to 200kHz, the current harmonics amplitudes in the
VIPer22A converter are lower than VIPer12A converter. This can give less interference issues when the
PLMS works in RX mode.
Figure 22: Typical waveforms at 185VAC in RX Mode: (a) with VIPer12A and (b) with VIPer22A
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Ch1 ∆Freq – 19.84kHz
Ch1 Freq – 29.33kHz
Ch1 Max – 380V
Ch2 Max – 112mA
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Ch1 ∆Freq – 14.79kHz
Ch1 Freq – 19.70kHz
Ch1 Max – 334V
Ch2 Max – 269mA
(b)
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Figure 23: Harmonic current spectrum with VIPer12A
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Amplitude (mA)
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VIPer12A
20
15
10
5
0
0
100
200
300
400
500
Frequency (kHz)
15/16
AN1715 - APPLICATION NOTE
Figure 24: Harmonic current spectrum with VIPer22A
25
VIPer22A
Amplitude (mA)
20
15
10
5
0
0
100
200
300
400
500
Frequency (kHz)
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8. CONCLUSION
Two solutions have been introduced in order to power a PLMS based on ST7538 chip specifications.
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The power supplies have been designed and developed using the VIPower device VIPer12A, since it
represents the device of choice for the considered output power level in terms of performance and price.
The main result of this investigation is that the proposed power supply performs well in terms of line and
load regulation, working in burst mode when the PLMS works in RX mode, thus reducing the maximum
switching frequency to 30kHz.
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Using VIPer22A it is possible to reduce the average burst switching frequency to 19KHz, since a
transformer with a lower primary inductance than VIPer12A converter can be chosen.
Even if this device is more expensive compared to VIPer12A, the performance in terms of frequency
reduction will be improved and, consequently, the interference with the PLMS will be reduced.
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
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 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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