AN4354 Application note L648x devices: gate drivers setup Enrico Poli Introduction This document describes the operation of the gate driving circuitry which is integrated in the L648x devices and provides guidance on how to set parameters according to the application requirements. March 2015 DocID025239 Rev 2 1/14 www.st.com 14 Contents AN4354 Contents 1 2 3 2/14 Gate driving circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Advantages of constant current driving of the MOSFET gates . . . . . . . . . 5 1.2 Turn-on sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 Turn-off sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Gate drivers setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Gate current (IGATE), controlled current time (TCC) and turn-off boost time (TBOOST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Deadtime (TDT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Blanking time (TBLANK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Wrong setup issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DocID025239 Rev 2 AN4354 1 Gate driving circuitry Gate driving circuitry The L648x devices integrate a programmable gate driving circuitry which allows to drive a wide range of external N-channel MOSFETs. The parameters which can be set are listed Table 1. Table 1. Gate driving circuit parameters Parameter Description The current used to charge/discharge the gate of the MOSFETs. Gate source/sink current Controlled current time (charging time) The charging/discharging time of the gate of the MOSFETs. The part of the discharging time during which the gate current is forced to the maximum value. Turn-off current boost time The time between the turn-off of the MOSFETs and the turnon of the opposite one. Deadtime The time after the MOSFETs commutation where the sensing circuitry is disabled in order to avoid spurious triggering. Blanking time Figure 1. Gate driving circuit diagram &3 9%227 96 9&& 96 +9*;< 9 +6026)(7 287 ;< 9&& /9*;< /6026)(7 5 VHQVH *1' /RQO\ $0 DocID025239 Rev 2 3/14 14 Gate driving circuitry AN4354 Both the high-side and low-side gate drivers are programmable current generators which allow to charge and discharge the MOSFETs gate with a constant current. The gate drivers also integrate a Miller clamp MOSFET which avoids induced turn-on effect. The low-side gate driver is supplied by the VCC pin which can be connected both to an external voltage source and to the integrated linear regulator which generates the supply voltage (7.5 V or 15 V according to the configuration) from the VSREG supply pin. The high-side gate driver is supplied by a charge pump circuitry. This way on time of the high-side MOSFET is not limited as in the case of a bootstrap capacitor. A clamping diode limits the gate-source voltage of the high-side MOSFET to 17 V avoiding the breaking of the gate in case of the power stage output is short-circuited to ground. In fact in this case, if the voltage limiter was not present, the final gate-source voltage of the high-side MOSFET was equal to VBOOT (see Figure 2). Figure 2. High-side gate driver operation when output is shorted to ground 9%227 &3 96 9&& 96 +9*;< 9 +6026)(7 9JV 9 287;< $0 Warning: 4/14 The clamping diode protects the MOSFET from the Vgs breakdown, but not by the high current which can be generated by the short-circuit condition. DocID025239 Rev 2 AN4354 1.1 Gate driving circuitry Advantages of constant current driving of the MOSFET gates The L648x gate drivers, thanks to the possibility to drive the MOSFET gates using a programmable constant current, have two main advantages: 1. The slew rate of the power stage is controlled allowing a precise EMI management. 2. No gate resistors are required reducing the number of components in the bill of material. The output slew rate depends on how fast the MOSFET gate is charged in the Miller plateau region. In a classic gate driver the charging/discharging current is adjusted adding a resistor between the gate driver output and the MOSFET gate (see Figure 3). This way the output slew rate can be limited, but its value depends on the load current (the plateau voltage changes with the drain current). Using a true current generator, the L648x gate driver forces a constant gate current during the entire plateau region regardless of the load current. Figure 3. Classic gate driver circuit vs. L648x gate driver -Y $MBTTJDHBUFESJWFS 7H 7H * HBUF 3HBUF * HBUF 5IFPVUQVUTMFXSBUFJTBEKVTUFE UISPVHIUIFHBUFSFTJTUBODF BOEJUDIBOHFTXJUIMPBEDVSSFOU .JMMFSQMBUFBVWPMUBHF WBSJFTXJUIUIFESBJODVSSFOU 5IFPVUQVUTMFXSBUFJTBEKVTUFE QSPHSBNNJOHUIFDVSSFOUHFOFSBUPST OPFYUFSOBMDPNQPOFOUJTSFRVJSFE BOEJUEPFTOPUEFQFOECZMPBEDVSSFOU ".W 1.2 Turn-on sequence When one of the external MOSFET must be turned-on the gate driving circuitry disables the respective Miller clamp switch and starts forcing the programmed current into the gate. After the controlled current time expires, the high-side and the low-side drivers act differently: the low-side drivers do not limit the gate current; the high-side ones instead limit the gate current to about 1 mA (see Figure 4). DocID025239 Rev 2 5/14 14 Gate driving circuitry AN4354 Figure 4. Turn-on sequence U DD -PXTJEFHBUFDVSSFOUJTOPU MJNJUFEBUUIFFOEPGUIFUDDUJNF 2UPU *HBUF )JHITJEFHBUFDVSSFOUJTMJNJUFE UPN"BUUIFFOEPGUIFUDDUJNF ".W During the turn-on the gate-source voltage (Vgs) of the MOSFET is increased and it starts conducting current. Meanwhile the drain-source voltage (Vds) is still equal to the motor supply voltage. When the Miller plateau region is reached the gate voltage remains constant while the drain-source voltage decreases down to zero. At the end of the plateau the MOSFET enters in the linear region and the gate voltage increases up to the VCC value. Figure 5. MOSFET turn-on 9 && 9J 0LOOHUSODWHDX UHJLRQ 4J W 96 9 GV ,G W $0 6/14 DocID025239 Rev 2 AN4354 1.3 Gate driving circuitry Turn-off sequence When one of the external MOSFET must be turned-off the gate driving circuitry starts sinking the programmed current from the gate. At the beginning of the controlled current time the gate current is set to the maximum for tboost time. After the controlled current time expires, the Miller clamp switch is turned on (see Figure 6). Figure 6. Turn-off sequence W FF W ERRVW , ERRVW , JDWH 4 WRW $0 During the turn-off the gate-source voltage (Vgs) of the MOSFET decreases down to the Miller plateau region. During the plateau the gate-source voltage remains constant while the drain-source voltage (Vds) reaches the motor supply value. Meanwhile the MOSFET still conducts the current. After the plateau region, the drain current decreases down to zero as the gate-source voltage. DocID025239 Rev 2 7/14 14 Gate driving circuitry AN4354 Figure 7. MOSFET turn-off 9 && 9J 4J 0LOOHUSODWHDX UHJLRQ W ERRVW W 9 GV 96 ,G W $0 8/14 DocID025239 Rev 2 AN4354 Gate drivers setup 2 Gate drivers setup 2.1 Gate current (IGATE), controlled current time (TCC) and turnoff boost time (TBOOST) The gate current and the controlled current time define the charge which is forced into the MOSFET gate through the following formula: Qgate = Igate × tcc This value should be greater than the total gate charge (Qg) of the MOSFET when the gatesource voltage is equal to VCC. The relation between the total gate charge and the gate voltage is usually reported on the MOSFET datasheet as a graph. Keeping constant the total gate charge, the switching time of the MOSFET is adjusted through the tcc parameter (see Figure 8). Higher gate current values allow shorter switching time reducing the power dissipation of the output stage. In this case the EMI can be significant. Reducing the gate current the power dissipation is increased due the longer switching time, but the EMI are lower. Figure 8. Gate current vs. controlled current time , JDWH )DVWFRPPXWDWLRQV /RZSRZHUGLVVLSDWLRQ +LJK(0, 6ORZFRPPXWDWLRQV +LJKSRZHUGLVVLSDWLRQ /RZ(0, W FF $0 The boost time (tboost) can be used to shorten the time needed to reach the plateau region. This way the commutation is faster, but the output slew rate is still controlled by the programmed gate current. The maximum duration of the boost time is determined by the Qgs and the Qgd (see Figure 9): the charge sunk by the gate driver during the boost time (tboost × Iboost) must be lower than the charge required reaching the plateau region (Qg - Qgd - Qgs). Their value depends on the maximum load current and supply voltage of the output stage. DocID025239 Rev 2 9/14 14 Gate drivers setup AN4354 Figure 9. Gate charge graph 9 JV 9 && 4 JV 4 JG 4J 4J $0 2.2 Deadtime (TDT) The deadtime is a period between the end of the turn-off of a MOSFET and the turn-on of the opposite one. This time is required to avoid cross conduction effects. The deadtime duration should be proportional with the commutation time: faster commutations usually allow shorter deadtime. In most cases a deadtime between 125 and 375 ns is enough for proper operation. 2.3 Blanking time (TBLANK) At the end of each commutation the sensing circuitry is disabled during the blanking time. The duration of the blanking time depends on the characteristics of the MOSFETs, in particular the body diode, the layout of the application and the commutation speed. These parameters generate the electrical perturbations which must be masked in order to avoid spurious triggering of the sensing circuitry. In most cases a blanking time between 375 and 750 ns is enough for proper operation. For very fast commutation speed the maximum blanking time value should be used. 2.4 Wrong setup issues When the gate driver setup is not properly set the system operation is compromised. If the gate charge is lower than the total gate charge, the MOSFET is not completely turned on (Vgs is lower than VCC). According to the gap between the total gate charge and the actual charge supplied by the gate drivers two different scenarios could occur. In the first scenario the gate charge is enough to complete the Miller plateau region, but the final Vgs is low (see Figure 10). In this case the Rds(ON) of the MOSFET is higher than the target value increasing the power dissipation and lowering the overcurrent threshold. In fact 10/14 DocID025239 Rev 2 AN4354 Gate drivers setup the overcurrent detection is based on the voltage drop on the on resistance of the MOSFET: increasing the resistance value the protection is triggered at lower load currents. This condition can also cause problems during the turn-off of the MOSFET as shown in Figure 11. At the beginning of the turn off the gate voltage may have reached the VCC value, in particular for the low-side MOSFETs where the gate current is not limited at the end of the tCC time (see Section 1.2: Turn-on sequence on page 5 statement). Starting from VCC the gate voltage is decreased down to the Miller plateau region, but the gate charge is not enough to complete the plateau and the Miller clamp is closed before the Vds commutation is ended. The MOSFET is immediately turned off and as a consequence the output of the power stage is subjected to a strong slew rate which could cause critical issues. In the second case the gate charge is not enough to complete the Miller plateau region (see Figure 12). In this case the output commutation is not completed and the overcurrent protection, which measures the voltage drop on the MOSFET, is triggered even if very low or even no load current is present. Figure 10. Turn-on with low gate charge 7 HT 7 $$ -PXTJEF )JHITJEF U U DD UCMBOL ".W DocID025239 Rev 2 11/14 14 Gate drivers setup AN4354 Figure 11. Turn-off with low gate charge 9 GV 96 )DVWVOHZUDWH ZKLFKFRXOGFDXVH FULWLFDOIDLOXUHV W 9 JV 9&& 9 JV W W FF $0 Figure 12. Turn-on with very low gate charge 9 GV 96 +LJKVLGH 2&'IDLOXUH 9 2&'WK /RZVLGH W 9 JV 9 && W W FF WEODQN $0 12/14 DocID025239 Rev 2 AN4354 3 Revision history Revision history Table 2. Document revision history Date Revision 24-Sep-2013 1 Initial release. 2 Replaced title on page 1 by new title “L648x devices: gate drivers setup”. Replaced “cSPIN™ family” by “L648x” in the whole document. Minor modifications throughout document. 27-Mar-2015 Changes DocID025239 Rev 2 13/14 14 AN4354 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. 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