TS3001 A 1V/1µA Easy-to-Use Resistor-Tuned Silicon Oscillator/Timer FEATURES DESCRIPTION The TS3001 is a single-supply CMOS oscillator fully specified to operate at 1V while consuming a 1µA supply current at an output frequency of 25kHz. This oscillator is compact, easy-to-use, and versatile. Optimized for ultra-long life, battery-powered applications, the TS3001 joins the TS3002 CMOS oscillator in the “NanoWatt Analog™” highperformance analog integrated circuits portfolio. The TS3001 can operate from single-supply voltages from 0.9V to 1.8V. Ultra Low Supply Current: 1µA at 25kHz Supply Voltage Operation: 0.9V to 1.8V Programmable Frequency Range: o 5.2kHz ≤ FOUT ≤ 90kHz FOUT Period Drift: 0.021%/°C PWMOUT Duty Cycle Range: 12% to 90% Single Resistor Sets Output Frequency Output Driver Resistance: 160Ω APPLICATIONS Portable and Battery-Powered Equipment Low-Parts-Count Nanopower Oscillator Compact Nanopower Replacement for Crystal and Ceramic Oscillators Nanopower Pulse-width Modulation Control Nanopower Pulse-position Modulation Control Nanopower Clock Generation Nanopower Sequential Timing Requiring only a resistor to set the output frequency, the TS3001 represents a 66% reduction in pcb area and a factor-of-10 reduction in power consumption over other CMOS-based integrated circuit oscillators. When compared against industry-standard 555-timerbased products, the TS3001 offers up to 93% reduction in pcb area and four orders of magnitude lower power consumption. The TS3001 is fully specified over the -40°C to +85°C temperature range and is available in a low-profile, 8pin 2x2mm TDFN package with an exposed backside paddle. TYPICAL APPLICATION CIRCUIT Table 1: FOUT vs RSET RSET (MΩ) FOUT (kHz) 1 2.49 4.32 6.81 9.76 110 44 25.5 16 11 Page 1 © 2014 Silicon Laboratories, Inc. All rights reserved. TS3001 ABSOLUTE MAXIMUM RATINGS VDD to GND.................................................................... -0.3V to +2V VCNTRL to GND ............................................................... -0.3V to +2V RSET to GND................................................................ -0.3V to +2V FOUT, PWMOUT to GND ............................................. -0.3V to +2V Short Circuit Duration FOUT, PWMOUT to GND or VDD .................................................................................. Continuous Continuous Power Dissipation (TA = +70°C) 8-Pin TDFN (Derate at 23.8mW/°C above +70°C) ....... 1951mW Operating Temperature Range ................................. -40°C to +85°C Storage Temperature Range .................................. -65°C to +150°C Lead Temperature (Soldering, 10s)...................................... +300°C Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART CARRIER QUANTITY MARKING TS3001ITD822 Tape & Reel ----- Tape & Reel 3000 AAG TS3001ITD822T Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges. Page 2 TS3001 Rev. 1.0 TS3001 ELECTRICAL CHARACTERISTICS VDD = 1V, VCNTRL = VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 0pF, CLOAD(PWM) = 0pF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. See Note 1. PARAMETER Supply Voltage SYMBOL VDD Supply Current IDD CONDITIONS FOUT Period Line Regulation FOUT Period Temperature Coefficient PWMOUT Duty Cycle FOUT, PWMOUT Rise Time FOUT, PWMOUT Fall Time tFOUT ∆tFOUT/V CNTRL Output Current -40°C ≤ TA ≤ 85°C -40°C ≤ TA ≤ 85°C 38.5 36.8 1V ≤ VDD ≤ 1.8V VCNTRL = 0.03 x VDD VCNTRL = 0.15 x VDD VCNTRL = 0.27 x VDD 6 45 84 MAX 1.8 1.5 2.8 3.7 5.4 41.6 44.6 UNITS V µA µs 1.8 %/V 0.021 %/°C 10.5 49.8 91 15 54.2 98 % tRISE See Note 2, CL = 15pF 8.6 ns tFALL See Note 2, CL = 15pF 7.9 ns See Note 3 0.08 % FOUT Jitter RSET Pin Voltage 2.1 ∆tFOUT/∆T DC(PWMOUT) TYP 1 1 -40°C ≤ TA ≤ 85°C VCNTRL = 0.15 x VDD FOUT Period MIN 0.9 V(RSET) 0.3 25 ICNTRL -40°C ≤ TA ≤ 85°C V 45 100 375 nA PWMOUT Enable VPWM_EN (VDD - VCNTRL ), 0.9V < VDD < 1.8V PWMOUT Disable High Level Output Voltage, FOUT and PWMOUT Low-level Output Voltage, FOUT and PWMOUT VPWM_DIS (VDD - VCNTRL ), 0.9V < VDD < 1.8V mV VDD - VOH IOH = 1mA 160 mV VOL IOL = 1mA 140 mV 131 mV Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified. Note 2: Output rise and fall times are measured between the 10% and 90% of the VDD power-supply voltage levels. The specification is based on lab bench characterization and is not tested in production. Note 3: Timing jitter is the ratio of the peak-to-peak variation of the period to the mean of the period. The specification is based on lab bench characterization and is not tested in production. TS3001 Rev. 1.0 Page 3 TS3001 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 1V, VCNTRL = VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted. Values are at TA = 25°C unless otherwise noted. FOUT Period vs Temperature 2.5 41 2 40.5 PERIOD - µs SUPPLY CURRENT - µA Supply Current vs FOUT Period 1.5 39.5 1 0.5 39 0 40 80 120 160 200 -40 35 60 Supply Current vs CLOAD(FOUT) Supply Current vs Temperature 85 1.5 SUPPLY CURRENT - µA 1.6 1.4 1.2 1 1.36 1.22 1.08 0.94 0.8 0.8 0 10 30 20 40 -40 -15 10 35 60 85 TEMPERATURE - ºC CLOAD- pF FOUT Period vs Supply Voltage Start-up Time vs Supply Voltage 1.8 START-UP TIME - ms 40.4 40.2 PERIOD - µs 10 TEMPERATURE - ºC 1.8 40 39.8 1.66 1.52 1.38 1.24 1.1 39.6 0.9 1.05 1.2 1.35 1.5 1.65 SUPPLY VOLTAGE - Volt Page 4 -15 PERIOD - µs 2 SUPPLY CURRENT - µA 40 1.8 0.9 1.2 1.5 1.8 SUPPLY VOLTAGE - Volt TS3001 Rev. 1.0 TS3001 TYPICAL PERFORMANCE CHARACTERISTICS VDD = 1V, VCNTRL = VDD, RSET = 4.32MΩ, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted. Values are at TA = 25°C unless otherwise noted. Supply Current Distribution Period vs RSET 35% 200 30% PERCENT OF UNITS - % PERIOD - µs 160 120 80 40 25% 20% 15% 10% 5% 0% 0 0 4 8 12 16 20 0.97 RSET - MΩ 0.99 1.01 1.03 SUPPLY CURRENT - µA FOUT Transient Response VDD = 1.5V, CLOAD = 47pF FOUT 200mV/DIV FOUT 500mV/DIV FOUT Transient Response VDD = 1V, CLOAD = 47pF 5µs/DIV FOUT and PWMOUT Transient Response VDD = 1V, VCNTRL = 0.035 x VDD, CLOAD = 22pF FOUT and PWMOUT Transient Response VDD = 1.5V, VCNTRL = 0.035 x VDD, CLOAD = 22pF PWMOUT 1V/DIV PWMOUT 500mV/DIV FOUT 1V/DIV FOUT 500mV/DIV 5µs/DIV 5µs/DIV TS3001 Rev. 1.0 5µs/DIV Page 5 TS3001 PIN FUNCTIONS Page 6 PIN NAME 1 FOUT 2 NC 3 PWMOUT 4 CNTRL 5,6 GND 7 RSET 8 VDD EP ----- FUNCTION Fixed Duty Cycle Output. A push-pull output stage with an output resistance of 160Ω, the FOUT pin swings from GND to VDD. For lowest power operation, capacitive loads should be minimized and resistive loads should be maximized. No Connection. Pulse-width Modulated Output. A push-pull output stage with an output resistance of 160Ω, the PWMOUT pin is wired anti-phase with respect to FOUT and swings from GND to VDD. For lowest power operation, capacitive loads should be minimized and resistive loads should be maximized. PWMOUT Enable and Duty Cycle Control Input. An analog input pin, the VCNTRL pin voltage enables the TS3001’s PWM engine and controls the duty cycle at PWMOUT from 12% (VCNTRL = 0.03 x VDD) to 90% (VCNTRL = 0.27 x VDD). Enabling the PWM engine increases the TS3001’s nominal operating supply current. To disable the TS3001’s PWM engine, CNTRL shall be connected to VDD. Ground – Connect this pin to the system’s analog ground plane. FOUT Programming Resistor Input. A 4.32MΩ resistor connected from this pin to GND sets the TS3001’s internal oscillator’s output period to 40μs (25kHz). For optimal performance, the composition of the RSET resistor shall be consistent with tolerances of 1% or lower. The RSET pin voltage is 0.3V at a 1V supply. Power Supply Voltage Input. While the TS3001 is fully specified at 1V, the supply voltage range is 0.9V ≤ VDD ≤ 1.8V. It is always considered good engineering practice to bypass the VDD pin with a 0.1μF ceramic decoupling capacitor in close proximity to the TS3001. Exposed paddle is electrically connected to GND. TS3001 Rev. 1.0 TS3001 BLOCK DIAGRAM THEORY OF OPERATION The TS3001 is a user-programmable oscillator where the period of the square wave at its FOUT terminal is generated by an external resistor. The output frequency is given by: FOUT (kHz) = 1 tFOUT (µs) 1E6 k x RSET MΩ Table 1: FOUT vs RSET RSET (MΩ) FOUT (kHz) 1 2.49 4.32 6.81 9.76 110 44 25.5 16 11 TS3001 Rev. 1.0 where the scalar k is approximately 9.09E3. With an RSET = 4.32MΩ, the output frequency is approximately 25kHz with a 50% duty cycle. As design aids, Tables 1 lists TS3001’s typical FOUT for various standard values for RSET. The TS3001 also provides a separate PWM output signal at its PWMOUT terminal that is anti-phase with respect to FOUT. In addition, applying a voltage at the CNTRL both enables the TS3001’s internal PWM engine as well as adjusting the duty cycle from 12% to 90%. A dc control voltage equal to 0.03 x VDD applied to the CNTRL pin enables the PWM engine to set the duty cycle to 12%. A dc control voltage equal to 0.27 x VDD increases the duty cycle to 90% and connecting CNTRL to VDD disables the PWM engine altogether. Configured for nominal operation (PWM engine OFF), the supply current of the TS3001 is 1µA; enabling the PWM engine increases the TS3001 operating supply current as shown in the electrical specification table. Page 7 TS3001 APPLICATIONS INFORMATION Minimizing Power Consumption To keep the TS3001’s power consumption low, resistive loads at the FOUT and PWMOUT terminals increase dc power consumption and therefore should be as large as possible. Capacitive loads at the FOUT and PWMOUT terminals increase the TS3001’s transient power consumption and, as well, should be as small as possible. One challenge to minimizing the TS3001’s transient power consumption is the probe capacitance of oscilloscopes and frequency counter instruments. Most instruments exhibit an input capacitance of 15pF or more. Unless buffered, the increase in transient load current can be as much as 400nA. To minimize capacitive loading, the technique shown in Figure 1 can be used. In this circuit, the principle of series-connected capacitors can be used to reduce the effective capacitive load at the TS3001’s FOUT and PWMOUT terminals. Figure 1: Using an External Capacitor in Series with Probes Reduces Effective Capacitive Load. TS3001 Start-up Time As the TS3001 is powered up, its FOUT terminal (and PWMOUT terminal, if enabled) is active once the applied VDD is higher than 0.9 volt. Once the applied VDD is higher than 0.9 volt, the master oscillator achieves steady-state operation within 1.2ms. Current- and Voltage-Controlled Oscillators The TS3001 can be configured into a Current-Controlled Oscillator as shown in Figure 2. Figure 2: Configuring the TS3001 into a Current-Controlled Oscillator. With a current source sourcing a current of 223nA to 262nA, FOUT can generate an output signal with a frequency range of 5.2kHz to 90kHz. In a similar manner, a Voltage-Controlled Oscillator can be configured as shown in Figure 3. In this case, a voltage source sourcing a voltage of 290mV to 341mV can generate an FOUT output signal frequency range of 5.2kHz to 90kHz as well. It is recommended to use resistor values with a 1% tolerance. To determine the optimal value for CEXT once the probe capacitance is known by simply solving for CEXT using the following expression: CEXT = 1 1 1 - CLOAD(EFF) CPROBE For example, if the instrument’s input probe capacitance is 15pF and the desired effective load capacitance at either or both FOUT and PWMOUT terminals is to be ≤5pF, then the value of CEXT should be ≤7.5pF. Page 8 Figure 3: Configuring the TS3001 into a Voltage-Controlled Oscillator. TS3001 Rev. 1.0 TS3001 Using a Potentiometer to Trim the TS3001’s Output Frequency Using Standard Resistors to Increase FOUT Resolution By using a fixed resistor and a potentiometer, the output frequency of the TS3001 can be trimmed as shown in Figure 4. By selecting a fixed resistor R1 with a tolerance of 0.1% and a potentiometer P1 with a 5% tolerance, the output frequency can be trimmed to provide a ±2% trimming range. As shown in Figure 4, R1+P1 set the output frequency to 25.052kHz when P1 = 0Ω and with P1 =200kΩ, the resulting output frequency is 24.024kHz. The TS3001 can be configured to provide a 0.1% resolution on the output frequency as shown in Figure 5. To do so, R1 can be set to approximately 10% of the value selected for R2. In addition, R2 and R1 should be chosen with a 0.1% and 1% tolerance, respectively. Since R2 is 90% of the total resistance, it has the largest impact on the resolution of the output frequency. With R1 = 91kΩ and R2 = 910kΩ, the output frequency is 90kHz and with R1 = 400kΩ and R2 = 4MΩ, the output frequency is 23kHz. Figure 4: Using a Fixed Resistor and a Potentiometer to Trim the TS3001’s Output Frequency. TS3001 Rev. 1.0 Figure 5: Setting the TS3001’s Output Frequency to 0.1% Resolution using Standard Resistors. Page 9 TS3001 PACKAGE OUTLINE DRAWING 8-Pin TDFN22 Package Outline Drawing (N.B., Drawing not to scale; all dimensions in mm; JEDEC MO-229 compliant) BOTTOM VIEW SIDE VIEW Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. 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