Si102x Ultra Low Power, 128/64/32/16 kB, LCD MCU with Integrated 240-960 MHz EZRadioPRO® Transceiver Ultra-Low Power @ 3.6 V - - - 18.5 mA receive - 18 mA @ +1 dBm transmit - 30 mA @ +13 dBm transmit - 85 mA @ +20 dBm transmit - Data rate = 0.123 to 256 kbps - Auto-frequency calibration (AFC) - Antenna diversity and transmit/receive switch control - Programmable packet handler - TX and RX 64-byte FIFOs - Frequency hopping capability - On-chip crystal tuning High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 110 µA/MHz IBAT; DC-DC enabled 110 nA sleep current with data retention; POR monitor enabled 400 nA sleep current with smaRTClock (internal LFO) 700 nA sleep current with smaRTClock (external XTAL) 2 µs wake-up from any sleep mode 12-Bit; 16 ch. Analog to Digital Converter - Up to 75 ksps 12-bit mode or 300 ksps 10-bit mode External pin or internal VREF (no external capacitor required) On-chip PGA allows measuring voltages up to twice the reference voltage Autonomous burst mode with 16-bit automatic averaging accumulator Integrated temperature sensor 2 system clocks Two Low Current Comparators - Memory - Up to 128 kB Flash; In-system programmable; Full read/write/erase Programmable hysteresis and response time Configurable as interrupt or reset source functionality over the entire supply range - Up to 8 kB data retention RAM Digital Peripherals - 53 port I/O; All 5 V tolerant with high sink Internal 6-Bit Current Reference - Up to ±500 µA; source and sink capability Enhanced resolution via PWM interpolation Integrated LCD Controller - - Supports up to 128 segments (32x4) - Integrated charge pump for contrast control Metering-Specific Peripherals - DC-DC buck converter allows dynamic voltage scaling for maximum efficiency (250 mW output) Sleep-mode pulse accumulator with programmable switch de-bounce and pull-up control interfaces directly to metering sensor Dedicated Packet Processing Engine (DPPE) includes hardware AES, DMA, CRC, and encoding blocks for acceleration of wireless protocols Manchester and 3 out of 6 encoder hardware for power efficient implementation of the wireless M-bus specification EZRadioPRO® - RF power consumption current and programmable drive strength Hardware SMBus™ (I2C™ compatible), 2 x SPI™, and UART serial ports available concurrently Four general-purpose 16-bit counter/timers Programmable 16-bit counter/timer array with six capture/compare modules and watchdog timer Clock Sources - Transceiver Precision internal oscillators: 24.5 MHz with ±2% accuracy supports UART operation; spread-spectrum mode for reduced EMI Low power internal oscillator: 20 MHz External oscillator: Crystal, RC, C, CMOS clock smaRTClock oscillator: 32.768 kHz crystal or 16.4 kHz internal LFO with three independent alarms On-Chip Debug Frequency range = 240–960 MHz - Sensitivity = –121 dBm On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) Provides 4 breakpoints, single stepping FSK, GFSK, and OOK modulation - Max output power = +20 dBm (Si1020/1/2/3), +13 dBm (Si1024/25/26/ 27) Packages Reset Debug / Programming Hardware VDC Timers 0/1/2/3 VREG Priority Crossbar Decoder PCA/ WDT 8192/4096 Byte XRAM VBAT VDD UART 256 Byte SRAM C2D VBAT Digital Peripherals 128/64/32/16 kByte ISP Flash Program Memory Wake –85 pin LGA (6 x 8 mm) Port I/O Configuration CIP-51 8051 Controller Core Power On Reset/PMU C2CK/RST - DMA SMBus Analog Power CRC Engine SPI 0 Digital Power AES Engine Port 0-1 Drivers 16 Port 2 Drivers 4 Port 3-6 Drivers 32 P0.0...P1.7 P2.4...P2.7 P3.0...P6.7 Port 7 Driver P7.0/C2D RF XCVR (240-960 MHz, +20/+13 dBm) Crossbar Control PA VCO LCD (4x32) TX Encoder VBATDC IND DC/DC Buck Converter Precision 24.5 MHz Oscillator GNDDC CAP LCD Charge Pump XTAL1 XTAL2 GND SYSCLK XTAL3 XTAL4 Low Power 20 MHz Oscillator External Oscillator Circuit Enhanced smaRTClock Oscillator SFR Bus EMIF AGC Wireless MCU LNA EZRadioPro SPI 1 Mixer PGA Analog Peripherals Internal External VREF VREF ADC Digital Modem A M U X 12-bit 75ksps ADC VDD VREF Temp Sensor Delta Sigma Modulator Digital Logic 3 SDN nIRQ GPIOx GND CP0, CP0A System Clock Configuration RXp RXn Pulse Counter CP1, CP1A + - 30 MHz + - XOUT XIN Comparators Copyright © 2014 by Silicon Laboratories 09.09.14 Si102x Ultra Low Power, 128/64/32/16 kB, LCD MCU with Integrated 240-960 MHz EZRadioPRO® Transceiver Selected Electrical Specifications Parameter Symbol Active mode current IBAT Active mode current IBAT Sleep mode current Sleep mode current Min Typ Max Units — 110 — µA/MHz F = 20 MHz LFO; DC-DC enabled executing code from FLASH; PCLKACT=0x00; VBAT=3.6V — 2.2 — mA IDD Sleep Mode, SmaRTClock running, internal LFO; 3.6 V — 0.4 — µA IDD Sleep Mode, SmaRTClock running, 32.768 kHz crystal; 3.6 V — 0.7 — µA Buck regulator efficiency 3.6 V input voltage — 80 — % LCD refresh current 1 Internal LFO, LCD charge pump disabled; 60 Hz; nonmultiplexed operation (static mode); 3.6 V — 0.4 — µA LCD refresh current 2 Internal LFO, LCD charge pump disabled; 60 Hz; multiplexed operation; 3.6 V — 0.8 — µA 1.8 3.6 3.8 V Supply input voltage Conditions VBAT = 3.6 V, F = 20 MHz VBAT Product Family Part Number Memory (Flash/ RAM) TX Output Power (dBm) I/O LCD Package (mm) Si1020-B-GM3 128 kB/8 kB 20 53 32x4 LGA85 (6x8) Si1021-B-GM3 64 kB/8 kB 20 53 32x4 LGA85 (6x8) Si1022-B-GM3 32 kB/8 kB 20 53 32x4 LGA85 (6x8) Si1023-B-GM3 16 kB/4 kB 20 53 32x4 LGA85 (6x8) Si1024-B-GM3 128 kB/8 kB 13 53 32x4 LGA85 (6x8) Si1025-B-GM3 64 kB/8 kB 13 53 32x4 LGA85 (6x8) Si1026-B-GM3 32 kB/8 kB 13 53 32x4 LGA85 (6x8) Si1027-B-GM3 16 kB/4 kB 13 53 32x4 LGA85 (6x8) Wireless MCU Copyright © 2014 by Silicon Laboratories Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. 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