Si1011-A Ultra-Low Power 8 kB, 12-bit ADC MCU with Integrated 240–960 MHz Transceiver Transceiver Features Supply Voltage: 1.8 to 3.6 V - Typical sleep mode current < 0.1 µA; retains state and RAM contents over full supply range; fast wakeup of < 2 µs - Two built-in brown-out detectors cover sleep and active modes 12-Bit Analog to Digital Converter - Up to 75 ksps - Up to 11 external inputs - External pin or internal VREF (no external capacitor required) - External conversion start input option - External conversion start input option - Autonomous Burst Mode with 16-bit automatic averaging accumulator - Built-in temperature sensor Dual Comparators - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (< 0.5 µA) - Frequency range = 240–960 MHz Sensitivity = –121 dBm FSK, GFSK, and OOK modulation Max output power = +20 dBm RF power consumption - 18.5 mA receive - 85 mA @ +20 dBm transmit - Data rate = 0.123 to 256 kbps Auto-frequency calibration (AFC) Antenna diversity and transmit/receive switch control Programmable packet handler TX and RX 64 byte FIFOs Frequency hopping capability On-chip crystal tuning Digital Peripherals - 15 port I/O - Hardware enhanced UART, SPI and I2C serial ports available concurrently Memory - 8 kB bytes Flash; in-system programmable in 512-byte - Low power 32-bit smaRTClock - Four general purpose 16-bit counter/timers; six channel sectors; full read/write/erase functionality over the entire supply range programmable counter array (PCA) - 768 bytes internal data RAM Clock Sources - Precision internal oscillators: 24.5 MHz with ±2% accuracy sup- On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- ports UART operation; spread-spectrum mode for reduced EMI system debug (no emulator required) High-Speed 8051 µC Core - Pipe-lined instruction architecture; executes 70% of instructions - Low power 20 MHz internal oscillator - External oscillator: crystal, RC, C, CMOS clock - smaRTClock oscillator: 32.768 kHz crystal or self-oscillate Ordering Part Number - Si1011-A-GM, 42-pin QFN, 5 x 7 mm2 in 1 or 2 system clocks - 25 MIPS peak throughput with 25 MHz clock Development Kit: Si1010DK Power On Reset/PMU Wake Reset C2CK/RST Debug / Programming Hardware CIP-51 8051 Controller Core 6-bit IREF 256 Byte SRAM 512 Byte XRAM Precision 24.5 MHz Oscillator Low Power 20 MHz Oscillator XTAL1 XTAL2 XTAL3 XTAL4 External VREF VREF TX A M U X CP0, CP0A CP1, CP1A SFR Bus VDD VREF Temp Sensor AGC RXp RXn LNA Mixer + - PGA ADC + - Comparators Digital Peripherals Transceiver Control Interface Digital Modem Delta Sigma Modulator Digital Logic UART External Oscillator Circuit Timers 0, 1, 2, 3 smaRTClock Oscillator PCA/ WDT System Clock Configuration Wireless MCU PA Internal GND SYSCLK GND IREF0 12-bit 75ksps ADC CRC Engine VREG RF XCVR (240-960 MHz) 8k Byte ISP Flash Program Memory C2D VDD Analog Peripherals XIN XOUT OSC Priority Crossbar Decoder SMBus SPI 0 Copyright © 2010 by Silicon Laboratories Port I/O Config 15 ANALOG & DIGITAL I/O 1.15.10 Smart. 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