Application Note Receiver TH71102 Low RF 27MHz to 67MHz Low-RF Single-Conversion Superhet Receiver 1 The transformation of a high-RF double-conversion to a low-RF single-conversion superhet receiver Receiver ICs with fully integrated VCOs are very welcome to the system designer because there is no need for external VCO components like varactor diodes or inductors. On the other hand, a fully integrated VCO typically has a limited LO frequency range that restricts the receiver’s operating frequency range. The frequency translation scheme of a standard double-conversion superhet (DCSH) receiver follows the rule that the highest frequency of operation (high-RF) is down-converted by the first mixer to a lower frequency of operation (low-RF) that constitutes the first IF. Then a second mixer handles the next step of downconversion to derive the second IF. It follows logically that the operating frequency range of a DCSH should be down-scalable if the first mixer could be bypassed to make the second mixer’s input to be the terminal of the desired signal frequency (now the low-RF). Then the DCSH is transformed to a single-conversion superhet (SCSH) receiver. The TH71102 block diagram, shown in Fig. 1, reveals that MIX1 ports IN_MIX1 and IF1 are fully accessible. This gives the chance to connect the LNA output directly to the input of MIX2. In this situation, MIX2 is the one and only mixer in the system, able to receive low-RF signals. Fig. 1 outlines how the transformation from DCSH to SCSH can be realized by using the TH71102. As it can be seen from the block diagram, port LO1 of MIX1 cannot be disconnected because it is internal to the IC. Furthermore the internal signal path from MIX1 to MIX2 is fixed. This implies to take care of two things: The input of MIX1 must be AC-grounded to prevent from picking up unwanted high-RF signals that could be down-converted and interfere with the desired low-RF The output of MIX2 must be matched to the desired low-RF signal to keep parasitic LO1 feed-through as low as possible. Both demands can be easily met: first by applying a capacitor to pin IN_MIX1 that is well connected to ground, while second comes along because the LC tank at pins IF1P and IF1N is trimmed to the desired lowRF anyway. The following table summarizes the relationships between the different frequencies in the SCSH receiver chain. Signal low-side injection high-side injection REF (reference osc. freq.) LO2 IF (RF – IF)/2 2 • REF RF – LO2 (RF + IF)/2 2 • REF LO2 – RF The specified LO1 frequency range of the TH71102 is 300 MHz to 450 MHz. This translates to an LO2 range of 37.5 MHz to 56.25 MHz which is the new LO frequency range of the receiver that has been derived by DCSH-to-SCSH transformation (LO2 of DCSH = LO of SCSH). The following table depicts the new operating frequency range (RF desired), the reference (REF), and the LO and image frequency (RF image) of the SCSH considering the example of an intermediate frequency of IF = 10.7 MHz. Signal type LO low-side injection LO high-side injection RF desired / MHz REF / MHz LO / MHz RF image / MHz 48.2 to 66.95 18.75 to 28.125 37.5 to 56.25 26.8 to 45.55 26.8 to 45.55 18.75 to 28.125 37.5 to 56.25 48.2 to 66.95 390117110201 Rev. 002 Page 1 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF According to CEPT/ERC recommendation 70-03, the following low-frequency services can be covered by the modified TH71102 application circuit. Service Frequency range Channel spacing non-specific SRDs 26.957 - 27.238 MHz 40.660 - 40.700 MHz no channels specified model control 26.995 - 27.195 MHz 34.995 - 35.225 MHz 40.665 - 40.695 MHz 26.957 - 27.283 MHz 10 kHz 29.7 - 47.0 MHz 50 kHz inductive applications narrow-band audio no channels specified Typical applications telemetry, telecommand, alarms, data in general and other similar applications controlling the movement of a model car immobilizers, animal identification, alarm systems, personal identification, proximity sensors, anti-theft systems, automatic article identification audio signal transmission 2 Measured data of the low-RF single-conversion superhet receiver A test board has been setup to validate the theoretical approach of the DCSH-to-SCSH transformation. The board’s circuit schematic corresponds to Fig. 2/3 with a receiving frequency of 40.68 MHz, the center frequency of one of the non-specific SRD bands. The most important parameters are summarized in the following table. Vcc = 3.0 V, Ta = 23 °C, RF = 40.68 MHz, IF = 10.7 MHz, BIF = 150 kHz, ∆fFSK = ±30 kHz, MASK = 100 %, data rate = 4 kbit/s NRZ, BER < 3⋅10-3 Parameter Condition Value Unit <100 nA stand-by current ENRX at 0 V current consumption at LNA high gain GAIN_LNA at 0 V 7.7 mA current consumption at LNA low gain GAIN_LNA open 6.3 mA FSK input sensitivity at LNA high gain GAIN_LNA at 0 V -108 dBm FSK input sensitivity at LNA low gain GAIN_LNA open -70 dBm FSK maximum input signal at LNA high gain GAIN_LNA at 0 V -10 dBm FSK maximum input signal at LNA low gain GAIN_LNA open 0 dBm ASK input sensitivity at LNA high gain GAIN_LNA at 0 V -110 dBm ASK input sensitivity at LNA low gain GAIN_LNA open -72 dBm ASK maximum input signal at LNA high gain GAIN_LNA at 0 V -24 dBm ASK maximum input signal at LNA low gain GAIN_LNA open -5 dBm image rejection GAIN_LNA at 0 V 36 dB rejection of undesired double-conversion RF at 451.72 MHz GAIN_LNA at 0 V 77 dB rejection of undesired double-conversion RF at 370.36 MHz GAIN_LNA at 0 V 65 dB spurious emission GAIN_LNA at 0 V < -104 dBm 390117110201 Rev. 002 Page 2 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF 3 Bock Diagram FSK output 18 OUT_OA 19 20 OAN OAP C14 17 22 OUT_IFA C11 VEE_RO 25 13 C9 VCC 12 FBC1 C10 IF2 OUT_MIX2 C1 RO CP LF C3 R1 PFD 29 IF1 6 IF1P DIV2 51.38MHz IF1N L5 C8 L4 25.69MHz LO2 MIX2 VCC_MIX 8 VCC 9 25.69 MHz 7 VCO1 4 IN_MIX1 DIV8 MIX1 5 VEE CMIX1 VEE_LNA LO1 loop filter C7 411.04MHz RF-filter 40.68 MHz XTAL 26 VEE_IF 10 VEE 11 RO IN_IFA CERFIL 10.7 MHz VCC ENRX VEE VCC_PLL 27 21 IFA RSSI RSSI ENRX 28 VCC C16 14 15 C12 BIAS CERRES 10.7 MHz VEE_BIAS MIX3 IN_DEM 16 C13 VEE VCC_BIAS CP VCC OA 24 23 OUTP OUTN C15 OUT_LNA VCC 30 VCC_LNA 32 IN_LNA 2 390117110201 Rev. 002 1 VEE Fig. 1 VEE_LNAC VEE_LNA LNA GAIN_LNA 31 L3 VEE 3 C6 C5 C4 C0 RF Input 40.68 MHz L2 TH71102 block diagram with external components for FSK reception Page 3 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF 4 FSK Application Circuit RSSI C14 FSK output C15 C16 C1 VCC VCC 17 18 OAN 19 20 OAP RSSI 21 OUT_OA XTAL 25 VEE 22 VEE OUTP 23 OUTN 24 VCC CP C13 IN_DEM 16 OUT_IFA 15 26 RO 27 VCC 28 ENRX FBC2 13 29 LF FBC1 12 30 VEE VCC 14 C12 CERRES VCC C11 ENTRX R1 C9 C3 C10 VEE GAIN_LNA OUT_LNA IN_MIX1 VEE IF1P 2 3 4 5 6 C5 1 C7 L3 C6 L4 CMIX1 VCC 32 CERFIL 9 OUT_MIX2 8 VCC C4 VCC VEE 10 IF1N C0 L2 7 31 IN_LNA 50 C8 LCFIL RF input IN_IFA 11 L5 CB* VCC * each Vcc pin with blocking cap of 330pF * one global Vcc blocking cap of 10nF Fig. 2 390117110201 Rev. 002 Circuit diagram for FSK reception Page 4 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF 4.1 Board Component Values for FSK (Fig. 2) Part Size Value @ 40.68 MHz Tolerance Description C0 0805 100 pF ±10% capacitor C1 0805 15 pF ±10% crystal series capacitor C3 0805 1 nF ±10% loop filter capacitor C4 0603 120 pF ±5% capacitor C5 0603 100 pF ±5% capacitor C6 0603 150 pf ±5% LNA output tank capacitor C7 0603 22 pF ±5% capacitor CMIX1 0805 2.2nF ±10% capacitor C8 0603 68 pF ±5% RF tank capacitor C9 0805 33 nF ±10% IFA feedback capacitor C10 0603 1 nF ±10% IFA feedback capacitor C11 0603 1 nF ±10% IFA feedback capacitor C12 0603 1.5 pF ±5% DEMOD phase-shift capacitor C13 0603 680 pF ±10% DEMOD coupling capacitor C14 0805 10 – 47 pF ±5% demodulator output low-pass capacitor, depending on data rate C15 0805 10 – 47 pF ±5% demodulator output low-pass capacitor, depending on data rate RSSI output low-pass capacitor C16 0603 1.5 nF ±10% CP 0805 10 – 12 pF ±5% CERRES parallel capacitor R1 0805 ±10% loop filter resistor L2 0603 10 kΩ 100 nH ±5% inductor L3 0603 100 nH ±5% LNA output tank inductor L4 0805 100 nH ±5% RF tank inductor L5 0805 100 nH ±5% RF tank inductor XTAL HC49 SMD CERFIL SMD type ±25ppm calibration ±30ppm temperature SFECV10M7JA00 (SFECV10.7MJS) @ BIF2 = 150 kHz, ±40kHz CERRES SMD type 390117110201 Rev. 002 CDSCB10M7GA130 (CDACV10.7MG18) fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 50 Ω ceramic filter from Murata, or equivalent part from different vendor ceramic resonator from Murata, or equivalent part from different vendor Page 5 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF 5 ASK Application Circuit RSSI ASK output R3 C13 C1 VCC 17 18 OAN 19 20 OAP RSSI 21 VEE 22 25 OUT_OA XTAL OUTP 23 OUTN 24 VEE VCC VCC C12 IN_DEM 16 OUT_IFA 15 26 RO 27 VCC 28 ENRX FBC2 13 29 LF FBC1 12 30 VEE VCC 14 VCC C11 ENTRX R1 C9 C3 C10 VEE GAIN_LNA OUT_LNA IN_MIX1 2 3 4 C5 1 C7 L3 C6 L4 CMIX1 VCC IF1N 9 CERFIL OUT_MIX2 8 7 IF1P 32 C4 VCC 6 VCC C8 LCFIL 50 VEE 10 VEE 31 IN_LNA C0 L2 5 RF input IN_IFA 11 L5 CB* VCC * each Vcc pin with blocking cap of 330pF * one global Vcc blocking cap of 10nF Fig. 3 390117110201 Rev. 002 Circuit diagram for ASK reception Page 6 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF 5.1 Board Component Values for ASK (Fig. 3) Part Size Value @ 40.68 MHz Tolerance C0 0805 100 pF ±10% capacitor C1 0805 15 pF ±10% crystal series capacitor C3 0805 1 nF ±10% loop filter capacitor C4 0603 120 pF ±5% capacitor C5 0603 100 pF ±5% capacitor C6 0603 150 pf ±5% LNA output tank capacitor C7 0603 22 pF ±5% capacitor CMIX1 0805 2.2nF ±10% capacitor C8 0805 68 pF ±5% IF1 tank capacitor C9 0805 33 nF ±10% IFA feedback capacitor C10 0603 1 nF ±10% IFA feedback capacitor C11 0603 1 nF ±10% IFA feedback capacitor C12 0805 1 nF to 100 nF ±10% ASK data slicer capacitor, depending on data rate C13 0603 1.5 nF ±10% RSSI output low-pass capacitor R1 0805 10 kΩ ±10% loop filter resistor R3 0603 ±5% ASK data slicer resistor, depending on data rate L2 0603 100 kΩ 100 nH ±5% inductor L3 100 nH ±5% LNA output tank inductor L4 0603 0805 100 nH ±5% RF tank inductor L5 0805 100 nH ±5% RF tank inductor XTAL HC49 SMD CERFIL SMD type ±25ppm calibration ±30ppm temperature SFECV10M7JA00 (SFECV10.7MJS) @ BIF2 = 150 kHz, ±40kHz 390117110201 Rev. 002 Description fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 50 Ω ceramic filter from Murata, or equivalent part from different vendor Page 7 of 8 AN71102-Low RF Jan./04 Application Note Receiver TH71102 Low RF Your Notes For the latest version of this document. Go to our website at www.melexis.com Or for additional information contact Melexis Direct: Europe and Japan: All other locations: Phone: +32 1367 0495 E-mail: [email protected] Phone: +1 603 223 2362 E-mail: [email protected] QS9000, VDA6.1 and ISO14001 Certified 390117110201 Rev. 002 Page 8 of 8 AN71102-Low RF Jan./04