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Datasheet
Sound Processor with Built-in 3-band Equalizer
BD37531FV
Key Specifications
General Description
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BD37531FV is a sound processor with built-in 3-band
equalizer for car audio. A stereo input selector is
available that functions to switch single end input and
ground isolation input, input-gain control, main volume,
loudness and 5ch fader volume. Moreover, “Advanced
switch circuit”, which is an original ROHM technology,
can reduce various switching noise (ex. No-signal, low
frequency like 20Hz & large signal inputs). Also,
“Advanced switch” makes microcomputer control
easier and constructs a high quality car audio system.
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Features
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Reduced switching noise of input gain control,
mute, main volume, fader volume, bass, middle,
treble, loudness by using advanced switch circuit
Built-in differential input selector that can make
various combination of single-ended / differential
input.
Built-in ground isolation amplifier inputs, which is
ideal for external stereo input.
Built-in input gain controller reduces volume
switching noise of a portable audio input.
Decreased number of external components due to
built-in 3-band equalizer filter and loudness filter. It
is possible to freely control the Q, Gv, fo of the
3-band equalizer,
and Gv of the loudness
through the I2C BUS control
A gain adjustment quantity of ±20dB with a 1 dB
step gain adjustment is possible for the bass,
middle and treble.
Equipped with terminals for the subwoofer outputs.
Also, the audio signal outputs of the front, rear and
subwoofer can be chosen using the I2C BUS
control.
Energy-saving design resulting in low current
consumption is achieved utilizing the BiCMOS
process. It has the advantage in quality over
scaling down the power heat control of the internal
regulators.
Input pins and output pins are organized and
separately laid out to keep the signal flow in one
direction which consequently, simplify pattern
layout of the set board and decrease the board
dimensions.
It is possible to control I2C BUS with 3.3V / 5V.
○Product structure：Silicon monolithic integrated circuit
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001


Power Supply Voltage Range:
Circuit Current (No signal) :
Total Harmonic Distortion 1:
(FRONT,REAR)
Total Harmonic Distortion 2:
(SUBWOOFER)
Maximum Input voltage:
Cross-talk Between Selectors:
Volume Control Range:
Output Noise Voltage 1:
(FRONT,REAR)
Output Noise Voltage 2:
(SUBWOOFER)
Residual Output Noise Voltage:
Operating Temperature Range:
Package
7.0V to 9.5V
38mA(Typ)
0.001%(Typ)
0.002%(Typ)
2.3Vrms (Typ)
-100dB (Typ)
+15dB to -79dB
3.8µVrms(Typ)
4.8µVrms(Typ)
1.8µVrms(Typ)
-40°C to +85°C
W(Typ) x D(Typ) x H(Max)
SSOP-B28
10.0mm x 7.60mm x 1.35mm
Applications
It is optimal for car audio systems. It can also be used
for audio equipment of mini Compo, micro Compo, TV,
etc.
○This product has no designed protection against radioactive rays
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Typical Application Circuit
BD37531FV
Pin Configuration
TOP VIEW
A1
1
28
FIL
A2
2
27
GND
B1
3
26
SDA
B2
4
25
SCL
C1
5
24
VCC
C2
6
23
OUTF1
DP1
7
22
OUTF2
DN
8
21
OUTR1
DP2
9
20
OUTR2
EP1 10
19
OUTS1
EN1
11
18
OUTS2
EN2
12
17
TEST3
EP2
13
16
TEST2
TEST1 14
15
MUTE
Pin Descriptions
Pin No.
Pin Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A1
A2
B1
B2
C1
C2
DP1
DN
DP2
EP1
EN1
EN2
EP2
TEST1
Description
Pin No.
A input terminal of 1ch
A input terminal of 2ch
B input terminal of 1ch
B input terminal of 2ch
C input terminal of 1ch
C input terminal of 2ch
D positive input terminal of 1ch
D negative input terminal
D positive input terminal of 2ch
E positive input terminal of 1ch
E negative input terminal of 1ch
E negative input terminal of 2ch
E positive input terminal of 2ch
Test Pin
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
15
16
17
18
19
20
21
22
23
24
25
26
27
28
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Pin
Name
MUTE
TEST2
TEST3
OUTS2
OUTS1
OUTR2
OUTR1
OUTF2
OUTF1
VCC
SCL
SDA
GND
FIL
Description
External compulsory mute terminal
Test Pin
Test Pin
Subwoofer output terminal of 2ch
Subwoofer output terminal of 1ch
Rear output terminal of 2ch
Rear output terminal of 1ch
Front output terminal of 2ch
Front output terminal of 1ch
Power supply terminal
I2C Communication clock terminal
I2C Communication data terminal
GND terminal
VCC/2 terminal
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Block Diagram
26
25
24
23
22
21
Fader★
27
Fader★
28
20
19
18
17
16
15
VCC
VCC/2
GND
I2C BUS LOGIC
Fader★
Fader★
Fader★
Fader
■Fader
Gain:0dB to -79dB/1dB step
Gain:0dB～-79ｄB/1dB
step
★no pop noise
Loudness
■Loudness
Gain:+20dB to 0dB/1dB step
Gain:20dB～0ｄB/1ｄB
step
★no pop noise
・ｆ0=250/400/800Hz
・Hicut1/2/3/4
■3 Band P-EQ (Tone control)
Gain: +20dB to -20dB/1dB Stepstep
Gain：+20dB～-20dB/1dB
★no pop noise
・Bass：f0=60/80/100/120Hz
Q=0.5/1.0/1.5/2.0
・Meddle:f0=500/1k/1.5k/2.5kHz
Q=0.75/1/1.25/1.5
・Treble：f0=7.5k/10k/12.5k/15kHz
Q=0.75/1.25
■Volume
Gain: +15dB to -79dB/1dB stepstep
Gain：+15dB～-79dB/1dB
★no pop noise
■Input Gain
Gain: +20dB to 0dB/1dB step
Gain：+20dB～0dB/1dB
step
★no pop noise
★Loudness
★3 Band P-EQ
(Tone control)
★Volume/Mute
★Input Gain
Input selector (3 single-end and 2 stereo ISO)
GND
ISO amp
100k
1
100k
2
100k
3
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
100k
4
100k
5
100k
6
GND
ISO amp
250k
7
250k
8
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GND
ISO amp
250k
9
250k
10
GND
ISO amp
250k
11
250k
12
250k
13
14
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Absolute Maximum Ratings (Ta=25°C)
Symbol
Rating
Unit
Power Supply Voltage
Parameter
VCC
10.0
V
Input Voltage
VIN
VCC+0.3 to GND-0.3
V
Power Dissipation
Pd
Storage Temperature
1.06
Tstg
(Note 1)
W
-55 to +150
°C
(Note 1) When mounted on ROHM standard board (70 x 70 x 1.6(mm3), derate by 8.5mW/°C for Ta above 25°C.
Thermal resistance θja = 117.6(°C/W)
Material : A FR4 grass epoxy board(3% or less of copper foil area)
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions
Parameter
Symbol
Limit
Unit
Power Supply Voltage
VCC
7.0 to 9.5
V
Temperature
Topr
-40 to +85
°C
Electrical Characteristics
GENERAL
BLOCK
(Unless otherwise noted, Ta=25°C, VCC=8.5V, f=1kHz, VIN=1Vrms, Rg=600Ω, RL=10kΩ, A1 input, Input gain 0dB,
Mute OFF, Volume 0dB, Tone control 0dB, Loudness 0dB, Fader 0dB)
Limit
Parameter
Unit
Min
Typ
Max
IQ
GV
CB
－
-1.5
-1.5
38
0
0
48
+1.5
+1.5
mA
dB
dB
THD+N1
－
0.001
0.05
％
THD+N2
－
0.002
0.05
％
VNO1
－
3.8
15
μVrms
VNO2
－
4.8
15
μVrms
Residual Output Noise Voltage *
VNOR
－
1.8
10
μVrms
Crosstalk Between Channels *
CTC
－
-100
-90
dB
RR
－
-70
-40
dB
RIN_S
RIN_D
70
175
100
250
130
325
kΩ
kΩ
Maximum Input Voltage
VIM
2.1
2.3
－
Vrms
Crosstalk Between Selectors *
CTS
－
-100
-90
dB
CMRR
50
65
－
dB
Circuit Current
Voltage Gain
Channel Balance
Total Harmonic Distortion 1
(FRONT,REAR)
Total Harmonic Distortion 2
(SUBWOOFER)
Output Noise Voltage 1
(FRONT,REAR) *
Output Noise Voltage 2
(SUBWOOFER) *
Ripple Rejection
Input Impedance(A, B, C)
Input Impedance (D, E)
INPUT SELECTOR
Symbol
Common Mode Rejection Ratio *
(D, E)
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TSZ22111・15・001
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Conditions
No signal
GV=20log(VOUT/VIN)
CB = GV1-GV2
VOUT=1Vrms
BW=400Hz-30KHz
VOUT=1Vrms
BW=400HZ-30KHZ
Rg = 0Ω
BW = IHF-A
Rg = 0Ω
BW = IHF-A
Fader = -∞dB
Rg = 0Ω
BW = IHF-A
Rg = 0Ω
CTC=20log(VOUT/VIN)
BW = IHF-A
f=1kHz
VRR=100mVrms
RR=20log(VCC IN/VOUT)
VIM at THD+N(VOUT)=1％
BW=400Hz-30KHz
Rg = 0Ω
CTS=20log(VOUT/VIN)
BW = IHF-A
XP1 and XN input
XP2 and XN input
CMRR=20log(VIN/VOUT)
BW = IHF-A,[*X・・・D,E]
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
LOUDNESS
FADER /
SUBWOOFER
TREBLE
MIDDLE
BASS
VOLUME
MUTE
INPUT GAIN
BLOCK
Electrical Characteristics – continued
Limit
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Input gain 0dB
VIN=100mVrms
GIN=20log(VOUT/VIN)
Minimum Input Gain
GIN_MIN
-2
0
+2
dB
Maximum Input Gain
GIN_MAX
+18
+20
+22
dB
Gain Set Error
GIN_ERR
-2
0
+2
dB
Mute Attenuation＊
GMUTE
－
-105
-85
dB
Maximum Gain
GV_MAX
13
15
17
dB
Maximum Attenuation *
GV_MIN
－
-100
-85
dB
Attenuation Set Error 1
Attenuation Set Error 2
Attenuation Set Error 3
GV_ERR1
GV_ERR2
GV_ERR3
-2
-3
-4
0
0
0
+2
+3
+4
dB
dB
dB
Maximum Boost Gain
GB_BST
18
20
22
dB
Maximum Cut Gain
GB_CUT
-22
-20
-18
dB
Gain Set Error
GB_ERR
-2
0
+2
dB
Maximum Boost Gain
GM_BST
18
20
22
dB
Maximum Cut Gain
GM_CUT
-22
-20
-18
dB
Gain Set Error
GM_ERR
-2
0
+2
dB
Maximum Boost Gain
GT_BST
18
20
22
dB
Maximum Cut Gain
GT_CUT
-22
-20
-18
dB
Gain Set Error
GT_ERR
-2
0
+2
dB
Maximum Attenuation＊
GF_MIN
－
-100
-90
dB
Attenuation Set Error 1
Attenuation Set Error 2
Attenuation Set Error 3
Output Impedance
Maximum Output
Voltage
GF_ERR1
GF_ERR2
GF_ERR3
ROUT
-2
-3
-4
－
0
0
0
－
+2
+3
+4
50
dB
dB
dB
Ω
VOM
2
2.2
－
Vrms
Maximum Gain
GL_MAX
17
20
23
dB
Gain Set Error
GL_ERR
-2
0
+2
dB
Input gain +20dB
VIN=100mVrms
GIN=20log(VOUT/VIN)
GAIN=+20dB to +1dB
Mute ON
GMUTE=20log(VOUT/VIN)
BW = IHF-A
Volume = 15dB
VIN=100mVrms
Gv=20log(VOUT/VIN)
Volume = -∞dB
Gv=20log(VOUT/VIN)
BW = IHF-A
GAIN & ATT=+15dB to -15dB
ATT=-16dB to -47dB
ATT=-48dB to -79dB
Gain=+20dB f=100Hz
VIN=100mVrms
GB=20log (VOUT/VIN)
Gain=-20dB f=100Hz
VIN=2Vrms
GB=20log (VOUT/VIN)
Gain=+20dB to -20dB
f=100Hz
Gain=+20dB f=1kHz
VIN=100mVrms
GM=20log (VOUT/VIN)
Gain=-20dB f=1kHz
VIN=2Vrms
GM=20log (VOUT/VIN)
Gain=+20dB to -20dB f=1kHz
Gain=+20dB f=10kHz
VIN=100mVrms
GT=20log (VOUT/VIN)
Gain=-20dB f=10kHz
VIN=2Vrms
GT=20log (VOUT/VIN)
Gain=+20dB to -20dB
f=10kHz
Fader = -∞dB
GF=20log(VOUT/VIN)
BW = IHF-A
ATT=-1dB to -15dB
ATT=-16dB to -47dB
ATT=-48dB to -79dB
VIN=100mVrms
THD+N=1％
BW=400Hz-30KHz
Gain 20dB
VIN=100mVrms
GL=20log(VOUT/VIN)
GAIN=+20dB to +1dB
VP-9690A(Average value detection, effective value display) filter by Matsushita Communication is used for * measurement.
Phase between input / output is same.
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
1
30
20
1kHz
100Hz
10
0
0
2
4
6
8
0.1
0.1
0.01
0.01
0.001
0.001
10
VCC[V]
4
3
Gain=0dB
Gain[dB]
[dB]
Gain
Gain
(dB)
Gain [dB]
2
-2
-3
-4
100
1k
10k
100k
25
20
15
10
5
1
10
BASS GAIN : -20dB to +20dB
/1dB step
fo : 60Hz Q : 0.5
0
-5
-10
-15
-20
-25
10
Frequency [Hz]
100
1k
10k
100k
Frequency [Hz]
Frequency (Hz)
Figure 4. Bass Gain vs Frequency
Figure 3. Gain vs Frequency
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
0.1
Figure 2. THD+N vs Output Voltage
5
10
0.01
Vout (V)
Figure 1. Circuit Current (No signal) vs Power
Supply Voltage
-5
0.001
Output Voltage : VOUT [Vrms]
Power Supply Voltage : VCC [V]
1
0
-1
1
10kHz
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
Vout
40
10
VIN [Vrms]
10
THD+N [%]
50
THD+N (%)
Iq[mA]
Circuit Current (No signal): IQ [mA]
Typical Performance Curves
BD37531FV
Q : 0.75/1/1.25/1.5
fo : 60/80/100/120Hz
BASS GAIN : ±20dB
Q : 0.5
Gain [dB]
25
20
15
25
10
20
5
15
0
10
-55
-100
-15
-5
-20
-10
-25
-15
-2010
-25
10
MIDDLE GAIN :
±20dB
fo : 500Hz
100
1k
Frequency [Hz]
100
1k
10k
100k
10k
100k
Q : 0.5/1/1.5/2
BASS GAIN : ±20dB
fo : 60Hz
0
-5
-10
-15
-20
-25
10
100
1k
10k
Frequency [Hz]
Figure 5. Bass fo vs Frequency
Figure 6. Bass Q vs Frequency
25
20
15
10
5
0
-5
-10
-15
-20
-25
MIDDLE GAIN :
-20dB to +20dB /1dB
step
fo : 500Hz
Q : 0.75
10
25
20
15
10
5
Frequency [Hz]
Gain [dB]
Gain [dB]
Gain[dB]
Gain [dB]
Typical Performance Curves – continued
100
1k
fo : 500Hz
Q : 0.75
10k
fo : 500/1k/1.5k/2.5kHz
0
-5
-10
-15
-20
-25
10
100k
Frequency [Hz]
100
1k
10k
100k
Frequency [Hz]
Figure 7. Middle Gain vs Frequency
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
25
20
15
10
5
100k
Figure 8. Middle fo vs Frequency
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Typical Performance Curves – continued
25
Q : 0.75/1/1.25/1.5
TREBLE GAIN:-20 dB to +20dB
/1dB step
fo : 7.5kHz Q : 0.75
20
15
10
Gain
(dB)
Gain
[dB]
Gain [dB]
25
20
15
10
5
0
-5
-10
-15
-20
-25
MIDDLE GAIN :
±20dB
fo : 500Hz
10
100
1k
10k
5
0
-5
-10
-15
-20
-25
10
100k
1k
10k
100k
Frequency [Hz]
Frequency [Hz]
Frequency (Hz)
Figure 9. Middle Q vs Frequency
Figure 10. Treble Gain vs Frequency
25
25
Q : 0.75/1.25
TREBLE GAIN : ±20dB
fo : 7.5kHz
20
15
fo : 7.5k/10k/12.5k/15kHz
TREBLE GAIN : ±20dB
Q : 0.75
20
15
10
10
5
Gain
(dB)
Gain
[dB]
Gain [dB]
100
0
-5
-10
5
0
-5
-10
-15
-15
-20
-20
-25
-25
10
100
1k
10k
10
100k
Frequency (Hz)
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
Figure 12. Treble Q vs Frequency
Figure 11. Treble fo vs Frequency
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TSZ22111・15・001
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Typical Performance Curves – continued
1000
Din-Audio
IHF-A
Output Noise [µVrms]
出力雑音電圧
[uVrms]
Output Noise [µVrms]
出力雑音電圧[uVrms]
1000
100
10
1
-80 -70 -60 -50 -40 -30 -20 -10 0
Volume
[dB]
Volume Gain
Gain[dB]
DIN-Audio
IHF-A
100
10
1
10 20
-20 -15 -10 -5
0
5
10 15 20
Bass Gain
Bass
Gain[dB]
[dB]
Figure 13. Output Noise vs Volume Gain
Figure 14. Output Noise vs Bass Gain
1000
1000
IHF-A
Output Noise [µVrms]
出力雑音電圧
[uVrms]
出力雑音電圧
[uVrms]
Output Noise [µVrms]
DIN-Audio
100
10
1
DIN-Audio
IHF-A
100
10
1
-20 -15 -10 -5 0 5 10 15 20
MiddleGain
Gain [dB]
Middle
[dB]
-20 -15 -10 -5 0 5 10 15 20
Treble Gain
Gain [dB]
Treble
[dB]
Figure 15. Output Noise vs Middle Gain
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TSZ22111・15・001
Figure 16. Output Noise vs Treble Gain
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Typical Performance Curves – continued
2.5
0
Output
Voltage : VOUT [Vrms]
最大出力[Vrms]
Gain [dB]
Gain (dB)
-10
-20
-30
-40
-50
-60
2.0
1.5
1.0
0.5
0.0
-70
10
100
1k
10k
100k
100
10000
1000
RLOAD [ohm]
出力負荷[ohm]
100000
Frequency [Hz]
Frequency
(Hz)
Figure 18. Output Voltage vs RLOAD
Figure 17. CMRR vs Frequency
Figure 19. Advanced Switch 1
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TSZ22111・15・001
Figure 20. Advanced Switch 2
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TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Timing Chart
CONTROL SIGNAL SPECIFICATION
(1) Electrical Specifications and Timing for Bus Lines and I/O Stages
SDA
tBUF
tLOW
tHD;STAT
tF
tR
tSP
SCL
tHD;STA
P
tHD;DAT
tSU;DAT
tHIGH
tSU;STAT
tSU;STOT
Sr
S
P
Figure 21. Definition of Timing on the
I2C-bus
Table 1 Characteristics of the SDA and SCL bus lines for I2C-bus devices
(Unless specified particularly, Ta=25°C, VCC=8.5V)
Parameter
1
2
3
4
5
6
7
8
9
Symbol
SCL clock frequency
Bus free time between a STOP and START condition
Hold time (repeated) START condition. After this period, the first clock
pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time:
Data set-up time
Set-up time for STOP condition
fSCL
tBUF
Fast-mode I2C-bus
Min
Max
400
0
1.3
－
Unit
kHz
μS
tHD;STA
0.6
－
μS
tLOW
tHIGH
1.3
0.6
0.6
0.06 (Note)
120
0.6
－
－
－
－
－
－
μS
μS
μS
μS
ns
μS
tSU;STA
tHD;DAT
tSU;DAT
tSU;STO
All values referred to VIH Min and VIL Max Levels (see Table 2).
(Note) The device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH Min of the SCL signal) in order to bridge the
undefined region of the falling edge of SCL.
About 7(tHD;DAT), 8(tSU;DAT), make the setup in which the margin is fully in .
Table 2 Characteristics of the SDA and SCL I/O stages for I2C-bus devices
Parameter
10
11
12
13
14
Symbol
LOW level input voltage:
VIL
HIGH level input voltage:
VIH
Pulse width of spikes which must be suppressed by the input filter.
tSP
LOW level output voltage: at 3mA sink current
VOL1
Input current each I/O pin with an input voltage between 0.4V and 4.5V.
II
t
SU;DAT
tHD;STA
tHD;DAT
ｔHD;STA
ｔHD;DAT
ｔSU;DAT
:1µs
：2us
：1us
：1us
:2µs
:1µs
Fast-mode devices
Min
Max
-0.3
+1
2.3
5
0
50
0
0.4
-10
+10
Unit
V
V
ns
V
μA
tｔSU;STO
SU;STO
：2us
:2µs
SCL
SCL
tｔBUF
BUF
：4us
:4µs
tｔHIGH
HIGH
：1us
:1µs
ｔLOW
tLOW
：3us
:3µs
SDA
SDA
SCL
: 250kHz
SCLclock
clockfrequency
frequency：250kHz
Figure 22. A Command Timing Example in the I2C Data Transmission
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TSZ22111・15・001
11/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
(2) I2C BUS FORMAT
S
1bit
MSB
LSB
Slave Address
8bit
S
Slave Address
A
Select Address
Data
P
MSB
LSB
MSB
LSB
A
Select Address
A
Data
A
P
1bit
8bit
1bit
8bit
1bit 1bit
= Start conditions (Recognition of start bit)
= Recognition of slave address. 7 bits in upper order are voluntary.
The least significant bit is “L” due to writing.
= ACKNOWLEDGE bit (Recognition of acknowledgement)
= Select every of volume, bass and treble.
= Data on every volume and tone.
= Stop condition (Recognition of stop bit)
(3) I2C BUS Interface Protocol
(a) Basic Form
S
Slave Address
A
Select Address
A
Data
A
MSB
LSB
MSB
LSB
MSB
LSB
P
(b) Automatic Increment (Select Address increases (+1) according to the number of data.
S
Slave Address
A
Select Address
A
Data1
A
Data2
A ････
MSB
LSB
MSB
LSB
MSB LSB
MSB
LSB
(Example) ①Data1 shall be set as data of address specified by Select Address.
②Data2 shall be set as data of address specified by Select Address +1.
③DataN shall be set as data of address specified by Select Address +N-1.
DataN
MSB
(c) Configuration Unavailable for Transmission (In this case, only Select Address1 is set.
S Slave Address A
Select Address1 A Data
A Select Address 2 A Data
A
MSB
LSB
MSB
LSB MSB LSB MSB
LSB MSB LSB
(Note) If any data is transmitted as Select Address 2 next to data, it is recognized
as data, not as Select Address 2.
A
P
LSB
P
(4) Slave Address
MSB
A6
1
A5
0
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TSZ22111・15・001
A4
0
A3
0
A2
0
12/30
A1
0
A0
0
LSB
R/W
0
80H
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
(5) Select Address & Data
Select
Address
(hex)
Items
MSB
Data
D7
Advanced
switch
ON/OFF
D6
0
Initial setup 1
01
Initial setup 2
02
0
0
Initial setup 3
03
0
Input Selector
05
Input gain
06
0
Full-diff
Type
Mute
ON/OFF
Volume gain
Fader 1ch Front
Fader 2ch Front
Fader 1ch Rear
Fader 2ch Rear
Fader Subwoofer
Test Mode
Bass setup
Middle setup
Treble setup
20
28
29
2A
2B
2C
30
41
44
47
Bass gain
51
Middle gain
54
Treble gain
57
Loudness Gain
System Reset
75
FE
1
0
0
0
Bass
Boost/
Cut
Middle
Boost/
Cut
Treble
Boost/
Cut
0
1
LSB
D5
D4
D3
Advanced switch time
of Input Gain/Volume
0
Tone/Fader/Loudness
Subwoofer Output
0
Select
0
Loudness fo
D2
D1
Advanced switch time
of Mute
1
0
0
0
0
0
1
0
0
Input selector
0
0
Input Gain
1
0
0
0
Volume Gain / Attenuation
Fader Attenuation
Fader Attenuation
Fader Attenuation
Fader Attenuation
Fader Attenuation
1
1
1
Bass fo
0
Middle fo
0
Treble fo
0
0
0
Bass Gain
0
0
Middle Gain
0
0
Treble Gain
Loudness Hicut
0
0
0
0
D0
1
0
0
0
1
1
Bass Q
Middle Q
0
Treble Q
Loudness Gain
0
0
1
Advanced switch
Note
1.
The Advanced Switch works in the latch part while changing from one function to another.
2.
Upon continuous data transfer, the Select Address rolls over because of the automatic increment function, as
shown below.
→01→02→03→05→06→20→28→29→2A→2B→2C
→30→41→44→47→51→54→57→75
3.
Advanced switch is not used for functions of input selector and subwoofer output select etc. Therefore, please turn
on MUTE when changing the settings of this side of a set.
4.
When using Mute function of this IC at the time of changing input selector, please switch mute ON/OFF while
waiting for advanced-mute time.
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TSZ22111・15・001
13/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Select address 01 (hex)
Time
MSB
D7
0.6msec
1.0msec
1.4msec
3.2msec
Advanced
Switch
ON/OFF
Advanced switch time of Input
LSB
gain/Volume/Tone/Fader/Loudness
D6
D5
D4
D3
D2
D1
D0
0
0
0
1
Advanced switch
0
0
1
Time of Mute
1
0
1
1
MSB
Time
D7
4.7 msec
7.1 msec
11.2 msec
14.4 msec
Advanced
Switch
ON/OFF
Mode
MSB
D7
OFF
0
ON
1
LSB
D0
0
1
0
1
Advanced switch time of Mute
D6
D5
D4
D3
D2
D1
0
Advanced switch time
0
0
of Input gain/Volume
0
1
1
Tone/Fader/Loudness
1
D6
0
Advanced switch ON/OFF
D5
D4
D3
D2
Advanced switch time
of Input gain/Volume
Tone/Fader/Loudness
0
LSB
D0
D1
Advanced switch
Time of Mute
1
Select address 02(hex)
Mode
MSB
D7
D6
Sub
Front
Rear
Prohibition
0
0
Subwoofer Output Select
D5
D4
D3
D2
0
0
0
1
0
0
1
0
1
1
D1
LSB
D0
0
0
Select address 03(hex)
f0
MSB
D7
D6
D5
250Hz
400Hz
800Hz
Prohibition
0
0
0
Loudness fo
D4
D3
0
0
0
1
1
0
1
1
D2
D1
LSB
D0
0
0
1
: Initial Condition
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TSZ22111・15・001
14/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Select address 05(hex)
MSB
Input Selector
OUTF1
OUTF2
D7
D6
D5
D4
D3
D2
D1
A
A1
A2
0
0
0
0
B
B1
B2
0
0
0
0
C
C1
C2
0
0
0
1
D single
DP1
DP2
0
0
0
1
E1 single
EP1
EN1
0
1
0
1
Full-diff
E2 single
EN2
EP2
0
1
0
1
bias
0
0
type
A diff
A1
B1
0
1
1
1
select
C diff
B2
C2
1
0
0
0
D diff
DP1
DP2
0
0
1
1
E full diff
EP1
EP2
0
1
0
0
Input SHORT
0
1
0
0
Prohibition
Other setting
Input SHORT : The input impedance of each input terminal is lowered from 100kΩ(Typ) to 6 kΩ(Typ).
(For quick charge of coupling capacitor)
Mode
Mode
Negative Input
Bias
MSB
D7
0
1
D6
D5
0
0
Full-diff Bias Type Select
D4
D3
D2
D1
LSB
D0
0
1
0
1
0
1
1
0
0
0
1
LSB
D0
Input Selector
: Initial condition
EP1
Negative input type
1ch signal input
10
EN1
For Ground –isolation type
1ch
Differential
11
EN2
12
EP2
2ch signal input
2ch
Differential
13
EP1
Bias type
10
For differential amplifier type
EN1
1ch signal input
1ch
Differential
11
EN2
12
EP2
2ch signal input
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TSZ22111・15・001
15/30
2ch
Differential
13
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Select address 06 (hex)
Gain
0dB
1dB
2dB
3dB
4dB
5dB
6dB
7dB
8dB
9dB
10dB
11dB
12dB
13dB
14dB
15dB
16dB
17dB
18dB
19dB
20dB
Input Gain
D4
D3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
1
MSB
D7
D6
D5
Mute
ON/OFF
0
0
：
1
Prohibition
Mode
OFF
ON
MSB
D7
0
1
：
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
LSB
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
：
1
：
1
：
1
D2
D1
Mute ON/OFF
D6
D5
0
0
D4
D3
LSB
D0
Input Gain
: Initial condition
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TSZ22111・15・001
16/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Select address 20, 28, 29, 2A, 2B, 2C (hex)
MSB
Vol,
Gain & ATT
D7
D6
0
0
0
0
Prohibition
：
：
0
1
15dB
0
1
14dB
0
1
13dB
0
1
：
：
：
-77dB
-78dB
-79dB
1
1
1
1
1
1
1
1
Fader
D5
0
0
Gain / Attenuation
D4
D3
D2
D1
0
0
0
0
0
0
0
0
：
1
1
1
1
：
1
1
1
1
：
0
0
0
0
：
0
0
0
0
：
0
0
1
1
：
0
1
0
1
：
0
0
0
0
：
0
0
0
1
：
1
1
1
0
：
1
1
1
0
：
0
1
1
0
：
1
0
1
0
：
1
1
：
1
1
：
1
1
：
1
1
：
0
1
D2
D1
0
0
1
1
LSB
D0
0
1
0
1
D1
LSB
D0
：
：
：
1
1
1
-∞dB
1
1
1
(Only 0dB to -∞dB are available at address 28, 29, 2A, 2B, 2C)
Prohibition
LSB
D0
0
1
Select address 41(hex)
Q factor
MSB
D7
D6
D5
Bass
Q factor
D4
D3
0.5
1.0
1.5
2.0
0
0
fo
MSB
D7
D6
60Hz
80Hz
100Hz
120Hz
0
0
Q factor
MSB
D7
D6
Middle
D5
D4
0.75
1.0
1.25
1.5
0
0
Middle fo
Bass fo
Bass
D4
0
1
0
1
D5
0
0
1
1
0
0
fo
D3
D2
0
0
Bass
Q factor
Select address 44(hex)
fo
500Hz
1kHz
1.5kHz
2.5kHz
MSB
D7
0
D6
0
D5
0
0
1
1
Q factor
D3
D2
0
Middle
D4
0
1
0
1
0
fo
D3
D2
0
0
D1
0
0
1
1
LSB
D0
0
1
0
1
D1
LSB
D0
Middle
Q factor
Select address 47 (hex)
Q factor
0.75
1.25
fo
7.5kHz
10kHz
12.5kHz
15kHz
MSB
D7
0
MSB
D7
0
D6
Treble
D5
D4
0
Treble fo
D6
0
D5
0
0
1
1
Q factor
D3
D2
Treble
D4
0
1
0
1
0
fo
D3
0
D1
0
0
D2
D1
0
0
LSB
D0
0
1
LSB
D0
Treble
Q factor
: Initial condition
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TSZ22111・15・001
17/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Select address 51, 54, 57 (hex)
MSB
Gain
D7
0dB
1dB
2dB
3dB
4dB
5dB
6dB
7dB
8dB
9dB
10dB
Bass/
11dB
Middle/
12dB
Treble
13dB
Boost
14dB
/cut
15dB
16dB
17dB
18dB
19dB
20dB
D6
0
Bass/Middle/Treble Gain
D5
D4
D3
D2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
0
1
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
0
1
：
1
1
Prohibition
Mode
Boost
Cut
MSB
D7
0
1
：
1
1
：
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
：
1
1
Bass/Middle/Treble Boost/Cut
D6
D5
D4
D3
D2
D1
0
0
LSB
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
：
0
1
LSB
D0
Bass/Middle/Treble Gain
: Initial condition
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TSZ22111・15・001
18/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Select address 75 (hex)
Mode
MSB
D7
Hicut1
Hicut2
Hicut3
Hicut4
0
Gain
MSB
D7
0dB
1dB
2dB
3dB
4dB
5dB
6dB
7dB
8dB
9dB
10dB
11dB
12dB
13dB
14dB
15dB
16dB
17dB
18dB
19dB
20dB
0
D1
LSB
D0
Loudness Gain
D4
D3
D2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
0
1
0
Loudness Hicut
0
1
1
0
1
1
0
1
1
0
1
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
0
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
LSB
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
：
1
：
1
：
1
D6
0
0
1
1
D5
0
1
0
1
D6
Loudness Hicut
D4
D3
D2
Loudness Gain
D5
Prohibition
：
1
：
1
: Initial condition
(6) About Power ON Reset
Built-in IC initialization is made during power ON of the supply voltage. Please send initial data to all
addresses at supply voltage on. Also, please turn ON MUTE at the set side until initial data is sent.
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Rise Time of VCC
tRISE
33
－
－
µsec
VCC Voltage of Release
Power ON Reset
VPOR
－
4.1
－
V
VCC rise time from 0V to 5V
(7) About External Compulsory Mute Terminal
It is possible to forcibly set Mute from the outside by setting input voltage at the MUTE terminal.
Mute Voltage Condition
Mode
GND to 1.0V
MUTE ON
2.3V to VCC
MUTE OFF
Establish the voltage of MUTE in the condition to be defined.
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TSZ22111・15・001
19/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
Application Information
1.
Function and Specifications
Function
Specifications
・(Stereo input)
Input
selector
Input
gain
Mute
Volume
・Single-End/Diff/Full-Diff
(Possible to set the number of single-end/diff/full-diff as follows )
Single-End
Differential
Full-Differential
Mode 1
0
3
1
Mode 2
1
2
1
Mode 3
3
1
1
Mode 4
4
0
1
Mode 5
5
1
0
Mode 6
6
0
0
Table.3 Combination of input selector
・+20dB to 0dB (1dB step)
・Possible to use “Advanced switch” for prevention of switching noise.
・Possible to use “Advanced switch” for prevention of switching noise.
・+15dB to -79dB (1dB step), -∞dB
・Possible to use “Advanced switch” for prevention of switching noise.
・+20dB to -20dB (1dB step)
Bass
・Q=0.5, 1, 1.5, 2
・fo=60, 80, 100, 120Hz
・Possible to use “Advanced switch” when changing gain
・+20dB to -20dB (1dB step)
Middle
・Q=0.75, 1, 1.25, 1.5
・fo=500, 1k, 1.5k 2.5kHz
・Possible to use “Advanced switch” when changing gain
・+20dB to -20dB (1dB step)
Treble
・Q=0.75, 1.25
・fo=7.5k, 10k, 12.5k, 15kHz
・Possible to use “Advanced switch” when changing gain
Fader
・0dB to -79dB, -∞dB
・Possible to use “Advanced switch” for prevention of switching noise.
・20dB to 0dB(1dB step)
Loudness
・fo=250/400/800Hz
・Possible to use “Advanced switch” for prevention of switching noise.
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TSZ22111・15・001
20/30
TSZ02201-0C2C0E100520-1-2
16.Dec.2015 Rev.001
BD37531FV
2.
Volume / Fader volume attenuation of the details
(dB)
D7 D6 D5 D4 D3 D2 D1 D0
+15
0
1
1
1
0
0
0
1
+14
0
1
1
1
0
0
1
0
+13
0
1
1
1
0
0
1
1
+12
0
1
1
1
0
1
0
0
+11
0
1
1
1
0
1
0
1
+10
0
1
1
1
0
1
1
0
+9
0
1
1
1
0
1
1
1
+8
0
1
1
1
1
0
0
0
+7
0
1
1
1
1
0
0
1
+6
0
1
1
1
1
0
1
0
+5
0
1
1
1
1
0
1
1
+4
0
1
1
1
1
1
0
0
+3
0
1
1
1
1
1
0
1
+2
0
1
1
1
1
1
1
0
+1
0
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
0
-1
1
0
0
0
0
0
0
1
-2
1
0
0
0
0
0
1
0
-3
1
0
0
0
0
0
1
1
-4
1
0
0
0
0
1
0
0
-5
1
0
0
0
0
1
0
1
-6
1
0
0
0
0
1
1
0
-7
1
0
0
0
0
1
1
1
-8
1
0
0
0
1
0
0
0
-9
1
0
0
0
1
0
0
1
-10
1
0
0
0
1
0
1
0
-11
1
0
0
0
1
0
1
1
-12
1
0
0
0
1
1
0
0
-13
1
0
0
0
1
1
0
1
-14
1
0
0
0
1
1
1
0
-15
1
0
0
0
1
1
1
1
-16
1
0
0
1
0
0
0
0
-17
1
0
0
1
0
0
0
1
-18
1
0
0
1
0
0
1
0
-19
1
0
0
1
0
0
1
1
-20
1
0
0
1
0
1
0
0
-21
1
0
0
1
0
1
0
1
-22
1
0
0
1
0
1
1
0
-23
1
0
0
1
0
1
1
1
-24
1
0
0
1
1
0
0
0
-25
1
0
0
1
1
0
0
1
-26
1
0
0
1
1
0
1
0
-27
1
0
0
1
1
0
1
1
-28
1
0
0
1
1
1
0
0
-29
1
0
0
1
1
1
0
1
-30
1
0
0
1
1
1
1
0
-31
1
0
0
1
1
1
1
1
-32
1
0
1
0
0
0
0
0
Fader Volume only 0dB to -∞dB are available.
(dB)
-33
-34
-35
-36
-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
-59
-60
-61
-62
-63
-64
-65
-66
-67
-68
-69
-70
-71
-72
-73
-74
-75
-76
-77
-78
-79
-∞
D7
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
D3
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
D2
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
D1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
D0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
：Initial condition
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3.
Application Circuit
FIL
GND
SDA
SCL
10μ
VCC
OUTF1 OUTF2 OUTR1 OUTR2 OUTS1 OUTS2
0.1μ
10μ
10μ
10μ
10μ
10μ
10μ
TEST3
10μ
26
25
24
23
22
21
Fader★
27
Fader★
28
MUTE
20
19
18
17
TEST2
16
15
VCC
VCC/2
GND
I2C BUS LOGIC
Fader★
Fader★
Fader★
Fader
■Fader
Gain:0dB to -79dB/1dB step
Gain:0dB～-79ｄB/1dB
step
★no pop noise
Loudness
■Loudness
Gain:+20dB to 0dB/1dB step
Gain:20dB～0ｄB/1ｄB
★no pop noise
・ｆ0=250/400/800Hz
・Hicut1/2/3/4
■3 Band P-EQ (Tone control)
Gain: +20dB to -20dB/1dB Step
Gain：+20dB～-20dB/1dB
step
★no pop noise
・Bass：f0=60/80/100/120Hz
Q=0.5/1.0/1.5/2.0
・Meddle:f0=500/1k/1.5k/2.5kHz
Q=0.75/1/1.25/1.5
・Treble：f0=7.5k/10k/12.5k/15kHz
Q=0.75/1.25
■Volume
Gain: +15dB to -79dB/1dB step
Gain：+15dB～-79dB/1dB
step
★no pop noise
■Input Gain
Gain：+20dB～0dB/1dB
step
Gain:
+20dB to 0dB/1dB step
★no pop noise
★Loudness
★3 Band P-EQ
(Tone control)
★Volume/Mute
★Input Gain
Input selector (3 single-end and 2 stereo ISO)
GND
ISO amp
100k
1
100k
2
100k
3
100k
4
100k
5
100k
6
GND
ISO amp
250k
7
250k
8
GND
ISO amp
250k
250k
10
9
GND
ISO amp
250k
11
250k
12
250k
13
14
TEST1
2.2μ
2.2μ
Single1
2.2μ
Single2
GND Isolation2
2.2μ
2.2μ
Single3
GND Isolation3
(Note 1)About single
input 1 to 3, it is possible to
※Single1～3はGND
Isolation2,3に切換可能
（About
singlefrom
inputsingle
1～3, input
it is possible
change from
change
to GNDtoIsolation
input
single input to GND Isolation input 2,3.）
2,3.
2.2μ
2.2μ
10μ
GND Isolation1 or
Single4
2.2μ
2.2μ
10μ
10μ
2.2μ
Full Differential or
Single5, Single6
※GND
Isolation1,
DifferentialはSingle4～6に切換可能
(Note
2)About
GND Full
Isolation1
and Full Differential, it is
possible
to change
from
input ittoissingle
（About GND
Isolation1
anddifferential
Full Differential,
possible
to change
from differential input to single input 4～6.）
input
4 to 6.
Unit
R : [Ω]
C : [F]
Notes on wiring
①
②
③
④
Please connect the decoupling capacitor of the power supply in the shortest possible distance to GND.
GND lines should be one-point connected.
Wiring pattern of Digital shall be away from that of analog unit and crosstalk should not be acceptable.
If possible, SCL and SDA lines of the I2C BUS should not be parallel.
The lines should be shielded, if they are adjacent to each other.
⑤ If possible, analog input lines should not be parallel. The lines should be shielded, if they are adjacent to each other.
⑥ About TEST pin(14,16,17pin), should be OPEN.
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Power Dissipation
About the thermal design of the IC
Characteristics of an IC are greatly affected by the temperature at which it is used. Exceeding absolute maximum ratings
may degrade and destroy the device. Careful consideration must be given to the heat of the IC from the two standpoints of
immediate damage and long-term reliability of operation.
Reference data
SSOP-B28
Power Dissipation : Pd (W)
1.5
Measurement condition: ROHM Standard board
board Size : 70 x 70 x 1.6(mm3)
material : A FR4 grass epoxy board
(3% or less of copper foil area)
1.063W
1.0
θja = 117.6°C/W
0.5
0.0
0
25
50
75
85
100
125
150
Ambient Temperature : Ta (°C)
Figure 23. Temperature Derating Curve
(Note) Values are actual measurements and are not guaranteed.
Power dissipation values vary according to the board on which the IC is mounted.
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I/O Equivalent Circuits
Terminal
No.
Terminal
Name
Terminal
Voltage
Equivalent Circuit
Terminal Description
A terminal for signal input.
The input impedance is 100kΩ (Typ).
VCC
1
A1
2
A2
3
B1
4
B2
5
C1
6
C2
7
DP1
8
DN
4.25
100k
GND
Input terminal available to single/Differential
mode.
The input impedance is 250kΩ (Typ).
VCC
9
DP2
10
EP1
11
EN1
12
EN2
13
EP2
4.25
250K
GND
A terminal for external compulsory mute. If
terminal voltage is High level, the mute is
OFF. And if the terminal voltage is Low level,
the mute is ON.
VCC
15
MUTE
－
1.65V
GND
A terminal for fader and Subwoofer output.
VCC
18
OUTS2
19
OUTS1
20
OUTR2
21
OUTR1
22
OUTF2
23
OUTF1
4.25
GND
Values in the pin explanation and input/output equivalent circuit are for reference purposes only. It is not a guaranteed value.
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BD37531FV
I/O Equivalent Circuits – continued
Terminal
No.
Terminal
Name
Terminal
Voltage
Equivalent Circuit
Terminal Description
Power supply terminal.
24
VCC
8.5
A terminal for clock input of I2C BUS
communication.
VCC
25
SCL
－
1.65V
GND
A terminal for data input of I2C BUS
communication.
VCC
26
SDA
－
1.65V
GND
Ground terminal.
27
GND
0
Voltage for reference bias of analog signal
system. The simple pre-charge circuit and
simple discharge circuit for an external
capacitor are built in.
VCC
50k
28
FIL
4.25
50k
GND
TEST terminal
14
16
TEST
-
17
Values in the pin explanation and input/output equivalent circuit are for reference purposes only. It is not a guaranteed value.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 24. Example of monolithic IC structure
13. About a Signal Input Part
(a) About Input Coupling Capacitor Constant Value
The constant value of input coupling capacitor C(F) is decided with respect to the input impedance R IN(Ω)
at the input signal terminal of the IC that would be sufficient to form an RC characterized HPF.
G〔dB〕
C〔F〕
0
RIN
A(f)
〔Ω〕
ＳＳＨ
f〔Hz〕
INPUT
A f  
2 fCRIN 2
2
1  2 fCRIN 
(b) About the Input Selector SHORT
SHORT mode is the command which makes switch SSH =ON of input selector part so that the input impedance
RIN of all terminals becomes small. Switch SSH is OFF when SHORT command is not selected.
The constant time brought about by the small resistance inside and the capacitor outside the LSI becomes
small when this command is used. The charge time of the capacitor becomes short. Since SHORT mode turns
ON the switch of SSH and makes it low impedance, please use it at no signal condition.
14. About Mute Terminal (Pin 15) when Power Supply is OFF
There should be no applied voltage to Mute terminal (Pin 15) when power-supply is OFF.
If in case voltage is supplied to Mute terminal, please insert a series resistor (about 2.2kΩ) to Mute terminal.
(Please refer to Application Circuit Diagram.)
15. About TEST Pin
TEST Pin should be OPEN.
Pin 14. 16, 17 are TEST Pins
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BD37531FV
Ordering Information
B
D
3
7
5
Part Number
3
1
F
V
-
Package
FV: SSOP-B28
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
SSOP-B28(TOP VIEW)
Part Number Marking
BD37531FV
LOT Number
1PIN MARK
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BD37531FV
Physical Dimension, Tape and Reel Information
Package Name
SSOP-B28
(Max 10.35 (include.BURR))
(UNIT : mm)
PKG : SSOP-B28
Drawing No. : EX156-5001
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BD37531FV
Revision History
Date
Revision
16.Dec.2015
001
Changes
New Release
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001