VBUS054DD-HF4 www.vishay.com Vishay Semiconductors 4-Line BUS-Port ESD Protection FEATURES 4 3 • Ultra compact LLP1010-5L package 5 • Low package profile < 0.4 mm • 4-line ESD-protection 1 2 • Low leakage current 21483 • Low load capacitance CD = 0.8 pF • ESD-protection acc. IEC 61000-4-2 ± 15 kV contact discharge ± 15 kV air discharge 21482 • Pin plating NiPdAu (e4) no whisker growth MARKING (example only) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 XY 20932 Dot = pin 1 marking X = date code Y = type code (see table below) ORDERING INFORMATION ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VBUS054DD-HF4-GS08 5000 5000 DEVICE NAME VBUS054DD-HF4 PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VBUS054DD-HF4 LLP1010-5L C 1.07 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS VBUS054DD-HF4 TEST CONDITIONS SYMBOL VALUE UNIT Peak pulse current Pin 1, 2, 3 or 4 to pin 5 acc. IEC 61000-4-5; tp = 8/20 µs; single shot IPPM 3 A Peak pulse power Pin 1, 2, 3 or 4 to pin 5 acc. IEC 61000-4-5; tp = 8/20 µs; single shot PPP 57 W ± 15 kV PARAMETER ESD immunity Operating temperature Storage temperature Rev. 1.5. 15-Sep-14 Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses Junction temperature VESD ± 15 kV TJ -40 to +125 °C TSTG -55 to +150 °C Document Number: 81928 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS054DD-HF4 www.vishay.com Vishay Semiconductors ELECTRICAL CHARACTERISTICS VBUS054DD-HF4 (Pin 1, 2, 3, or 4 to pin 5) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Number of lines which can be protected Nchannel - - 4 lines Max. reverse working voltage VRWM - - 5 V Reverse voltage at IR = 0.1 μA VR 5 - - V Reverse current at VIN = VRWM = 5 V IR - < 0.01 0.1 μA at IR = 1 mA VBR 6.9 8 8.7 V Reverse clamping voltage at IPP = 3 A acc. IEC 61000-4-5 VC - 16 19 V Forward clamping voltage at IF = 12 A acc. IEC 61000-4-5 VF - 3.5 4.5 V VIN = 0 V CD - 0.8 1 pF VIN = 2.5 V CD - 0.5 0.8 pF Difference of the line capacitances dCD - - 0.05 pF Protection paths Reverse stand-off voltage Reverse breakdown voltage Capacitance Line symmetry Note • Tamb = 25 °C, unless otherwise specified TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 1.0 8 µs to 100 % 100 % 0.9 other pins at 0 V 0.8 80 % 0.7 CD (pF) IPPM 60 % 20 µs to 50 % 40 % other pins at 3 V 0.6 0.5 other pins at 5 V 0.4 0.3 20 % 0.2 f = 1 MHz; pin 5 connected to ground 0.1 0% 0 20548 10 20 30 0 40 Time (µs) Fig. 1 - 8/20 μs Peak Pulse Current Wave Form acc. IEC 61000-4-5 0 21503 2 3 4 5 Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR 100 120 % Pin 5 to pin 1, 2, 3, or 4 Rise time = 0.7 ns to 1 ns 100 % 10 80 % 1 IF (mA) Discharge Current IESD 1 VR at pin 1, 2, 3 or 4 (V) 60 % 53 % 0.1 40 % 27 % 0.01 20 % 0% - 10 0 10 20 30 40 50 60 70 80 90 100 20557 Time (ns) Fig. 2 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF) Rev. 1.5. 15-Sep-14 0.001 0.5 21504 0.6 0.7 0.8 0.9 1.0 1.1 VF (V) Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF Document Number: 81928 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS054DD-HF4 www.vishay.com Vishay Semiconductors 9 25 Measured acc. IEC 61000-4-5 (8/20µs - wave form) 8 20 7 Pin 1, 2, 3, or 4 to pin 5 Pin 1, 2, 3, or 4 to pin VC (V) VR (V) 6 5 4 15 VC 10 3 2 5 Pin 5 to pin 1, 2, 3, or 4 1 0 0.01 0 0.1 21505 1 101 102 103 104 0 1 21506 IR (µA) Fig. 5 - Typical Reverse Voltage VR vs. Reverse Current IR 2 3 4 5 IPP (A) Fig. 6 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP APPLICATION NOTE With the VBUS054DD-HF4 a double, high speed USB-port or up to 4 other high speed signal or data lines can be protected against transient voltage signals. Negative transients will be clamped close below the ground level while positive transients will be clamped close above the 5 V working range. The high speed data lines, D1+, D2+, D1- and D2-, are connected to pin 1, 2, 3, and 4, pin 5 is connected to ground. As long as the signal voltage on the data lines is between the ground- and the breakthrough-level, the low input capacitance of each channel offer a very high isolation to ground and to the other data lines. But as soon as any transient signal exceeds this working range, the VBUS054DD-HF4 clamps the transient to ground or to the avalanche breakthrough voltage level. t w i n D1+ D14 U S B P o r t 3 5 1 D2+ R E C E I V E R 2 IC D2GND 21507 Rev. 1.5. 15-Sep-14 Document Number: 81928 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS054DD-HF4 www.vishay.com Vishay Semiconductors BACKGROUND KNOWLEDGE A zener- or avalanche diode is an ideal device for “cutting” or “clamping” voltage spikes or voltage transients down to low and uncritical voltage values. The breakthrough voltage can easily be adjusted by the chip-technology to any desired value within a wide range. Up to about 6 V the “zener-effect” (tunnel-effect) is responsible for the breakthrough characteristic. Above 6 V the so-called “avalanche-effect”" is responsible. This is a more abrupt breakthrough phenomenon. Because of the typical “Z-shape” of the current-voltage-curve of such diodes, these diodes are generally called “Z-diode” (= zener or avalanche diodes). An equally important parameter for a protection diode is the ESD- and surge-power that allows the diode to short current in the pulse to ground without being destroyed. This requirement can be adjusted by the size of the silicon chip (crystal). The bigger the active area the higher the current that the diode can short to ground. But the active area is also responsible for the diode capacitance - the bigger the area the higher the capacitance. The dilemma is that a lot of applications require an effective protection against more then 8 kV ESD while the capacitance must be lower then 5 pF! This is well out of the normal range of a Z-diode. However, a protection diode with a low capacitance PN-diode (switching diode or junction diode) in series with a Z-diode, can fulfil both requirements simultaneously: low capacitance AND high ESD- and/or surge immunity become possible! A small signal (Vpp < 100 mV) just sees the low capacitance of the PN-diode, while the big capacitance of the Z-diode in series remains "invisible". CD = 0.4 pF D CTOT ZD CZD = 110 pF 20400 Such a constellation with a Z-diode and a small PN-diode (with low capacitance) in series (anti-serial) is a real unidirectional protection device. The clamping current can only flow in one direction (forward) in the PN-diode. The reverse path is blocked. I/O D ZD Gnd 20401 Another PN-diode "opens" the back path so that the protection device becomes bidirectional! Because the clamping voltage levels in forward and reverse directions are different, such a protection device has a Bidirectional and Asymmetrical clamping behaviour (BiAs) just like a single Z-diode. The VBUS054DD-HF4 offers four inputs with such protection circuit inside. I/O D1 D2 ZD Gnd 20404 4 3 5 1 Rev. 1.5. 15-Sep-14 2 21508 Document Number: 81928 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS054DD-HF4 www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters (inches): LLP1010-5L 0.125 (0.005) ref. 0 (0.000) 0.95 (0.037) 1.05 (0.041) Pin 1 marking 0.03 (0.001) 0.4 (0.016) 0.15 (0.006) 0.22 (0.009) 0.25 (0.010) 0.33 (0.013) 0.28 (0.011) 0.5 (0.020) bsc 0.65 (0.026) exp. DAP 0.2 (0.008) exp. DAP 1.05 (0.041) 0.95 (0.037) Foot print recommendation: 0.15 (0.006) Solder resist mask 0.65 (0.026) 0.5 (0.020) 0.25 (0.010) 0.2 (0.008) Solder pad Soldermask opening ± 0.03 Document no.:S8-V-3906.04-007 (4) Created - Date: 15. April. 2008 Rev. 2 - Date: 09. Sep. 2008 0.35 (0.014) measured middle of the package 0.2 (0.008) 21380 Rev. 1.5. 15-Sep-14 Document Number: 81928 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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