SCH322x Serial Ports IRQ Sharing Issue in Windows with Installing ACPI 5.0 Author: Vicky Chen Microchip Technology Inc. INTRODUCTION This document provides BIOS engineers a quick reference to port System BIOS in support of the SCH322x Serial ports IRQ Sharing issue in Windows 8.1 and Windows10 with installing the ACPI 5.0. References The following documents should be referenced when using this white paper. See your Microchip representative for availability. • • • • • SCH322x Product Brief SCH3223 Data Sheet Rev. A (11-12-15) AN1975 - SCH3227/SCH3226/SCH3224/SCH3222 System BIOS Porting Guide, Rev. A (06-25-15) AN1976 - SCH3223 System BIOS Porting Guide, Rev. A (07-07-15) ACPI Specification, Rev. 5.0a, (11-13-13) 2016 Microchip Technology Inc. DS00002131A-page 1 SCH322X SERIAL PORTS IRQ SHARING ISSUE IN WINDOWS WITH INSTALLING ACPI 5.0 ISSUE DESCRIPTION Serial ports IRQ Sharing are inactive on Windows 8.1\Windows 10 with installing the ACPI revision 5.0 in FACP table. Using the same system BIOS to support for serial ports IRQ Sharing are active on Windows 7 or on Windows 8. DEVICE SCH322x PLATFORM Intel Shark Bay-M (Grays Reef) platform or Intel next generation Desktop or Mobile platform. SYSTEM BIOS UEFI BIOS and must install the ACPI Revision 5.0 in the FACP table. DEVICE FUNCTION INITIALIZATION • Initializing both Serial port1 and Serial port2 to share an IRQ 14. Note 1: Refer to Section 5.1, “Runtime Register Block - Logical Device A Flow Chart and Description” in AN1975 SCH3227/SCH3226/SCH3224/SCH3222 System BIOS Porting Guide, Rev. A (06-25-15) to initialize the SCH322x Runtime Registers for Serial port2. 2: SioDSRegisterWrite Macro (Logical Device Number, Offset register, Register value). SioLDRegisterWrite (0x4, 0x60, 0x03);// Set COM1 Base I/O Address = 03F8h. SioLDRegisterWrite (0x4, 0x61, 0xF8);// SioLDRegisterWrite (0x4, 0xF0, 0x80);// COM1 and COM2 shared IRQ SioLDRegisterWrite (0x4, 0x70, 0x0E); // IRQ 14 SioLDRegisterWrite (0x4, 0x30, 0x01);// Active SioLDRegisterWrite (0x5, 0x60, 0x02);// Set COM2 Base I/O Address = 02F8h. SioLDRegisterWrite (0x5, 0x61, 0xF8); SioLDRegisterWrite (0x5, 0xF0, 0x00); // COM2 SioLDRegisterWrite (0x5, 0x70, 0x0E); // IRQ 14 SioLDRegisterWrite (0x5, 0x30, 0x01);// Active IN SYSTEM BIOS ASL CODES To support for the SCH322x Serial ports IRQ sharing, the IRQ Descriptor must be set up to “Edge, Active Low, Shared” or “Level, Active Low, Shared” for both Serial ports then booting into the Windows 7\8\8.1, both Serial ports resource are no conflicts in the Windows\Device Manager. If set up the IRQ Descriptor to “Edge, Active High, Shared” or “Level, Active High, Shared” for both Serial ports then booting into the Windows 7\8\8.1\10, both Serial ports resource are conflicts with yellow bangs in the Windows\Device Manager. DS00002131A-page 2 2016 Microchip Technology Inc. SCH322X SERIAL PORTS IRQ SHARING ISSUE IN WINDOWS WITH INSTALLING ACPI 5.0 IRQ TYPE DEFAULT DEFINITIONS In the ACPI Specification The Interrupt Information is defined in the ACPI Spec. V.3.0 or V.5.0 below, The ACPI Spec. defined the IRQ type default setting is supported for “edge, active high, non-shared” for UART IRQ Information in Note below. In the SCH3223 Data Sheet The SCH3223 UART IRQ default to “edge high” (ISA compatible), as follows: Table 22-6: LOGICAL DEVICE REGISTERS Logical Device Register Interrupt Select Defaults: 0x70 = 0x00 or 0x06 on VCC POR, VTR POR, PCI RESET and SOFT RESET Address Description (0x70, 0x72) Only register 0x70 is implemented for each logical device. Refer to Interrupt Configuration Register description. Unused register (0x72) will ignore writes and return zero when read. Interrupts default to edge high (ISA compatible). 0x72 = 0x00, on VCC POR, VTR POR, PCI RESET and SOFT RESET 2016 Microchip Technology Inc. DS00002131A-page 3 SCH322X SERIAL PORTS IRQ SHARING ISSUE IN WINDOWS WITH INSTALLING ACPI 5.0 WORKAROUND FOR THIS ISSUE SCH322x does not have the registers to initialize the interrupt polarity. We provide two suggestions to do the system BIOS workaround for this issue, as follows: Note: BIOS engineers may select Suggestion 1 or Suggestion 2 to fix this issue, both suggestions cannot be used together. Suggestion 1: Install ACPI Revision 4.0 in the FACP table to support the Serial ports IRQ sharing issue. Suggestion 2: Modify the Serial port ASL codes to fix this issue, such as: both COM1 and COM2 devices share an interrupt - IRQ14. Below are the details. In _STA method: Report the Serial port device is present and enabled to OS. To fix a bug that cold booting into the Windows and uninstalling the Serial port device in Device Manager and rebooting into the Windows, the system will reboot twice. Method(_STA) { Return(0x0F) } In _CRS method: To set the ACPI IRQ information Byte 3 to 0x19, refer to Table 6-163, “IRQ Descriptor Definition” of the ACPI Specification, Rev. 5.0a, as follows: Bit[4]: Interrupt Sharing, _SHR = 1 // Shared Bit[3]: Interrupt Polarity, _LL = 1 // Active-Low Bit[0]: Interrupt Mode, _HE = 1 // Edge-Triggered The IRQ information of _CRS is set to IRQ(Edge, ActiveLow, Shared) {0x0E}. In _PRS method: To set the IRQ information to IRQ(Edge, ActiveHigh, Shared) {0x0E}. Note: There is a limitation for Suggestion 2 that it’s only supported one Serial port resource in _PRS, such as: Name(_PRS,ResourceTemplate() { StartDependentFn(0,0) { IO(Decode16,0x3F8,0x3F8,0x08,0x08) IRQ(Edge,ActiveHigh,Shared) {0x0E} } EndDependentFn() } For the Windows behavior, we cannot support user to dynamically update the Serial ports resources in the Windows\Device Manager, otherwise, the workaround will fail. DS00002131A-page 4 2016 Microchip Technology Inc. SCH322X SERIAL PORTS IRQ SHARING ISSUE IN WINDOWS WITH INSTALLING ACPI 5.0 APPENDIX A: WHITE PAPER REVISION HISTORY TABLE A-1: Revision DS00002131A (03-23-16) 2016 Microchip Technology Inc. Section/Figure/Entry Correction Document Release DS00002131A-page 5 SCH322X SERIAL PORTS IRQ SHARING ISSUE IN WINDOWS WITH INSTALLING ACPI 5.0 Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. 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