AN2025 APPLICATION NOTE ® Converter Improvement Using Schottky Rectifier Avalanche Specification STMicroelectronics gives in product datasheets useful information for all their Schottky Rectifier families to define their working limit in the avalanche area. A simple method to determine if a Schottky diode can work in the avalanche area in a given Switch Mode Power Supply (SMPS) is described in this document. Then an accurate method will be defined in order to estimate the maximum average avalanche power losses. Finally, a concrete example will be illustrated to show how the choice of a Schottky diode can be optimized in order to improve the efficiency of the converter. I. Introduction The design of SMPS is subjected to heavy constraints in order to improve the trade-off between the cost and the power density. One way to respond to these aggressive specifications is to drive components closer to their intrinsic limits. The use of Schottky diodes in the avalanche area is a good example of this evolution. II. Description of the specification tool STMicroelectronics guarantees for each Schottky diode a reference avalanche power capability corresponding to a rectangular current pulse: PARM(1µs, 25°C) (given at tp=1µs and Tj = 25°C) - See figure 1. Derating curves shown in figure 2 and figure 3 give the admissible avalanche power for each Schottky diode versus the operating junction temperature (Tj) and the pulse duration (tp). PARM(1µs,25°C) for each part number as well as derating curves are given in the respective data sheet. The designer must ensure that the guaranteed avalanche power PARM (tp,Tj) is greater than the avalanche power in the application PAVALANCHE : Figure 1: PARM (1µs, 25°C) (Maximum repetitive avalanche power) Tj = 25°C SCOPE VClamp tp = 1µs IPP PAVALANCHE (application) < PARM (tp , Tj) PARM (1µs, 25°C) = VClamp x IPP AN2025/1004 REV. 1 1/11 AN2025 - APPLICATION NOTE P ARM ( t p , T j ) Figure 2: --------------------------------------------- versus Tj o P ARM ( t p , 25 C ) P ARM ( t p , T j ) Figure 3: ----------------------------------------- versus Tp P ARM ( 1 µ s , T j ) PARM (tp, Tj) / PARM (1µs, Tj, 25°C) versus tp PARM (tp, Tj) / PARM (tp, 25°C) versus Tj 10 1.2 1 tp (µs) 1 0.01 0.8 0.1 0.6 1 10 100 1000 0.1 0.4 0.01 0.2 Tj (°C) 0 25 50 75 100 125 150 175 0.001 III. Simple method to estimate the maximum avalanche peak power III.1. Setting the Problem Most of the time, it is difficult to accurately determinate the avalanche power through the diode in the hardware circuit. This is mainly due to measuring problems such as delay time between current and voltage probe, the very low pulse duration and the snubber circuit impact. Generally, in SMPS applications, the maximum avalanche peak power occurs for a diode having the lowest clamping voltage. Practically, this diode is very difficult to find. These are the reasons why STMicroelectronics proposes a simple method to estimate the maximum avalanche peak power PPEAK_AV. In most of SMPS applications, this method will be pessimistic (PPEAK_AV > PAVALANCHE) but sufficient to determine whether or not a given Schottky diode will sustain the applied avalanche energy. This method only covers Schottky diodes used in rectification function for SMPS (see figure 4), where the pulse duration of the avalanche current tp is less than 1µs. Figure 4: Typical secondary rectification topologies RS CS LF LF DR RS or CS Transformer 2/11 Transformer DF AN2025 - APPLICATION NOTE III.2. Switching-off analysis (simple method) III.2.1. Introduction The figure 5 shows the equivalent circuit that can be used to simulate a secondary rectification function when the diode turns off : LF represents the leakage inductance of the transformer. The diode is modelized by the capacitance Cj, RS and CS are the snubber components. The figure 6 shows the corresponding current and voltage waveforms taking into account the delay time between current and voltage probes. When the total current (current in the diode + current in the snubber) is at maximum (IPEAK), the voltage across the leakage inductance is zero (dIT/dt = 0). Consequently the voltage across the diode is equal to VS. iT = IPEAK ⇔ vD = -VS Figure 6: Total current (iT) and voltage (VD) when the diode turns off Figure 5: Basic equivalent circuit LF 0V vD CS RS Snubber -VS iT Cj -VRRM 20V/div 1A/div 20ns/div -VSPIKE VS vD 0A LF: leakage inductance of the transformer iT with delay time iT without delay time IPEAK III.2.2. Switch-off behavior when the diode works in the avalanche area The figure 7 shows the switch-off behavior when the diode works in the avalanche area. This characteristic is made up of 2 distinct phases. Figure 7: Switch-off behavior when the diode works in the avalanche area Phase 1: t ∈ [t0 , t1] At t = t0 : iT = I0 vD = 0 vD, iT iT t0 CS RS t1 Phase1 t2 Phase2 t vD LF VS iT I0 Cj vD I1 IPEAK -VS dIT/dt -VRRM -VClamp 3/11 AN2025 - APPLICATION NOTE The first phase corresponds to the charging of the junction capacitance of the diode, Cj. The voltage across the diode VD decreases until it reaches the clamping voltage of the diode -VClamp (see figure 7). As was explained above, when the total current is equal to IPEAK, VD is equal to -VS. Once the current has reached IPEAK, it then increases to reach the value I1 corresponding to VD = -VClamp (see figure 7). Phase 2: t ∈ [t1 , t2] RS At t = t1 : iT = I1 vD = VClamp CS iT LF iAVALANCHE VS VClamp During this phase, the diode works in the avalanche region. Consequently, the voltage across the diode is equivalent to a voltage generator equal to VClamp. The total current increases linearly with a slope equal to: di T V Clamp Vs -------- = ---------------------------dt LF (see figure 7) After t2, the voltage across the diode increases towards -VS (see figure 7). These considerations show that: I1 < IPEAK III.2.3. Estimation of the maximum avalanche peak power: PPEAK_AV The figure 8 shows in blue color the total current IT (diode + snubber) and in black line the real avalanche current waveforms during the switching-off of the diode. Figure 8: Total current and avalanche current waveforms when the diode works in the avalanche area Phase2 I IPEAK diT = VClamp -VS LF dt Phase2 iT iAVALANCHE RS I1 iAVALANCHE IAR CS iT t1 4/11 VClamp tp < 1µs t2 t AN2025 - APPLICATION NOTE The real peak current in avalanche (IAR) is less than I1 and I1 is less than IPEAK. We first approximate an avalanche current value by taking IPEAK for all further calculations. Moreover, STMicroelectronics guarantees that the maximum clamping voltage of Schottky diodes is always less than 2×VRRM (VRRM: Maximum repetitive reverse voltage). Consequently from these 2 conditions, a conservative estimation of the maximum avalanche peak power can be done: PAVALANCHE = IAR.VClamp < PPEAK_AV = IPEAK.(2×VRRM) Finally, to determine if a given Schottky diode can work in the avalanche area in a given SMPS, the following condition must be respected: 2.IPEAK.VRRM < PARM(1µs,Tj) III.3. Methodology Here below are the three steps to follow in order to define PPEAK_AV and to then compare it with PARM(1µs,Tj). ■ Step1: Total current measurement iT (with snubber) ⇒ IPEAK ■ Step2: Maximum avalanche peak power estimation ⇒ PPEAK_AV = 2.IPEAK.VRRM ■ Step3: Check that: ⇒ PPEAK_AV < PARM(1µs, Tj) using the specification tool (see § II) [As tp < 1µs ⇒ PARM(tp, Tj) = cst = PARM(1µs, Tj)] Example: In this example, a 16A-100V Schottky diode (STPS16H100CT) working in the avalanche area is considered. ■ Step1: The figure 9 shows the total current through both the snubber circuit and the STPS16H100CT. ■ Figure 9: Total current iT (diode + snubber) 2A/div 0.1µs/div Step2: PPEAK_AV is given by: ⇒ PPEAK_AV = 4.4 x (2 x 100) ⇒ PPEAK_AV = 880W iT tp < 1µs ■ Step3: The data sheet of the STPS16H100CT gives: PARM(1µs, 25°C)(STPS16H100CT) = 8700W With the derating curve figure 2, we get: PARM(1µs, 130°C)(STPS16H100CT) = 3045W IPEAK = 4.4A Tj = 130°C As PPEAK_AV is lower than PARM(1µs, Tj), the STPS16H100CT can be used safely in this application. 5/11 AN2025 - APPLICATION NOTE IV. Estimation of the average avalanche power losses The accurate method given below allows the maximum average avalanche power to be determined, and it can be used to optimize the choice of the diode in order to improve the converter's efficiency. The equivalent circuit during the time the diode works in the avalanche is simulated. From this simulation, the real avalanche current as well as the pulse duration can be found from which an estimation of the maximum avalanche energy can be made. The simulation is performed using the Pspice software. The 2 steps that comprise this method are explained using an adaptor for Notebook as a concrete example (see figure 10). Figure 10: 70W Adaptor for Notebook, using a STPS16H100CT in the avalanche First step: Measurement This first step consist of measuring 3 waveforms: ⇒ the total current iT (taking into account the delay time in order to have IPEAK at VD = -VS) ⇒ the voltage across the diode VD ⇒ the voltage across the snubber capacitor VCS CS RS VIN STPS16H100CT nP VS IOUT = 4A VOUT = 18V vD nS Figure 11 shows typical waveforms corresponding to the example. Figure 11: Waveforms when the diode turns off VCS iT without delay time VCS RS LF VS = m.VIN 0A vD CS iT with delay time iT vD 0V VC0 = 14V 0 scope VS VOUT IT0 = 4.2A IPEAK 20V/div 1A/div 10ns/div - VClamp_min = - VRRM - VSPIKE The maximum avalanche energy in the diode corresponds to a diode with a minimum clamping voltage VClamp_min. As this value is not given in the data sheet, one can consider that the minimum clamping voltage will be equal to VRRM. The figure 11 gives the initial conditions when the voltage across the diode is equal to VClamp_min , that is to say VRRM. At vD = VRRM : 6/11 iT = iTO = 4.2A VCS = VCO = 14V AN2025 - APPLICATION NOTE Second step: Pspice simulation Knowing the initial conditions iTO and VCO , the equivalent circuit can be simulated (see figure 12). The figure 13 shows the simulation results. The result of this simulation is: tp E AVALANCHE_max = ∫0 VRRM ⋅ iAVALANCHE ⋅ dt EAVALANCHE_max = 2.5µJ Therefore: PAVALANCHE(AVERAGE)max = EAVALANCHE_max x Fc (with Fc = 100kHz) PAVALANCHE(AVERAGE)max = 250mW This accurate method can be used to estimate the maximum real avalanche peak power in the case where the estimation with the simple method (cf §III) is too pessimist. Figure 12: Pspice equivalent circuit with initial conditions ITO and VCO RS = 47Ω CS = 2.2nF 2 VS 2 1 iSNUBBER LF = 280nH 1 1 D iAVALANCHE - + 2 - VClamp_min = 100V + Figure 13: Simulation results EAVALANCHE_max = 2.5µJ tp IT0 = 4.2A IAR iSNUBBER iT iAVALANCHE VClamp_min = VRRM = 100V VC0 = 14V VCS 7/11 AN2025 - APPLICATION NOTE V. Rectification Schottky diode optimization using avalanche specification V.1. Changing security margin criteria The figure 14 shows a typical voltage waveform across a rectification diode. Usually, designers take a conventional security margin between the VRRM and the spike voltage (see figure 14). With the avalanche specification of Schottky diodes, this security margin is not required anymore because the diode can work in avalanche during the turn-off. On the other hand, the new security margin which is an essential condition to assure the correct working of the power supply is the margin between the maximum voltage VSmax and the new VRRM (VRRM2, see figure 14). In the example illustrated here below, a 150V Schottky diode is replaced by a 100V Schottky diode. VSmax needs to be defined by the designer in the worst case conditions (Vinmax, transient phase...). Consequently, the following condition is necessary for VRRM: VSmax + margin < k x VRRM k is a cold start coefficient that is equal to 0.95 in the case where the diode is exposed to very low temperature (-40°C or -20°C) (for Tj > 0°C, k = 1). Figure 14: Voltage across the diode 20V/div 2µs/div vD 0V Forbidden area - VS max New security margin - VRRM2 = - 100V - VSPIKE Conventional margin - VRRM1 = - 150V V.2. Snubber size optimization The snubber design is defined by the 3 following constraints: 1. Power losses in the snubber resistance RS 2. EMC compatibility 3. VSPIKE < VRRM With the avalanche specification, the third constraint (VSPIKE < VRRM) is not relevant anymore. Consequently in a few cases, it is possible to reduce the snubber size. V.3. Schottky diode optimization Using the Schottky avalanche specification, two methods of optimization can be considered: - Power losses saving (same "price") - Cost saving (same power losses) In order to show how it is possible to optimize the converter using Schottky diodes in avalanche, a concrete example of a Switched Mode Power Supply for computer is illustrated (see figure 15). 8/11 AN2025 - APPLICATION NOTE Figure 15: SMPS for PC STPS3045CT 3.3V 10A STPS6045CW 5V 25A STPS20H100CT 12V 10A The two method of optimization of conventional parts numbers are given in the table below: VOUT Current solution STPS3045CT STPS6045CW STPS20H100CT 3.3 V 5V 12 V Part Number Power losses saving sol. STPS3030CT STPS6030CW STPS20L60CT Cost saving solution STPS2030CT STPS3030CT STPS10L60CT In this example, avalanche losses and switching-off losses are negligible in comparison with the forward losses. The following table gives the forward losses saving for each output. Output VOUT = 3.3 V IOUT = 10 A VOUT = 5 V IOUT = 25 A VOUT = 12 V IOUT = 10 A Part Number STPS3045CT STPS3030CT STPS6045CW STPS6030CW STPS20H100CT STPS20L60CT Pfwd (W) 4.35 3.12 12 9.1 5.85 4.66 In this example, the total efficiency improvement on the 3 outputs is equal to 1.9%. VI. Conclusion This paper presents the specification tool allowing the admissible avalanche power of Schottky diodes to be calculated. With this tool and the simple method to estimate the maximum avalanche peak power, one can easily determine if a given Schottky diode can work in the avalanche area. In SMPS, the efficiency drop is mainly determined by the rectification diode stage. In most of cases and according to the converter topology, the use of Schottky diodes in the avalanche area will allow the converter's efficiency to be improved. Alternatively it can enable the cost to be optimized by reducing the current rating of the rectification diode. References: [1] AN1453: NEW FAMILY OF 150V POWER SCHOTTKY (by F.Gautier) [2] AN587: TRANSISTOR PROTECTION BY TRANSIL( by B.Rivet) [3] ANALYSIS AND OPTIMISATION OF HIGH FREQUENCY POWER RECTIFICATION (by J.M.Peter) 9/11 AN2025 - APPLICATION NOTE Table 1: Revision History 10/11 Date Revision Oct-2004 1 Description of Changes First issue AN2025 - APPLICATION NOTE The present note which is for guidance only, aims at providing customers with information regarding their products. in order for them to save time. As a result, STMicroelectronics shall not be held liable for any direct, indirect or consequential damages with respect to any claims arising from the content of such a note and/or the use made by customers of the information contained herein in connection with their products. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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