Si4820/Si4824-A10 Broadcast Mechanical Tuning AM/FM/SW Radio Receiver

Si4820/24-A10
B R O A DC A S T M E C H A N I C A L TUN I N G A M / F M / S W R A D I O R E C E I V E R
Features






Worldwide FM band support
(64–109 MHz)
Worldwide AM band support
(504–1750 kHz)
SW band support (Si4824 only)
(5.6–22 MHz)
No manual alignment necessary
Mono audio output
Selectable support AM/FM/SW
regional bands
Automatic frequency control (AFC)
Integrated LDO regulator
 2.0 to 3.6 V supply voltage
 Wide range of ferrite loop sticks and
air loop antennas supported
 24-pin SSOP
 RoHS-compliant
 Direct volume control
 Not EN55020 compliant*
*Note: For consumer applications that
require EN 55020 compliance,
use Si4831/35-B.


Ordering Information:
See page 14.
Applications
Pin Assignments
Table and portable radios
Mini/micro systems
 CD/DVD players
 Boom boxes
Modules
Clock radios
 Mini HiFi
 Entertainment systems




Description
The Si4820/24-A10 is the entry level mechanical-tuned digital CMOS AM/FM/SW
radio receiver IC that integrates the complete receiver function from antenna input
to audio output. The Si4820/24-A10 extends Silicon Laboratories multi-band tuner
family, and further increases the ease and attractiveness of design radio reception
to audio devices through small size and board area, minimum component count,
and superior, proven performance. The Si4820/24-A10 is drop-in replaceable to
the existing Si4831/35 tuner, requires a simple application circuit, and removes
any requirements for manually tuning components during the manufacturing
process. It is a very simple product to design, manufacture, and support across
multiple product lines. The receiver has very low power consumption, runs off two
AAA batteries, and delivers the performance benefits of digital tuning to the
analog radio market.
Functional Block Diagram
Si4820/24
Si4830/34
ADC
AMI
AM
ANT
RFGND
LNA
DSP
DAC
AOUT
ADC
FM
ANT
FMI
AGC
0/90
Si4820/24-A10 (SSOP)
LNA_EN
1
24
AOUT
NC
2
23
NC
TUNE1
3
22
DBYP
TUNE2
4
21
VDD2
BAND
5
20
VDD1
NC
6
19
XTALI
NC
7
18
XTALO
FMI
8
17
VOL-
RFGND
9
16
VOL+
NC
10
15
RST
NC
11
14
GND
AMI
12
13
GND
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373;
7,272,375;
7,321,324;
7,355,476;
7,426,376;
7,471,940;
7,339,503; 7,339,504.
TUNE1/2
ADC
AFC
CONTROL INTERFACE
BAND
2.0~3.6V VDD1/2
LNA_EN
REG
XTAL
OSC
Rev. 1.0 11/11
RST
XTALI
Copyright © 2011 by Silicon Laboratories
Si4820/24-A10
Si4820/24-A10
2
Rev. 1.0
Si4820/24-A10
TABLE O F C ONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.7. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. Pin Descriptions: Si4820/24-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7. Package Outline: Si4820/24-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8. PCB Land Pattern: Si4820/24-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
9.1. Si4820/24-A10 Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
10. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Rev. 1.0
3
Si4820/24-A10
1. Electrical Specifications
Table 1. Recommended Operating Conditions1,2
Parameter
Symbol
Min
Typ
Max
Unit
VDD
2
—
3.6
V
VDDRISE
10
—
—
µs
Supply Voltage3
Power Supply Powerup Rise Time
Test Condition
Note:
1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated.
2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for
minimum VDD = 2.7 V.
3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part
initialization may become unresponsive below 2.3 V.
Table 2. DC Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
IFM
—
21.0
—
mA
IAM
—
17.0
—
mA
IDDPD
—
10
—
µA
FM Mode
Supply Current*
AM/SW Mode
Supply Current*
Supplies and Interface
VDD Powerdown Current
*Note: Specifications are guaranteed by characterization.
4
Rev. 1.0
Si4820/24-A10
Table 3. Reset Timing Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
RST Pulse Width
Symbol
Min
Typ
Max
Unit
tSRST
100
—
—
µs
tSRST
RST
70%
30%
Figure 1. Reset Timing
Rev. 1.0
5
Si4820/24-A10
Table 4. FM Receiver Characteristics1,2
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Test Condition
Unit
Min
Typ
Max
64
—
109
MHz
—
4.0
—
µV EMF
LNA Input Resistance4,5
—
4
—
k
LNA Input Capacitance4,5
—
5
—
pF
—
50
—
dB
—
105
—
dBµV EMF
Input Frequency
Symbol
fRF
Sensitivity with Headphone
(S+N)/N = 26 dB
Network3
m = 0.3
AM Suppression4,5,6,7
Input IP34,8
Adjacent Channel Selectivity4
±200 kHz
—
45
—
dB
Alternate Channel Selectivity4
±400 kHz
—
60
—
dB
Audio Output Voltage5,6,7
—
72
—
mVRMS
Audio Mono S/N5,6,7,9,10
—
45
—
dB
Audio Frequency Response Low
–3 dB
—
—
30
Hz
Audio Frequency Response High
–3 dB
15
—
—
kHz
—
0.1
0.5
%
Audio THD6,5,11
Audio Output Load Resistance4,10
RL
Single-ended
10
—
—
k
Audio Output Load Capacitance4,10
CL
Single-ended
—
—
50
pF
—
—
110
ms
Powerup/Band Switch Time4
Notes:
1. Additional testing information is available in “AN569: Si4831/35/20/24-DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 98.1 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN555: Si483x-B/Si4820/24 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. Frequency is 64~109 MHz.
4. Guaranteed by characterization.
5. VEMF = 1 mV.
6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise.
7. f = 22.5 kHz.
8. |f2 – f1| > 2 MHz, f0 = 2 x f1 – f2.
9. BAF = 300 Hz to 15 kHz, A-weighted.
10. At AOUT pin.
11. f = 75 kHz.
6
Rev. 1.0
Si4820/24-A10
Table 5. AM/SW Receiver Characteristics1, 2
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
fRF
Medium Wave (AM)
504
—
1750
kHz
Short Wave (SW)
5.60
—
22.0
MHz
(S+N)/N = 26 dB
—
30
—
µV EMF
Large Signal Voltage Handling5
THD < 8%
—
300
—
mVRMS
Power Supply Rejection Ratio5
∆VDD = 100 mVRMS, 100 Hz
—
40
—
dB
Audio Output Voltage3,6
—
54
—
mVRMS
Audio S/N3,4,6
—
45
—
dB
Audio THD3,6
—
0.1
—
%
180
—
450
µH
—
—
110
ms
Input Frequency
Sensitivity3,4,5
Antenna Inductance5,7
From powerdown
Powerup/Band Switch Time5
Notes:
1. Additional testing information is available in “AN569: Si4831/35/20/24-DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 520 kHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN555: Si483x-B/Si4820/24 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter.
4. BAF = 300 Hz to 15 kHz, A-weighted.
5. Guaranteed by characterization.
6. VIN = 5 mVrms.
7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels.
Table 6. Reference Clock and Crystal Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
—
32.768
—
kHz
–100
—
100
ppm
Crystal Oscillator Frequency
—
32.768
—
kHz
Crystal Frequency Tolerance
–100
—
100
ppm
—
—
3.5
pF
Reference Clock
XTALI Supported Reference Clock
Frequencies
Reference Clock Frequency
Tolerance for XTALI
Crystal Oscillator
Board Capacitance
Rev. 1.0
7
Si4820/24-A10
Table 7. Thermal Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Thermal Resistance*
JA
—
80
—
°C/W
Ambient Temperature
TA
0
25
70
°C
Junction Temperature
TJ
—
—
77
°C
*Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad.
Table 8. Absolute Maximum Ratings1,2
Parameter
Symbol
Value
Unit
Supply Voltage
VDD
–0.5 to 5.8
V
Input Current3
IIN
10
mA
Operating Temperature
TOP
–40 to 95
C
Storage Temperature
TSTG
–55 to 150
C
0.4
VPK
RF Input Level
4
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2. The Si4820/24-A10 devices are high-performance RF integrated circuits with certain pins having an ESD rating of
< 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3. For input pins RST, VOL+, VOL–, XTALO, XTALI, BAND, TUNE2, TUNE1, LNA_EN.
4. At RF input pins, FMI and AMI.
8
Rev. 1.0
Si4820/24-A10
2. Typical Application Schematic
TUNE1
R3
143k
SW
TUNE1
2.5k/100M
B1
FMI
S2
VR1
100k
BAND
1
2
3
AM
R6
110k
1
FM
LNA_EN
2
NC
3
TUNE1
4
BAND
5
BAND
R4
180k
TUNE2
7
6
NC
NC
9
10
8
FMI
RFGND
AMI
12
0.47u
11
AMI
NC
C5
NC
ANT1
AM antenna
4
R5
67k
C5
U1
AOUT
24
NC
DBYP
23
22
VDD2
VDD1
21
20
XTAL0
XTALI
19
18
VOL17
16
RST
15
GND
GND
14
13
RFGND
T1
VOL+
AMI
0.47u
ANT2
AOUT
C4
Optional: AM air loop antenna
VDD
0.1u
VDD
R1
VDD
100k
C1
0.1u
2.0 TO 3.6V
2.0 TO 3.6V
Y1
32.768KHz
C3
22p
C2
22p
Optional
Notes:
1. Place C4 close to VDD2 and DBYP pins.
2. All grounds connect directly to GND plane on PCB.
3. Pin 6, pin 7, and pin 23 leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in "AN555: Si483x-B/Si4820/24 Antenna,
Schematic, Layout, and Design Guidelines." Silicon Labs will evaluate the schematics and layouts for qualified
customers.
5. Pin 8 connects to the FM antenna interface and pin 12 connects to the AM antenna interface.
6. Place Si4820/24 as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.
7. Recommend keeping the AM ferrite loop antenna at least 5 cm away from the tuner chip.
8. Keep the AM ferrite loop antenna at least 5 cm away from MCU, audio AMP, and other circuits which have AM
interference.
9. Place the transformer T1 away from any sources of interference and even away from the I/O signals of the Si4820/24.
Rev. 1.0
9
Si4820/24-A10
3. Bill of Materials
Table 9. Si4820/24-A Bill of Materials
Component(s)
Value/Description
Supplier
C1
Reset capacitor 0.1 µF, ±20%, Z5U/X7R
Murata
C4
Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R
Murata
C5
Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R
Murata
B1
Ferrite bead 2.5 k/100 MHz
Murata
Variable resistor (POT), 100 k, ±10%
Kennon
R1
Reset timing resistor, 100 k, ±5%
Venkel
R3
Resistor, 143 k, ±1%,
Venkel
R4
Resistor, 180 k, ±1%
Venkel
R5
Resistor, 67 k, ±1%
Venkel
R6
Resistor,110 k, ±1%
Venkel
U1
Si4820/24-A AM/FM/SW Analog Tune Analog Display Radio Tuner
S2
Band switch
VR1
ANT1
Silicon
Laboratories
Any, depends on
customer
Ferrite stick,180-450 μH
Jiaxin
Optional Components
C2, C3
Y1
ANT2
10
Crystal load capacitors, 22 pF, ±5%, COG
(Optional: for crystal oscillator option)
32.768 kHz crystal (Optional: for crystal oscillator option)
Air loop antenna, 10-20 μH
Venkel
Epson or
equivalent
Various
Rev. 1.0
Si4820/24-A10
4. Functional Description
Si4820/24
Si4830/34
ADC
AMI
AM
ANT
RFGND
LNA
DSP
DAC
AOUT
ADC
FM
ANT
FMI
AGC
0/90
TUNE1/2
ADC
AFC
CONTROL INTERFACE
BAND
2.0~3.6V VDD1/2
XTAL
OSC
LNA_EN
REG
RST
XTALI
Figure 2. Si4820/24-A10 Functional Block Diagram
4.1. Overview
4.2. FM Receiver
The Si4820/24-A10 is the entry level mechanical-tuned
digital CMOS AM/FM/SW radio receiver IC that
integrates the complete receiver function from antenna
input to audio output. The Si4820/24-A10 extends
Silicon Laboratories multi-band tuner family, and further
increases the ease and attractiveness of design radio
reception to audio devices through small size and board
area, minimum component count, and superior, proven
performance. The Si4820/24-A10 is drop-in replaceable
to the existing Si4831/35 tuner, requires a simple
application circuit, and removes any requirements for
manually tuning components during the manufacturing
process. It is a very simple product to design,
manufacture, and support across multiple product lines.
The Si4820/24-A10 integrates a low noise amplifier
(LNA) supporting the worldwide FM broadcast band (64
to 109 MHz).
Pre-emphasis and de-emphasis is a technique used by
FM broadcasters to improve the signal-to-noise ratio of
FM receivers by reducing the effects of high frequency
interference and noise. When the FM signal is
transmitted, a pre-emphasis filter is applied to
accentuate the high audio frequencies. All FM receivers
incorporate a de-emphasis filter which attenuates high
frequencies to restore a flat frequency response. Two
time constants are used in various regions. The deemphasis time constant can be chosen to be 50 or
75 µs.
Leveraging Silicon Laboratories' proven and patented
digital low intermediate frequency (low-IF) receiver
architecture, the Si4820/24-A10 delivers desired RF
performance and interference rejection in AM, FM, and
SW bands. The high integration and complete system
production test simplifies design-in, increases system
quality, and improves manufacturability.
Rev. 1.0
11
Si4820/24-A10
4.3. AM Receiver
4.5. Frequency Tuning
The highly integrated Si4820/24-A10 supports
worldwide AM band reception from 504 to 1750 kHz
with five sub-bands using a digital low-IF architecture
with a minimum number of external components and no
manual alignment required. This patented architecture
allows for high-precision filtering, offering excellent
selectivity and SNR with minimum variation across the
AM band. Similar to the FM receiver, the Si4820/24-A10
optimizes sensitivity and rejection of strong interferers,
allowing better reception of weak stations.
A valid channel can be found by tuning the
potentiometer that is connected to the TUNE1 and
TUNE2 pin of the Si4820/24-A10 chip.
To offer maximum flexibility, the receiver supports a
wide range of ferrite loop sticks from 180–450 µH. An
air loop antenna is supported by using a transformer to
increase the effective inductance from the air loop.
Using a 1:5 turn ratio inductor, the inductance is
increased by 25 times and easily supports all typical AM
air loop antennas, which generally vary between 10 and
20 µH.
4.4. SW Receiver
The Si4824 supports 16 short wave (SW) band
receptions from 5.60 to 22.0 MHz. Si4824 supports
extensive short wave features such as minimal discrete
components and no factory adjustments. The Si4824
supports using the FM antenna to capture short wave
signals.
12
To offer easy tuning, the Si4820/24-A10 also supports a
station LED light. It will light up the LED if the RF signal
quality passes the LED sensitivity threshold when tuned
to a valid station.
4.6. Band Select
The Si4820/24-A10 supports worldwide AM band with
five sub-bands, US/Europe/Japan/China FM band with
five sub-bands, and SW band with 16 sub-bands. For
details on band selection, refer to “AN555: Si483xB/Si4820/24 Antenna, Schematic, Layout, and Design
Guidelines."
4.7. Volume Control
The Si4820/24-A10 not only allows customers to use
the traditional PVR wheel volume control through an
external speaker amplifier, it also supports direct digital
volume control through pins 16 and pin 17 by using
volume up and down buttons. Refer to "AN555: Si483xB/Si4820/24 Antenna, Schematic, Layout, and Design
Guidelines."
Rev. 1.0
Si4820/24-A10
5. Pin Descriptions: Si4820/24-A10
LNA_EN
1
24
AOUT
NC
2
23
NC
TUNE1
3
22
DBYP
TUNE2
4
21
VDD2
BAND
5
20
VDD1
NC
6
19
XTALI
NC
7
18
XTALO
FMI
8
17
VOL-
RFGND
9
16
VOL+
NC
10
15
RST
NC
11
14
GND
AMI
12
13
GND
Pin Number(s)
Name
1
LNA_EN
Description
Enable SW external LNA for Si4824
2
NC
3
TUNE1
Frequency tuning
No connect
4
TUNE2
Frequency tuning
5
BAND
Band selection and de-emphasis selection
6,7
NC
No connect. Leave floating.
8
FMI
FM RF inputs. FMI should be connected to the antenna trace.
9
RFGND
10,11
NC
Unused. Tie these pins to GND.
12
AMI
AM RF input. AMI should be connected to the AM antenna.
13,14
GND
Ground. Connect to ground plane on PCB.
RF ground. Connect to ground plane on PCB.
15
RST
Device reset (active low) input
16
VOL+
Volume button up
17
VOL–
Volume button down
18
XTALO
Crystal oscillator output
19
XTALI
Crystal oscillator input
20
VDD1
Supply voltage. May be connected directly to battery.
21
VDD2
Supply voltage. May be connected directly to battery.
22
DBYP
Dedicated bypass for VDD
23
NC
No connect. Leave floating
24
AOUT
Audio output
Rev. 1.0
13
Si4820/24-A10
6. Ordering Guide
Part Number1,2
Description
Package
Type
Operating
Temperature/Voltage
Si4820-A10-CU
AM/FM Broadcast Radio Receiver
24L SSOP
Pb-free
0 to 70 °C
2.0 to 3.6 V
Si4824-A10-CU
AM/FM/SW Broadcast Radio Receiver
24L SSOP
Pb-free
0 to 70 °C
2.0 to 3.6 V
Notes:
1. Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at
25 °C with degraded specifications for VDD voltage ramped down to 2.0 V.
2. The -C suffix in the part number indicates Consumer Grade product. Please visit www.silabs.com to get more
information on product grade specifications.
14
Rev. 1.0
Si4820/24-A10
7. Package Outline: Si4820/24-A10
The 24-pin SSOP illustrates the package details for the Si4820/24-A10. Table 10 lists the values for the dimensions
shown in the illustration.
Figure 3. 24-Pin SSOP
Table 10. Package Dimensions
Dimension
A
A1
b
c
D
E
E1
e
L
θ
aaa
bbb
ccc
ddd
Min
—
0.10
0.20
0.10
Nom
—
—
—
—
8.65 BSC
6.00 BSC
3.90 BSC
0.635 BSC
—
—
0.20
0.18
0.10
0.10
0.40
0°
Max
1.75
0.25
0.30
0.25
1.27
8°
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-137, Variation AE.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
Rev. 1.0
15
Si4820/24-A10
8. PCB Land Pattern: Si4820/24-A10
Figure 4, “PCB Land Pattern,” illustrates the PCB land pattern details for the Si4820/24-A10-CU SSOP. Table 11
lists the values for the dimensions shown in the illustration.
Figure 4. PCB Land Pattern
Table 11. PCB Land Pattern Dimensions
Dimension
Min
C
5.20
E
Max
5.40
0.635 BSC
X1
0.35
0.45
Y1
1.55
1.75
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut, and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
16
Rev. 1.0
Si4820/24-A10
9. Top Marking
9.1. Si4820/24-A10 Top Marking
4820A10CU
YYWWTTTTTT
4824A10CU
YYWWTTTTTT
9.2. Top Marking Explanation
Mark Method:
YAG Laser
Line 1 Marking:
Device identifier
Line 2 Marking:
YY = Year
WW = Work week
Assigned by the Assembly House.
TTTTTT = Manufacturing code
4820A10CU = Si4820-A10
4824A10CU = Si4824-A10
Rev. 1.0
17
Si4820/24-A10
10. Additional Reference Resources
Contact your local sales representatives for more information or to obtain copies of the following references:
AN555: Si483x-B/Si4820/24 Antenna, Schematic, Layout, and Design Guidelines
AN569: Si4831/35/20/24-DEMO Board Test Procedure
 Si4820/24-DEMO Board User’s Guide


18
Rev. 1.0
Si4820/24-A10
NOTES:
Rev. 1.0
19
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