Si 4 8 2 7 - A10 B ROADCAST A N A L O G TUNING D IGITAL D ISPLAY AM/FM/SW R ADIO R ECEIVER Features Worldwide FM band support (64–109 MHz) Worldwide AM band support (504–1750 kHz) SW band support (2.3–28.5 MHz) Selectable support for all AM/FM/SW regional bands Enhanced FM/SW band coverage 2-wire control interface Mono output Valid station indicator Digital volume support Bass/Treble support Minimal BOM components with no manual alignment Excellent real-world performance China TV channels audio carrier reception in FM band 2.0 to 3.6 V supply voltage Wide range of ferrite loop sticks and air loop antenna support 16-pin SOIC package RoHS compliant Not EN55020 compliant * *Note: For consumer applications that require EN 55020 compliance, use Si4844-B. Ordering Information: See page 19. Pin Assignments Applications Si4827-A10 (SOIC) Table and portable radios Boom boxes Clock radios Modules for consumer electronics Toys, lamps, and any application needing an AM/FM/SW radio Description 1 16 AOUT 2 15 GND 3 14 VDD 4 13 XTALI NC 5 12 XTALO/LNA_EN FMI 6 11 SCLK RFGND 7 10 SDIO 8 9 RST IRQ TUNE1 TUNE2 BAND The Si4827 is an entry level analog-tuned digital-display digital CMOS AM/FM/SW radio receiver IC that integrates the complete receiver function from antenna input to audio output. Working with Host MCU (I2C-compatible 2-wire control interface), frequencies information can be displayed on LCD while the analog-tune features are kept. The Si4827 enhances the FM and SW band coverage, and further supports China TV channels audio reception in FM band. The superior control algorithm integrated in the Si4827 provides an easy and reliable control interface while eliminating all the manual tuned external components used in traditional solutions. Functional Block Diagram Si4827 Si4830/34 ADC AMI AM ANT RFGND LNA DSP DAC AMI This product, its features, and/or its architecture is covered by one or more of the following patents, as well as other patents, pending and issued, both foreign and domestic: 7,127,217; 7,272,373; 7,272,375; 7,321,324; 7,355,476; 7,426,376; 7,471,940; 7,339,503; 7,339,504. AOUT ADC FM ANT AGC FMI 0/90 TUNE1/2 ADC CONTROL INTERFACE BAND XTAL OSC IRQ REG Rev. 1.0 5/13 RST VDD SDIO 2.0~3.6V AFC SCLK XTALI Copyright © 2013 by Silicon Laboratories Si4827-A10 Si4827-A10 2 Rev. 1.0 Si4827-A10 TABLE O F C ONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4.7. Bass and Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 4.8. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.9. High Fidelity DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.10. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.11. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.12. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.13. Memorizing Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.14. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6. Pin Descriptions: Si4827-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8. Package Outline: Si4827-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9. PCB Land Pattern: Si4827-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.1. Si4827-A10 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 11. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Rev. 1.0 3 Si4827-A10 1. Electrical Specifications Table 1. Recommended Operating Conditions1,2 Parameter Supply Voltage Symbol 3 Power Supply Powerup Rise Time Ambient Temperature Range Test Condition Min Typ Max Unit VDD 2.0 — 3.6 V VDDRISE 10 — — µs TA 0 25 70 °C Notes: 1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated. 2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for minimum VDD = 2.7 V. 3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part initialization may become unresponsive below 2.3 V. Table 2. DC Characteristics (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit IFM — 21.0 — mA IAM — 20.0 — mA IDDPD — 10 — µA FM Mode Supply Current* AM/SW Mode Supply Current* Supplies and Interface VDD Powerdown Current *Note: Specifications are guaranteed by characterization. 4 Rev. 1.0 Si4827-A10 Table 3. Reset Timing Characteristics (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Min Typ Max Unit RSTB Pulse Width tPRST 100 — — µs 2-wire Bus Idle Time After RSTB Rises tSDIO 100 — — µs 2-wire Bus Idle Time Before RSTB Rises, and VDD Valid Time Before RSTB Rises tSRST 100 — — µs RSTB Low Time Before VDD Becomes Invalid tRRST 0 — — µs Notes: 1. RSTB must be held low for at least 100 µs after the voltage supply has been ramped up. 2. RSTB needs to be asserted (pulled low) prior to the supply voltage being ramped down. tSRST VDD tPRST tSDIO tRRST tSDIO RSTB SCLK POWER_UP Normal Operation POWER_UP Normal Operation SDIO Figure 1. Reset Timing Rev. 1.0 5 Si4827-A10 Table 4. 2-Wire Control Interface Characteristics1,2,3 (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit SCLK Frequency fSCLK 0 — 400 kHz SCLK Low Time tLOW 1.3 — — µs SCLK High Time tHIGH 0.6 — — µs SCLK Input to SDIO Setup (START) tSU:STA 0.6 — — µs SCLK Input to SDIO Hold (START) tHD:STA 0.6 — — µs SDIO Input to SCLK Setup tSU:DAT 100 — — ns SDIO Input to SCLK Hold4,5 tHD:DAT 0 — 900 ns SCLK input to SDIO Setup (STOP) tSU:STO 0.6 — — µs STOP to START Time tBUF 1.3 — — µs SDIO Output Fall Time tf:OUT — 250 ns — 300 ns Cb 20 + 0.1 ----------1pF SDIO Input, SCLK Rise/Fall Time tf:IN tr:IN Cb 20 + 0.1 ----------1pF SCLK, SDIO Capacitive Loading Cb — — 50 pF Input Filter Pulse Suppression tSP — — 50 ns Notes: 1. When VD = 0 V, SCLK and SDIO are low impedance. 2. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is high) does not occur within 300 ns before the rising edge of RST. 3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. 4. The Si4827 delays SDIO by a minimum of 300 ns from the VIH threshold of SCLK to comply with the minimum tHD:DAT specification. 5. The maximum tHD:DAT has only to be met when fSCLK = 400 kHz. At frequencies below 400 kHz, tHD:DAT may be violated as long as all other timing parameters are met. 6 Rev. 1.0 Si4827-A10 SCLK SDIO tSU:STA tHD:STA tLOW START tr:IN tHIGH tr:IN tf:IN tSP tSU:STO tBUF 70% 30% 70% 30% tf:IN, tf:OUT tHD:DAT tSU:DAT STOP START Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, R/W SDIO START ADDRESS + R/W D7-D0 ACK DATA D7-D0 ACK DATA ACK STOP Figure 3. 2-Wire Control Interface Read and Write Timing Diagram Rev. 1.0 7 Si4827-A10 Table 5. FM Receiver Characteristics1,2 (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Min Typ Max Unit 64 — 109 MHz — 4.0 — µV EMF LNA Input Resistance4,5 — 4 — k LNA Input Capacitance4,5 — 5 — pF — 50 — dB — 105 — dBµV EMF Input Frequency Symbol fRF Sensitivity with Headphone Network Test Condition (S+N)/N = 26 dB 3 m = 0.3 AM Suppression4,5,6,7 Input IP34,8 Adjacent Channel Selectivity4 ±200 kHz — 45 — dB Alternate Channel Selectivity4 ±400 kHz — 60 — dB Audio Output Voltage5,6,7,12 — 72 — mVRMS Audio Mono S/N5,6,7,9,10 — 45 — dB Audio Frequency Response Low4 –3 dB — — 30 Hz Audio Frequency Response High4 –3 dB 15 — — kHz — 0.1 0.5 % Audio THD5,6,11 Audio Output Load Resistance4,10 RL Single-ended 10 — — k Audio Output Load Capacitance4,10 CL Single-ended — — 50 pF Notes: 1. Additional testing information is available in “AN603: Si4822/26/27/40/44-DEMO Board Test Procedure” Volume = maximum for all tests. Tested at RF = 98.1 MHz. 2. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. 3. Frequency is 64~109 MHz. 4. Guaranteed by characterization. 5. VEMF = 1 mV. 6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise. 7. f = 22.5 kHz. 8. |f2 – f1| > 2 MHz, f0 = 2 x f1 – f2. 9. BAF = 300 Hz to 15 kHz, A-weighted. 10. At AOUT pin. 11. f = 75 kHz. 12. Tested in Digital Volume Mode. 8 Rev. 1.0 Si4827-A10 Table 6. AM/SW Receiver Characteristics1, 2 (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit fRF Medium Wave (AM) 504 — 1750 kHz Short Wave (SW) 2.3 — 28.5 MHz (S+N)/N = 26 dB — 30 — µV EMF Large Signal Voltage Handling5 THD < 8% — 300 — mVRMS Power Supply Rejection Ratio5 ∆VDD = 100 mVRMS, 100 Hz — 40 — dB Audio Output Voltage3,6,8 — 54 — mVRMS Audio S/N3,4,6 — 45 — dB Audio THD3,6 — 0.1 — % 180 — 450 µH Input Frequency Sensitivity3,4,5 Antenna Inductance5,7 Notes: 1. Additional testing information is available in “AN603: Si4822/26/27/40/44 DEMO Board Test Procedure.” Volume = maximum for all tests. Tested at RF = 6 MHz. 2. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. 3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter. 4. BAF = 300 Hz to 15 kHz, A-weighted. 5. Guaranteed by characterization. 6. VIN = 5 mVrms. 7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels. 8. Tested in Digital Volume Mode. Table 7. Reference Clock and Crystal Characteristics (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit 31.130 32.768 40,000 kHz –100 — 100 ppm 1 — 4095 31.130 32.768 34.406 kHz Crystal Oscillator Frequency — 32.768 — kHz Crystal Frequency Tolerance –100 — 100 ppm — — 3.5 pF Reference Clock XTALI Supported Reference Clock Frequencies* Reference Clock Frequency Tolerance for XTALI REFCLK_PRESCALE REFCLK Crystal Oscillator Board Capacitance *Note: The Si4827-A10 divides the RCLK input by REFCLK_PRESCALE to obtain REFCLK. There are some RCLK frequencies between 31.130 kHz and 40 MHz that are not supported. For more details, see Table 9 of "AN610: Si48xx ATDD Programming Guide.” Rev. 1.0 9 Si4827-A10 Table 8. Thermal Conditions Parameter Symbol Min Typ Max Unit Thermal Resistance* JA — 80 — °C/W Ambient Temperature TA 0 25 70 °C Junction Temperature TJ — — 77 °C *Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad. Table 9. Absolute Maximum Ratings1,2 Parameter Symbol Value Unit VDD –0.5 to 5.8 V IIN 10 mA Operating Temperature TOP –40 to 95 °C Storage Temperature TSTG –55 to 150 °C 0.4 VPK Supply Voltage Input Current3 RF Input Level4 Notes: 1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. The Si4827-A10 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations. 3. For input pins RST, SDIO, SCLK, XTALO/LNA_EN, XTALI, BAND, TUNE2, TUNE1 and IRQ. 4. At RF input pins, FMI, and AMI. 10 Rev. 1.0 Si4827-A10 2. Typical Application Schematic TUNE1 R1 203k 1% TUNE1 SW B1 2.5k/100M FMI R2 50k 1% S1 VR1 100k BAND 1 2 3 AM ANT1 AM antenna 4 IRQ C5 R3 180k 1% To host MCU 2 3 4 U1 R4 67k 1% AOUT Optional 16 GND 15 5 1 IRQ TUNE1 TUNE2 BAND XTALI VDD 14 11 RSTB 9 T1 10 RFGND SDIO AMI 0.47u ANT2 13 6 NC XTALO/LNA_EN C5 12 FMI SCLK 8 AMI GND 7 FM 0.47u AOUT C1 0.1u Optional: AM air loop antenna C4 0.1u To host MCU RESET SDIO VDD 2.0 TO 3.6V SCLK Y1 32.768KHz C3 22p C2 22p Optional Notes: 1. Place C4 close to VDD and GND pins. 2. All grounds connect directly to GND plane on PCB. 3. Pin 5 leave floating. 4. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines.” Silicon Labs will evaluate the schematics and layouts for qualified customers. 5. Pin 6 connects to the FM antenna interface and pin 8 connects to the AM antenna interface. 6. Place Si4827 as close as possible to antenna jack and keep the FMI and AMI traces as short as possible. 7. Recommend keeping the AM ferrite loop antenna at least 5 cm away from the Si4827. 8. Keep the AM ferrite loop antenna away from MCU, audio amplifier, and other circuits which have AM interference. 9. Place the transformer T1 away from any sources of interference and even away from the I/O signals of the Si4827. Rev. 1.0 11 Si4827-A10 3. Bill of Materials Table 10. Si4827-A10 Bill of Materials Component(s) Value/Description Supplier C1 Reset capacitor 0.1 µF, ±20%, Z5U/X7R Murata C4 Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R Murata C5 Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R Murata B1 Ferrite bead 2.5 k/100 MHz Murata Variable resistor (POT), 100 k, ±10% Kennon VR1 U1 ANT1 Si4827-A AM/FM/SW Analog Tune Digital Display Radio Tuner Ferrite stick,180–450 μH Silicon Laboratories Jiaxin Optional Components C2, C3 Y1 ANT2 12 Crystal load capacitors, 22 pF, ±5%, COG (Optional: for crystal oscillator option) 32.768 kHz crystal (Optional: for crystal oscillator option) Air loop antenna, 10–20 μH Venkel Epson or equivalent Various S1 Band switch Any, depends on customer R1 Resistor, 203 k Venkel R2 Resistor, 50 k, ±1%, Venkel R3 Resistor, 180 k, ±1% Venkel R4 Resistor, 67 k, ±1% Venkel Rev. 1.0 Si4827-A10 4. Functional Description Si4827 Si4830/34 ADC AMI AM ANT RFGND LNA DSP DAC AOUT ADC FM ANT FMI AGC 0/90 TUNE1/2 ADC BAND XTAL OSC IRQ REG RST VDD SDIO 2.0~3.6V CONTROL INTERFACE SCLK XTALI AFC Figure 4. Si4827-A10 Functional Block Diagram 4.1. Overview The Si4827-A10 is the entry level analog-tuned digitaldisplay digital CMOS AM/FM/SW radio receiver IC that integrates the complete receiver function from antenna input to audio output. Working with an external MCU with LCD/LED driver, Si4827 can output the AM/FM/SW frequencies and band and volume information to display on LCD/LED, while using a simple potentiometer at the front end for analog-tune. Leveraging Silicon Laboratories' proven and patented digital low intermediate frequency (low-IF) receiver architecture, the Si4827 delivers superior RF performance and interference rejection in AM, FM and SW bands. Additionally, the digital core provides advanced audio conditioning for all environments, removing pops, clicks, and loud static in variable signal conditions. The superior control algorithm integrated in Si4827 provides easy and reliable control interface while eliminating all the manual tuned external components used in traditional solutions. Like other successful audio products from Silicon Labs, Si4827 offers unmatched integration and PCB space savings with minimum external components and a small board area on a single side PCB. The high integration and complete system production test simplifies designin, increases system quality, and improves manufacturability. The receiver has very low power consumption, runs off two AAA batteries, and delivers the performance benefits of high performance digital radio experience with digital display to the legacy analog-tuned radio market. The Si4827 provides good flexibility in using the chip. The frequency range of FM/AM/SW bands, deemphasis value, AM tuning step, and AM soft mute level/rate can be either configured by the MCU or by using external hardware to make a selection. The reference clock of the FM tuner can be provided by either the crystal or by the host MCU within tolerance. The Si4827 also has flexibility in selecting bands and configuring band properties, enabling masked Host MCU for multiple projects, and reducing the cost of development. Four tuning preferences are available to meet different tuning preference requirements. Rev. 1.0 13 Si4827-A10 4.2. FM Receiver 4.4. SW Receiver The Si4827-A10 integrates a low noise amplifier (LNA) supporting the worldwide FM broadcast band (64 to 109 MHz) and the TV audio stations within the frequency range in China area are also supported. The FM band can also be configured to be wider range such as 64–108 MHz in one band. The Si4827 supports short wave band receptions from 2.3 to 28.5 MHz in 5 kHz step size increments. It can also be configured to have wide SW band that can be used in SW radio with 1 or 2 SW bands. The Si4827 supports extensive short wave features such as minimal discrete components and no factory adjustments. The Si4827 supports using the FM antenna to capture short wave signals. Refer to “AN610: Si48xx ATDD Programming Guide” and "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines" for more details. Pre-emphasis and de-emphasis is a technique used by FM broadcasters to improve the signal-to-noise ratio of FM receivers by reducing the effects of high frequency interference and noise. When the FM signal is transmitted, a pre-emphasis filter is applied to accentuate the high audio frequencies. All FM receivers incorporate a de-emphasis filter which attenuates high frequencies to restore a flat frequency response. Two time constants are used in various regions. The deemphasis time constant can be chosen to be 50 or 75 μs. Refer to "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines." 4.3. AM Receiver The highly integrated Si4827-A10 supports worldwide AM band reception from 504 to 1750 kHz with five subbands using a digital low-IF architecture with a minimum number of external components and no manual alignment required. This patented architecture allows for high-precision filtering, offering excellent selectivity and SNR with minimum variation across the AM band. Similar to the FM receiver, the Si4827-A10 optimizes sensitivity and rejection of strong interferers, allowing better reception of weak stations. To offer maximum flexibility, the receiver supports a wide range of ferrite loop sticks from 180–450 μH. An air loop antenna is supported by using a transformer to increase the effective inductance from the air loop. Using a 1:5 turn ratio inductor, the inductance is increased by 25 times and easily supports all typical AM air loop antennas, which generally vary between 10 and 4.5. Frequency Tuning A valid channel can be found by tuning the potentiometer that is connected to the TUNE1 and TUNE2 pin of the Si4827-A10 chip. To offer easy tuning, the Si4827-A10 also outputs the tuned information to the MCU with LCD/LED driver to display. It will light up the icon on display if the RF signal quality passes a certain threshold when tuned to a valid station. Refer to "AN610: Si48xx ATDD Programming Guide" for more details. 4.6. Band Select The Si4827-A10 supports worldwide AM band with five sub-bands, US/Europe/Japan/China FM band with five sub-bands, and SW band with 16 sub-bands. Si4827A10 provides the flexibility to configure the band and band properties at either the MCU side or the tuner side, enabling masked MCU for multiple projects. For details on band selection, refer to "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines" and "AN610: Si48xx ATDD Programming Guide". 20 μH. A 9, 10 kHz tuning step can be chosen by the external resistor or host MCU according to the different regions, and AM soft mute level can be programmed by the host MCU to have different tuning experiences. One of the AM bands can be configured as a universal AM band that simultaneously supports 9 kHz and 10 kHz channel spaces for all regional AM standards. Refer to “AN610: Si48xx ATDD Programming Guide” and "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines" for more details. 14 Rev. 1.0 Si4827-A10 4.7. Bass and Treble 4.12. Reset, Powerup, and Powerdown The Si4827-A10 supports Bass/Treble tone control for superior sound quality. The Si4827-A10 can be set to be default normal, or programmed by the host MCU I2Ccompatible 2-wire mode. FM has nine levels Bass/Treble effect and AM/SW has seven levels Bass/Treble effect. For further configuration details, refer to "AN610: Si48xx ATDD Programming Guide". Setting the RSTB pin low will disable analog and digital circuitry, reset the registers to their default settings, and disable the bus. Setting the RSTB pin high will bring the device out of reset. 4.8. Volume Control The Si4827-A10 not only allows users to use the traditional PVR wheel volume control through an external speaker amplifier, it also supports digital volume control programmed by the host MCU. Si4827A10 can be programmed to be Bass/Treble mode only or digital volume mode only; it can also be programmed to have the digital volume coexist with Bass/Treble in two modes. Refer to "AN610: Si48xx ATDD Programming Guide" and "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines" for more details. 4.9. High Fidelity DAC High-fidelity digital-to-analog converters (DACs) drive analog audio signals onto the AOUT pin. The audio output may be muted. 4.10. Soft Mute The soft mute feature is available to attenuate the audio outputs and minimize audible noise in very weak signal conditions. Advanced algorithm is implemented to get a better analog tuning experience. The soft mute feature is triggered by the SNR metric. The SNR threshold for activating soft mute is programmable, as are soft mute attenuation levels and attack and decay rates. 4.11. Reference Clock The Si4827-A10 supports RCLK input (to XTALI pin) with the spec listed in Table 7. It can be shared with the host MCU to save extra crystal. An onboard crystal oscillator is available to generate the 32.768 kHz reference when an external crystal and load capacitors are provided. Refer to "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines" for more details. Figure 1 shows typical reset, startup, and shutdown timings for the Si4827. RSTB must be held low (asserted) during any power supply transitions and kept asserted as specified in Figure 1 after the power supplies are ramped up and stable. Failure to assert RSTB as indicated here may cause the device to malfunction and may result in permanent device damage. A powerdown mode is available to reduce power consumption when the part is idle. Putting the device in powerdown mode will disable analog and digital circuitry while keeping the bus active. 4.13. Memorizing Status The Si4827-A10 provides the feature to memorize status from the last power down with a simple design on PCB, including frequency of the FM/AM/SW station. Refer to "AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines" for details. 4.14. Programming with Commands To ease development time and offer maximum customization, the Si4827 provides a simple yet powerful software interface to program the receiver. The device is programmed using commands, arguments, properties, and responses. To perform an action, the user writes a command byte and associated arguments, causing the chip to execute the given command. Commands control an action such as powerup the device, shut down the device, or get the current tuned frequency. Arguments are specific to a given command and are used to modify the command. Properties are a special command argument used to modify the default chip operation and are generally configured immediately after powerup. Examples of properties are de-emphasis level and soft mute attenuation threshold. Responses provide the user information and are echoed after a command and associated arguments are issued. All commands provide a 1-byte status update, indicating interrupt and clear-to-send status information. For a detailed description of the commands and properties for the Si4827, see "AN610: Si48xx ATDD Programming Guide". Rev. 1.0 15 Si4827-A10 5. Commands and Properties Table 11. Si4827-A10 FM Receiver Command Summary Cmd Name Description 0xE0 ATDD_GET_STATUS 0xE1 ATDD_POWER_UP 0xE2 ATDD_AUDIO_MODE 0x10 GET_REV 0x11 POWER_DOWN Power down device. 0x12 SET_PROPERTY Sets the value of a property. 0x13 GET_PROPERTY Retrieve a property's value. Get tune freq, band and etc., status of the device. Power up device, band selection, and band properties setup. Audio output mode: get/set audio mode and settings. Returns the revision information of the device. Note: The Si4827 has its own power up and get status commands which are different from previous si47xx tuner parts. To differentiate, we use "ATDD_POWER_UP" and ATDD_GET_STATUS to denote the ATDD specific commands instead of the general si47xx "POWER_UP" and "STATUS" commands. Table 12. Si4827-A10 FM Receiver Property Summary Prop Name 0x0201 REFCLK_FREQ 0x0202 REFCLK_PRESCALE 0x1100 FM_DEEMPHASIS 0x1300 FM_SOFT_MUTE_RATE 0x1301 FM_SOFT_MUTE_ MAX_ATTENUATION 0x1303 FM_SOFT_MUTE_ SNR_THRESHOLD 0x4000 RX_VOLUME 0x4001 RX_HARD_MUTE 0x4002 RX_BASS_TREBLE 0x4003 RX_ACTUAL_VOLUME Default Sets frequency of reference clock in Hz. The range is 31130 to 34406 Hz, or 0 to disable the AFC. Default is 32768 Hz. 0x8000 Sets the prescaler value for RCLK input. 0x0001 Sets deemphasis time constant. Default is 75 μs. 0x0002 Sets the attack and decay rates when entering and leaving soft mute. 0x0040 FM_SOFT_MUTE_SLOPE Configures attenuation slope during soft mute in dB attenuation per dB SNR below the soft mute SNR threshold. Default value is 2. 0x1302 16 Description 0x0002 Sets maximum attenuation during soft mute (dB). Set to 0 to disable soft mute. Default is 16 dB. 0x0010 Sets SNR threshold to engage soft mute. Default is 4 dB. 0x0004 Sets the output volume. 0x003F Mutes the audio output. L and R audio outputs may be muted independently. 0x0000 Sets the output bass/treble level. 0x0004 Read the actual output volume. 0x003F Rev. 1.0 Si4827-A10 Table 13. Si4827-A10 AM/SW Receiver Command Summary Cmd Name Description 0xE0 ATDD_GET_STATUS 0xE1 ATDD_POWER_UP 0xE2 ATDD_AUDIO_MODE 0x10 GET_REV 0x11 POWER_DOWN Power down device. 0x12 SET_PROPERTY Sets the value of a property. 0x13 GET_PROPERTY Retrieve a property's value. Get tune freq, band and etc status of the device Power up device, band selection, and band properties setup Audio output mode: get/set audio mode settings. Returns the revision information of the device. Note: The Si4827 has its own power up and get status commands which are different from previous si47xx tuner parts. To differentiate, we use "ATDD_POWER_UP" and ATDD_GET_STATUS to denote the ATDD specific commands instead of the general Si47xx "POWER_UP" and "STATUS" commands. Table 14. Si4827-A10 AM/SW Receiver Property Summary Prop Name 0x0201 REFCLK_FREQ 0x0202 REFCLK_PRESCALE 0x4000 RX_VOLUME 0x4001 RX_HARD_MUTE 0x4002 RX_BASS_TREBLE 0x4003 RX_ACTUAL_VOLUME 0x3300 AM_SOFT_MUTE_RATE 0x3301 Description Sets frequency of reference clock in Hz. The range is 31130 to 34406 Hz, or 0 to disable the AFC. Default is 32768 Hz. 0x8000 Sets the prescaler value for RCLK input. 0x0001 Sets the output volume. 0x003F Mutes the audio output. L and R audio outputs may be muted independently. 0x0000 Sets the output bass/treble level. 0x0003 Read the actual output volume. 0x003F Sets the attack and decay rates when entering and leaving soft mute. 0x0040 AM_SOFT_MUTE_SLOPE Configures attenuation slope during soft mute in dB attenuation per dB SNR below the soft mute SNR threshold. 0x3302 AM_SOFT_MUTE_ MAX_ATTENUATION 0x3303 AM_SOFT_MUTE_ SNR_THRESHOLD Default 0x0002., Sets maximum attenuation during soft mute (dB). Set to 0 to disable soft mute. 0x0010 Sets SNR threshold to engage soft mute. 0x0008 Rev. 1.0 17 Si4827-A10 6. Pin Descriptions: Si4827-A10 1 16 AOUT 2 15 GND 3 14 VDD 4 13 XTALI NC 5 12 XTALO/LNA_EN FMI 6 11 SCLK RFGND 7 10 SDIO 8 9 RST IRQ TUNE1 TUNE2 BAND AMI Pin Number(s) Name 1 IRQ Interrupt request. 2 TUNE1 Frequency tuning. 3 TUNE2 Frequency tuning. 4 BAND Band selection and de-emphasis selection. 5 NC No connect. Leave floating. 6 FMI FM RF inputs. FMI should be connected to the antenna trace. 7 RFGND 8 AMI AM RF input. AMI should be connected to the AM antenna. 9 RST Device reset (active low) input. 10, SDIO Serial data input/output. 11 SCLK Serial clock input. 12 18 Description RF ground. Connect to ground plane on PCB. XTALO/LNA_EN Crystal oscillator output, enable the SW external LNA in SW mode when not used as XTALO. 13, XTALI Crystal oscillator input/external reference clock input 14 VDD Supply voltage. May be connected directly to battery. 15 GND Ground. Connect to ground plane on PCB. 16 AOUT Audio output. Rev. 1.0 Si4827-A10 7. Ordering Guide Part Number1,2 Si4827-A10-CS Description AM/FM/SW Broadcast Analog Tune Digital Display Radio Receiver Package Type Operating Temperature/Voltage 16L SOIC Pb-free 0 to 70 °C 2.0 to 3.6 V Notes: 1. Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at 25 °C with degraded specifications for VDD voltage ramped down to 2.0 V. 2. The -C suffix in the part number indicates Consumer Grade product. Visit www.silabs.com to get more information on product grade specifications. Rev. 1.0 19 Si4827-A10 8. Package Outline: Si4827-A10 The 16-pin SOIC illustrates the package details for the Si4827-A10. Table 15 lists the values for the dimensions shown in the illustration. Figure 5. 16-Pin SOIC Table 15. Package Dimensions Dimension A A1 A2 b c D E E1 e L L2 h θ aaa bbb ccc ddd Min — 0.10 1.25 0.31 0.17 Max 1.75 0.25 — 0.51 0.25 9.90 BSC 6.00 BSC 3.90 BSC 1.27 BSC 0.40 1.27 0.25 BSC 0.25 0° 0.50 8° 0.10 0.20 0.10 0.25 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Solid State Outline MS-012, Variation AC. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 20 Rev. 1.0 Si4827-A10 9. PCB Land Pattern: Si4827-A10 Figure 6 illustrates the PCB land pattern details for the Si4827-A10-CS SOIC. Table 16 lists the values for the dimensions shown in the illustration. Figure 6. PCB Land Pattern Table 16. PCB Land Pattern Dimensions Dimension C1 Feature (mm) Pad Column Spacing 5.40 E Pad Row Pitch 1.27 X1 Pad Width 0.60 Y1 Pad Length 1.55 Notes: 1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P600X165-16N for Density Level B (Median Land Protrusion). 2. All feature sizes shown are at Maximum Material Condition (MMC) and a card fabrication tolerance of 0.05 mm is assumed. Rev. 1.0 21 Si4827-A10 10. Top Markings 10.1. Si4827-A10 Top Marking 10.2. Top Marking Explanation Mark Method: Laser Pin 1 Mark: Mold Dimple (Bottom-Left Corner) Font Size: 0.71 mm (2.0 Point) Right-Justified Line 1 Marking: Customer Part Number Si4827A10 Circle = 1.3 mm Diameter “e3” Pb-Free Symbol YY = Year WW = Work week Assigned by the Assembly House. Corresponds to the year and work week of the mold date. Line 2 Marking: TTTTTT = Manufacturing code Manufacturing Code from the Assembly Purchase Order form. 22 Rev. 1.0 Si4827-A10 11. Additional Reference Resources Contact your local sales representatives for more information or to obtain copies of the following references: AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines AN603: Si4822/26/27/40/44-DEMO Board Test Procedure Si4827-DEMO Board User’s Guide AN610: Si48xx ATDD Programming Guide Rev. 1.0 23 Si4827-A10 DOCUMENT CHANGE LIST Revision 0.1 to Revision 0.8 Updated "Features" Added ambient temperature range to "Table 1. Recommended Operating Conditions" Updated Table 6, "AM/SW Receiver Characteristics" Updated Table 7, "Reference Clock and Crystal Characteristics" Updated Section "2.Typical Application Schematic" Updated Section “4.3. AM Receiver" Updated Section “4.7. Bass and Treble" Updated Section 6 "Pin Descriptions: Si4827-A10" Updated Section “8. Package Outline: Si4827-A10” Revision 0.8 to Revision 1.0 Updated Table 3. "Reset Timing Characteristics" Updated "Pin Assignment" Inserted Section 4.12. "Reset, Powerup, and Powerdown" 24 Rev. 1.0 Smart. Connected. Energy-Friendly Products Quality Support and Community www.silabs.com/products www.silabs.com/quality community.silabs.com Disclaimer Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. 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