Si4844-B20 Broadcast Analog Tuning Digital Display AM/FM/SW Radio Receiver

Si 4 8 4 4 - B20
B ROADCAST A N A L O G TUNING D IGITAL D ISPLAY
AM/FM/SW R ADIO R ECEIVER
Features








Worldwide FM band support
(64–109 MHz)
Worldwide AM band support
(504–1750 kHz)
SW band support
(2.3–28.5 MHz)
Selectable support for all AM/FM
regional bands
Enhance FM/SW band coverage
2-wire control interface
Mono/Stereo and valid station
indicator
Digital volume support









Bass/Treble support
Minimal BOM components with no
manual alignment
Excellent real-world performance
China TV channels audio carrier
reception in FM band
EN55020 compliant
Two AAA batteries with 2.0 to 3.6 V
supply voltage
Wide range of ferrite loop sticks and
air loop antenna support
24-pin SSOP package
RoHS compliant
Ordering Information:
See page 21.
Pin Assignments
Applications
Table and portable radios
Stereos
 Mini/micro systems
 Boom boxes
 Clock radios
Modules for consumer electronics
Entertainment systems
 Toys, lamps, and any application
needing an AM/FM/SW radio
 Mini HiFi
 iPhone docking




Description
The Si4844-B is the analog-tuned digital-display digital CMOS AM/FM/SW radio
receiver IC that integrates the complete receiver function from antenna input to audio
output. Working with the host MCU (I2C-compatible 2-wire control interface),
frequencies and stereo/mono information can be displayed on LCD while the analogtune features are kept. Si4844-B is pin-to-pin compatible with the current Si484x-A
tuner. Sharing all the advanced features of the Si484x-A, Si4844-B can support a wider
range of FM and SW bands. The Si4844-B also supports China TV channels audio
reception in FM band. The superior control algorithm integrated in the Si4844-B
provides a easy and reliable control interface while eliminating all the manual-tuned
external components used in a traditional solution.
Functional Block Diagram
Si4844-B
Si4830/34
ADC
AMI
AM
ANT
RFGND
LNA
ADC
FM
ANT
FMI
DAC
LOUT
DAC
ROUT
DSP
Si4844-B20 (SSOP)
LNA_EN
1
24
LOUT
IRQ
2
23
ROUT
TUNE1
3
22
DBYP
TUNE2
4
21
VDD2
BAND
5
20
VDD1
NC
6
19
XTALI
NC
7
18
XTALO
FMI
8
17
SCLK
RFGND
9
16
SDIO
NC
10
15
RST
NC
11
14
GND
AMI
12
13
GND
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373;
7,272,375;
7,321,324;
7,355,476;
7,426,376;
7,471,940;
7,339,503; 7,339,504.
AGC
0/90
TUNE1/2
ADC
AFC
Rev. 1.0 5/13
BAND
RST
SDIO
XTAL
OSC
IRQ
REG
CONTROL INTERFACE
SCLK
XTALI
2.0~3.6V VDD1/2
Copyright © 2013 by Silicon Laboratories
Si4844-B20
Si4844-B20
2
Rev. 1.0
Si4844-B20
TABLE O F C ONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4.7. Bass and Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4.8. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.9. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.10. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.11. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.12. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.13. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.14. Memorizing Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.15. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6. Pin Description: Si4844-B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8. Package Outline: Si4844-B20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9. PCB Land Pattern: Si4844-B20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
10. Top Marking: Si4844-B20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
11. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Rev. 1.0
3
Si4844-B20
1. Electrical Specifications
Table 1. Recommended Operating Conditions1,2
Parameter
Symbol
Supply Voltage3
Power Supply Powerup Rise Time
Test Condition
Min
Typ
Max
Unit
VDD
2
—
3.6
V
VDDRISE
10
—
—
µs
Notes:
1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated.
2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for
minimum VDD = 2.7 V.
3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part
initialization may become unresponsive below 2.3 V.
Table 2. DC Characteristics
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
—
21.0
—
mA
—
21.5
—
mA
IAM
—
20.0
—
mA
IDDPD
—
10
—
µA
FM Mode
Supply Current1
IFM
Current2
IFM
Supply
Low SNR level
AM/SW Mode
Supply Current1
Supplies and Interface
VDD Powerdown
Current
Notes:
1. Specifications are guaranteed by characterization.
2. LNA is automatically switched to higher current mode for optimum sensitivity in weak signal conditions.
4
Rev. 1.0
Si4844-B20
Table 3. Reset Timing Characteristics
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Min
Typ
Max
Unit
RSTB Pulse Width
tPRST
100
—
—
µs
2-wire bus idle time after RSTB rises
tSDIO
100
—
—
µs
2-wire bus idle time before RSTB rises, and VDD valid
time before RSTB rises
tSRST
100
—
—
µs
RSTB low time before VDD becomes invalid
tRRST
0
—
—
µs
Notes:
1. RSTB must be held low for at least 100 µs after the voltage supply has been ramped up.
2. RSTB needs to be asserted (pulled low) prior to the supply voltage being ramped down.
tSRST
VDD
tPRST
tSDIO
tRRST
tSDIO
RSTB
SCLK
POWER_UP
Normal
Operation
POWER_UP
Normal
Operation
SDIO
Figure 1. Reset Timing
Rev. 1.0
5
Si4844-B20
Table 4. 2-Wire Control Interface Characteristics1,2,3
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SCLK Frequency
fSCLK
0
—
400
kHz
SCLK Low Time
tLOW
1.3
—
—
µs
SCLK High Time
tHIGH
0.6
—
—
µs
SCLK Input to SDIO  Setup
(START)
tSU:STA
0.6
—
—
µs
SCLK Input to SDIO  Hold
(START)
tHD:STA
0.6
—
—
µs
SDIO Input to SCLK  Setup
tSU:DAT
100
—
—
ns
SDIO Input to SCLK  Hold4,5
tHD:DAT
0
—
900
ns
SCLK input to SDIO  Setup
(STOP)
tSU:STO
0.6
—
—
µs
STOP to START Time
tBUF
1.3
—
—
µs
SDIO Output Fall Time
tf:OUT
—
250
ns
—
300
ns
Cb
20 + 0.1 ----------1pF
SDIO Input, SCLK Rise/Fall Time
tf:IN
tr:IN
Cb
20 + 0.1 ----------1pF
SCLK, SDIO Capacitive Loading
Cb
—
—
50
pF
Input Filter Pulse Suppression
tSP
—
—
50
ns
Notes:
1. When VD = 0 V, SCLK and SDIO are low impedance.
2. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is
high) does not occur within 300 ns before the rising edge of RST.
3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high
until after the first start condition.
4. The Si484x delays SDIO by a minimum of 300 ns from the VIH threshold of SCLK to comply with the minimum tHD:DAT
specification.
5. The maximum tHD:DAT has only to be met when fSCLK = 400 kHz. At frequencies below 400 kHz, tHD:DAT may be
violated as long as all other timing parameters are met.
6
Rev. 1.0
Si4844-B20
SCLK
SDIO
tSU:STA tHD:STA
tLOW
START
tr:IN
tHIGH
tr:IN
tf:IN
tSP
tSU:STO
tBUF
70%
30%
70%
30%
tf:IN,
tf:OUT
tHD:DAT tSU:DAT
STOP
START
Figure 2. 2-Wire Control Interface Read and Write Timing Parameters
SCLK
A6-A0,
R/W
SDIO
START
ADDRESS + R/W
D7-D0
ACK
DATA
D7-D0
ACK
DATA
ACK
STOP
Figure 3. 2-Wire Control Interface Read and Write Timing Diagram
Rev. 1.0
7
Si4844-B20
Table 5. FM Receiver Characteristics1,2
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Min
Typ
Max
Unit
64
—
109
MHz
—
2.2
—
µV EMF
LNA Input Resistance4,5
—
4
—
k
LNA Input Capacitance4,5
—
5
—
pF
—
50
—
dB
—
105
—
dBµV EMF
Input Frequency
Symbol
fRF
Sensitivity with Headphone
Network
Test Condition
(S+N)/N = 26 dB
3
m = 0.3
AM Suppression4,5,6,7
Input IP34,8
Adjacent Channel Selectivity4
±200 kHz
—
50
—
dB
Alternate Channel Selectivity4
±400 kHz
—
65
—
dB
Audio Output Voltage5,6,7,12
—
80
—
mVRMS
Audio Mono S/N5,6,7,9,10
—
55
—
dB
Audio Stereo S/N3,4,5,7,9,10
—
55
—
dB
Audio Frequency Response Low4
–3 dB
—
—
30
Hz
Audio Frequency Response High4
–3 dB
15
—
—
kHz
Audio Stereo Separation5,11
—
40
—
dB
Audio THD5,6,11
—
0.1
0.5
%
Audio Output Load Resistance4,10
RL
Single-ended
10
—
—
k
Audio Output Load Capacitance4,10
CL
Single-ended
—
—
50
pF
Notes:
1. Additional testing information is available in “AN603: Si4822/26/27/40/44 DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 98.1 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. Frequency is 64~109 MHz.
4. Guaranteed by characterization.
5. VEMF = 1 mV.
6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise.
7. f = 22.5 kHz.
8. |f2 – f1| > 2 MHz, f0 = 2 x f1 – f2.
9. BAF = 300 Hz to 15 kHz, A-weighted.
10. At LOUT and ROUT pins.
11. f = 75 kHz.
12. Tested in Digital Volume Mode.
8
Rev. 1.0
Si4844-B20
Table 6. AM/SW Receiver Characteristics1, 2
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
fRF
Medium Wave (AM)
504
—
1750
kHz
Short Wave (SW)
2.3
—
28.5
MHz
(S+N)/N = 26 dB
—
30
—
µV EMF
Large Signal Voltage Handling5
THD < 8%
—
300
—
mVRMS
Power Supply Rejection Ratio5
∆VDD = 100 mVRMS, 100 Hz
—
40
—
dB
Audio Output Voltage3,6,8
—
60
—
mVRMS
Audio S/N3,4,6
—
55
—
dB
Audio THD3,6
—
0.1
0.5
%
180
—
450
µH
Input Frequency
Sensitivity3,4,5
Antenna Inductance5,7
Notes:
1. Additional testing information is available in “AN603: Si4822/26/27/40/44 DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 520 kHz and RF = 6 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in ““AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter.
4. BAF = 300 Hz to 15 kHz, A-weighted.
5. Guaranteed by characterization.
6. VIN = 5 mVrms.
7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels.
8. Tested in Digital Volume Mode.
Rev. 1.0
9
Si4844-B20
Table 7. Reference Clock and Crystal Characteristics
(VDD = 2.7 to 3.6 V, TA = –15 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
31.130
32.768
40,000
kHz
–100
—
100
ppm
Reference Clock
XTALI Supported Reference Clock
Frequencies*
Reference Clock Frequency
Tolerance for XTALI
REFCLK_PRESCALE
1
REFCLK
4095
31.130
32.768
34.406
kHz
Crystal Oscillator Frequency
—
32.768
—
kHz
Crystal Frequency Tolerance
–100
—
100
ppm
—
—
3.5
pF
Crystal Oscillator
Board Capacitance
*Note: The Si4844-B20 divides the RCLK input by REFCLK_PROSCALE to obtain REFCLK. There are some RCLK
frequencies between 31.130 kHz and 40 MHz that are not supported. For more details, see Table 9 of “AN610: Si48xx
ATDD Programming Guide.”
Table 8. Thermal Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Thermal Resistance*
JA
—
80
—
°C/W
Ambient Temperature
TA
–15
25
85
°C
Junction Temperature
TJ
—
—
92
°C
*Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad.
10
Rev. 1.0
Si4844-B20
Table 9. Absolute Maximum Ratings 1, 2
Parameter
Symbol
Value
Unit
VDD
–0.5 to 5.8
V
IIN
10
mA
Operating Temperature
TOP
–40 to 95
C
Storage Temperature
TSTG
–55 to 150
C
0.4
VPK
Supply Voltage
Input Current
3
RF Input Level4
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2. The Si4844-B devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2kV
HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3. For input pins RST, SDIO, SCLK, XTALO, XTALI, BAND, TUNE2, TUNE1, IRQ, and LNA_EN.
4. At RF input pins, FMI, and AMI.
Rev. 1.0
11
Si4844-B20
2. Typical Application Schematic
TUNE1
R1
203k 1%
TUNE1
SW
B1
2.5k/100M
FMI
R2
50k 1%
S1
VR1
100k
BAND
1
2
3
AM
R3
180k 1%
To host MCU
FM
1
LNA_EN
3
4
5
6
7
8
2
IRQ
TUNE1
TUNE2
BAND
NC
NC
FMI
9
LNA_EN
RFGND
10
NC
11
AMI
AMI
0.47u
NC
C5
IRQ
12
ANT1
AM antenna
4
C5
R4
67k 1%
U1
LOUT
Optional
24
ROUT
23
DBYP
22
VDD2
21
VDD1
20
XTALI
19
XTALO
18
RST
GND
SCLK
17
16
T1
15
GND
13
RFGND
14
ANT2
SDIO
AMI
0.47u
LOUT
C4
Optional: AM air loop antenna
C1
0.1u
ROUT
0.1u
VDD
VDD
To host MCU
RESET
SDIO
2.0 TO 3.6V
2.0 TO 3.6V
SCLK
Y1
32.768KHz
C3
22p
C2
22p
Optional
Notes:
1. Place C4 close to VDD2 and DBYP pins.
2. All grounds connect directly to GND plane on PCB.
3. Pin 6 and 7 leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Labs will evaluate the schematics and layouts for qualified
customers.
5. Pin 8 connects to the FM antenna interface and pin 12 connects to the AM antenna interface.
6. Place Si484x as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.
7. Recommend keeping the AM ferrite loop antenna at least 5 cm away from the Si4844-B.
8. Keep the AM ferrite loot antenna away from the MCU, audio amplifier, and other circuits which have AM interference.
9. Place the transformer T1 away from any sources of interference and even away from the I/O signals of the Si4844-B.
12
Rev. 1.0
Si4844-B20
3. Bill of Materials
Table 10. Si4844-B20 Bill of Materials
Component(s)
Value/Description
Supplier
C1
Reset capacitor 0.1 µF, ±20%, Z5U/X7R
Murata
C4
Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R
Murata
C5
Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R
Murata
B1
Ferrite bead 2.5 k/100 MHz
Murata
Variable resistor (POT), 100 k, ±10%
Kennon
VR1
U1
ANT1
Si4844-B AM/FM/SW Analog Tune Digital Display Radio Tuner
Ferrite stick,180–450 μH
Silicon Laboratories
Jiaxin
Optional Components
C2, C3
Y1
ANT2
Crystal load capacitors, 22 pF, ±5%, COG
(Optional: for crystal oscillator option)
32.768 kHz crystal (Optional: for crystal oscillator option)
Venkel
Epson or equivalent
various
Air loop antenna, 10-20 μH
S1
Band switch
Any, depends on customer
R1
Resistor, 203 k, ±1%
Venkel
R2
Resistor, 50 k, ±1%
Venkel
R3
Resistor, 180 k, ±1%
Venkel
R4
Resistor, 67 k, ±1%
Venkel
Rev. 1.0
13
Si4844-B20
4. Functional Description
Figure 4. Si4844-B Functional Block Diagram
4.1. Overview
The Si4844-B is the analog-tuned digital-display digital
CMOS AM/FM/SW radio receiver IC that integrates the
complete receiver function from antenna input to audio
output. Working with an external MCU with LCD/LED
driver, Si4844-B can output the AM/FM/SW
frequencies, band, Bass/Treble and stereo/mono
information to display on LCD/LED, while using a simple
potentiometer at the front end for analog-tune.
Leveraging Silicon Laboratories' proven and patented
digital low intermediate frequency (low-IF) receiver
architecture, the Si4844-B delivers superior RF
performance and interference rejection in AM, FM and
SW bands. The Si4844-B is pin-to-pin compatible with
the current Si484x-A tuning. The Si4844-B shares the
advanced features of the Si484x-A and can support a
wider range of FM and SW bands. It also supports
China TV channels and audio reception in the FM band.
The superior control algorithm integrated in Si4844-B
provides an easy and reliable control interface while
eliminating all the manually tuned external components
used in traditional solutions.
14
Like other successful audio products from Silicon Labs,
Si4844-B offers unmatched integration and PCB space
savings with minimum external components and small
board area on a single side PCB. The high integration
and complete system production test simplifies designin, increases system quality, and improves
manufacturability. The receiver has very low power
consumption, runs off two AAA batteries, and delivers
the performance benefits of high performance digital
radio experience with digital display to the legacy
analog-tuned radio market.
The Si4844-B provides good flexibility in using the chip.
The frequency range of FM/AM/SW bands,
mono/stereo threshold, de-emphasis value, AM tuning
step, AM soft mute level/rate, and Bass/Treble can be
either configured by the MCU or by using external
hardware to make a selection. The reference clock of
the FM tuner can be provided either by the crystal or by
the host MCU within tolerance.
Si4844-B also has flexibility in selecting bands and
configuring band properties, enabling masked Host
MCU for multiple projects, and reducing the cost of
development. Four tuning preferences are available to
meet different tuning preference requirements.
Rev. 1.0
Si4844-B20
4.2. FM Receiver
4.3. AM Receiver
The Si4844-B integrates a low noise amplifier (LNA)
supporting the worldwide FM broadcast band (64 to
109 MHz) and the TV audio stations within the fre
quency range in China are also supported. The FM
band can also be configured to be a wider range such
as 64–108 MHz in one band.
The highly integrated Si4844-B supports worldwide AM
band reception from 504 to 1750 kHz with five subbands using a digital low-IF architecture with a minimum
number of external components and no manual
alignment required. This patented architecture allows
for high-precision filtering, offering excellent selectivity
and SNR with minimum variation across the AM band.
Similar to the FM receiver, the Si4844-B optimizes
sensitivity and rejection of strong interferers, allowing
better reception of weak stations.
Pre-emphasis and de-emphasis is a technique used by
FM broadcasters to improve the signal-to-noise ratio of
FM receivers by reducing the effects of high frequency
interference and noise. When the FM signal is
transmitted, a pre-emphasis filter is applied to
accentuate the high audio frequencies. All FM receivers
incorporate a de-emphasis filter which attenuates high
frequencies to restore a flat frequency response. Two
time constants are used in various regions. The deemphasis time constant can be chosen to be 50 or
75 μs. Refer to “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines.”
The Si4844-B also has advanced stereo blending that
employs adaptive noise suppression. As a signal
quality degrades, the Si4844-B gradually combines the
stereo left and right audio channels to a mono audio
signal to maintain optimum sound fidelity under varying
reception conditions. The Si4844-B can output a stereo
signal to MCU with LCD/LED driver to display on the
LCD/LED so that the user can easily discern the signal
quality.
The stereo on signal is defined using both RSSI and the
Left and Right separation levels as these two
specifications are the primary factors for stereo
listening. The criteria can be set between two
conditions: the Left and Right channels are separated
by more than 6 dB with RSSI at >20 dB or Left and
Right channels are separated by more than 12 dB with
RSSI at >28 dB. The selection can be set up using
different values of the external resistor or configured by
the host MCU. Refer to “AN602: Si4822/26/27/40/44
Antenna, Schematic, Layout, and Design Guidelines.”
The user can also refer to the “AN610: Si48xx ATDD
Programming Guide” for those who want to configure
the value by host MCU.
To offer maximum flexibility, the receiver supports a
wide range of ferrite loop sticks from 180–450 μH. An
air loop antenna is supported by using a transformer to
increase the effective inductance from the air loop.
Using a 1:5 turn ratio inductor, the inductance is
increased by 25 times and easily supports all typical AM
air loop antennas, which generally vary between 10 and
20 μH.
A 9, 10 kHz tuning step can be chosen by the external
resistor or host MCU according to the different regions,
and AM soft mute level can be programmed by the host
MCU to have different tuning experiences. One of the
AM bands can be configured as a universal AM band
that simultaneously supports 9 kHz and 10 kHz channel
spaces for all regional AM standards worldwide. Refer
to “AN610: Si48xx ATDD Programming Guide” and
“AN602: Si4822/26/27/40/44 Antenna, Schematic,
Layout, and Design Guidelines” for more details.
4.4. SW Receiver
The Si4844-B supports short wave band receptions
from 2.3 to 28.5 MHz in 5 kHz step size increments. It
can also be configured to have a wide SW band that
can be used in SW radio with 1 or 2 SW banks. Si4844B supports extensive short wave features such as
minimal discrete components and no factory
adjustments. The Si4844 supports using the FM
antenna to capture short wave signals. Refer to
“AN610: Si48xx ATDD Programming Guide” and
“AN602: Si4822/26/27/40/44 Antenna, Schematic,
Layout, and Design Guidelines” for more details.
Rev. 1.0
15
Si4844-B20
A valid channel can be found by tuning
potentiometer that is connected to the TUNE1 and
4.9. Stereo Audio Processing
the
TUNE2 pin of the Si4844-B chip.
To offer easy tuning, the Si4844-B also outputs the
tuned information to the MCU with LCD/LED driver to
display. It will light up the icon on display if the RF signal
quality passes a certain threshold when tuned to a valid
station. Multiple tuning preferences are available. The
user can choose to have the best performance (volume,
stereo/mono effect) only at the exact channel, or the
best performance in a larger range. Refer to "AN610:
Si48xx ATDD Programming Guide" for more details.
The output of the FM demodulator is a stereo
multiplexed (MPX) signal. The MPX standard was
developed in 1961, and is used worldwide. Today's
MPX signal format consists of left + right (L+R) audio,
left – right (L–R) audio, a 19 kHz pilot tone.
Modulation Level
4.5. Frequency Tuning
4.6. Band Select
Mono Audio
Left + Right
0
The Si4844-B supports worldwide AM band with five
sub-bands, US/Europe/Japan/China FM band with five
sub-bands, and SW band with 16 sub-bands. Si4844-B
provides the flexibility to configure the band and band
properties at either the MCU side or the Tuner side,
enabling masked MCU for multiple projects. For details
on band selection, refer to “AN602: Si4822/26/27/40/44
Antenna, Schematic, Layout, and Design Guidelines”
and "AN610: Si48xx ATDD Programming Guide".
4.7. Bass and Treble
The Si4844-B further supports Bass/Treble tone control
for superior sound quality. The Si4844-B can be set to
be default normal, or programmed by the host MCU I2Ccompatible 2-wire mode. FM has nine levels
Bass/Treble effect and AM/SW has seven levels
Bass/Treble effect. For further configuration details,
refer to "AN610: Si48xx ATDD Programming Guide."
4.8. Volume Control
The Si4844-B not only allows users to use the
traditional PVR wheel volume control through an
external speaker amplifier, it also supports digital
volume control programmed by the host MCU. Si4844-B
can be programmed to be Bass/Treble mode only or
digital volume mode only; it can also be programmed to
have the digital volume coexist with Bass/Treble in two
modes. Refer to "AN610: Si48xx ATDD Programming
Guide" and “AN602: Si4822/26/27/40/44 Antenna,
Schematic, Layout, and Design Guidelines” for more
details.
Stereo
Pilot
15 19 23
Stereo Audio
Left - Right
38
RDS/
RBDS
53
57
Frequency (kHz)
Figure 5. MPX Signal Spectrum
4.9.1. Stereo Decoder
The Si4844-B's integrated stereo decoder automatically
decodes the MPX signal using DSP techniques. The 0
to 15 kHz (L+R) signal is the mono output of the FM
tuner. Stereo is generated from the (L+R), (L–R), and a
19 kHz pilot tone. The pilot tone is used as a reference
to recover the (L–R) signal. Output left and right
channels are obtained by adding and subtracting the
(L+R) and (L–R) signals respectively.
4.9.2. Stereo-Mono Blending
Adaptive noise suppression is employed to gradually
combine the stereo left and right audio channels to a
mono (L+R) audio signal as the signal quality degrades
to maintain optimum sound fidelity under varying
reception conditions. Three metrics, received signal
strength indicator (RSSI), signal-to-noise ratio (SNR),
and
multipath
interference,
are
monitored
simultaneously in forcing a blend from stereo to mono.
The metric which reflects the minimum signal quality
takes precedence and the signal is blended
appropriately.
All three metrics have programmable stereo/mono
thresholds and attack/release rates. If a metric falls
below its mono threshold, the signal is blended from
stereo to full mono. If all metrics are above their
respective stereo thresholds, then no action is taken to
blend the signal. If a metric falls between its mono and
stereo thresholds, then the signal is blended to the level
proportional to the metric’s value between its mono and
stereo thresholds, with an associated attack and
release rate.
Rev. 1.0
16
Si4844-B20
4.10. Stereo DAC
4.14. Memorizing Status
High-fidelity stereo digital-to-analog converters (DACs)
drive analog audio signals onto the LOUT and ROUT
pins. The audio output may be muted.
The Si4844-B provides the feature to memorize status
from the last power down with a simple design on PCB,
including frequency of the FM/AM/SW station. Refer to
“AN602: Si4822/26/27/40/44 Antenna, Schematic,
Layout, and Design Guidelines” for details.
4.11. Soft Mute
The soft mute feature is available to attenuate the audio
outputs and minimize audible noise in very weak signal
conditions. An advanced algorithm is implemented to
get a better analog tuning experience. The soft mute
feature is triggered by the SNR metric. The SNR
threshold for activating soft mute is programmable, as
are soft mute attenuation levels and attack and decay
rates.
4.15. Programming with Commands
To ease development time and offer maximum
customization, the Si4844-B provides a simple yet
powerful software interface to program the receiver. The
device is programmed using commands, arguments,
properties, and responses.
The Si4844-B supports programmable RCLK input (to
XTALI pin) with the spec listed in Table 7. It can be
shared with the host MCU to save extra crystal.
To perform an action, the user writes a command byte
and associated arguments, causing the chip to execute
the given command. Commands control an action such
as powerup the device, shut down the device, or get the
current tuned frequency. Arguments are specific to a
given command and are used to modify the command.
An onboard crystal oscillator is available to generate the
32.768 kHz reference when an external crystal and
load capacitors are provided. Refer to "AN602:
Si4822/26/27/40/44 Antenna, Schematic, Layout, and
Design Guidelines" for more details.
Properties are a special command argument used to
modify the default chip operation and are generally
configured immediately after powerup. Examples of
properties are de-emphasis and soft mute attenuation
threshold.
4.13. Reset, Powerup, and Powerdown
Responses provide the user information and are
echoed after a command and associated arguments are
issued. All commands provide a 1-byte status update,
indicating interrupt and clear-to-send status information.
4.12. Reference Clock
Setting the RSTB pin low will disable analog and digital
circuitry, reset the registers to their default settings, and
disable the bus. Setting the RSTB pin high will bring the
device out of reset.
Figure 1 shows typical reset, startup, and shutdown
timings for the Si4844-B. RSTB must be held low
(asserted) during any power supply transitions and kept
asserted as specified in Figure 1 after the power
supplies are ramped up and stable. Failure to assert
RSTB as indicated here may cause the device to
malfunction and may result in permanent device
damage.
For a detailed description of the commands and
properties for the Si4844-B, see "AN610: Si48xx ATDD
Programming Guide."
A powerdown mode is available to reduce power
consumption when the part is idle. Putting the device in
powerdown mode will disable analog and digital circuitry
while keeping the bus active.
Rev. 1.0
17
Si4844-B20
5. Commands and Properties
Table 11. Si4844-B20 FM Receiver Command Summary
Cmd
Name
Description
0xE0
ATDD_GET_STATUS
0xE1
ATDD_POWER_UP
0xE2
ATDD_AUDIO_MODE
0x10
GET_REV
0x11
POWER_DOWN
Power down device.
0x12
SET_PROPERTY
Sets the value of a property.
0x13
GET_PROPERTY
Retrieve a property's value.
Get tune freq, band and etc status of the device.
Power up device, band selection and band properties setup.
Audio output mode: get/set audio mode and settings.
Returns the revision information of the device.
Note: The Si4844-B has its own power up and get status commands which are different from previous Si47xx tuner parts. To
differentiate, we use “ATDD_POWER_UP” and “ATDD_GET_STATUS” to denote the ATDD-specific commands
instead of the general Si47xx “POWER_UP” and “STATUS” commands.
Table 12. Si4844-B20 FM Receiver Property Summary
Prop
Name
Description
Default
0x0201
REFCLK_FREQ
Sets frequency of reference clock in Hz. The range is 31130
to 34406 Hz, or 0 to disable the AFC. Default is 32768 Hz.
0x8000
0x0202
REFCLK_PRESCALE
Sets the prescaler value for RCLK input.
0x0001
0x1100
FM_DEEMPHASIS
Sets de-emphasis time constant. Default is 75 s.
0x0002
0x1300
FM_SOFT_MUTE_RATE
Sets the attack and decay rates when entering and leaving
soft mute.
0x0040
0x1301
FM_SOFT_MUTE_SLOPE
Configures attenuation slope during soft mute in dB attenuation per dB SNR below the soft mute SNR threshold. Default
value is 2.
0x0002
0x1302
FM_SOFT_MUTE_MAX_
ATTENUATION
Sets maximum attenuation during soft mute (dB). Set to 0 to
disable soft mute. Default is 16 dB.
0x0010
0x1303
FM_SOFT_MUTE_
SNR_THRESHOLD
Sets SNR threshold to engage soft mute. Default is 4 dB.
0x0004
0x1207
FM_STEREO_IND_
BLEND_THRESHOLD
Sets the blend threshold for stereo indicator. Default value is
band-dependent (either 0x9F or 0xB2).
0x9F
0xB2
0x1800
FM_BLEND_RSSI_
STEREO_THRESHOLD
Sets RSSI threshold for stereo blend. (Full stereo above
threshold, blend below threshold.) To force stereo, set this to
0. To force mono, set this to 127. Default value is 49 dBV.
0x0031
0x1801
FM_BLEND_RSSI_
MONO_THRESHOLD
Sets RSSI threshold for mono blend (Full mono below
threshold, blend above threshold). To force stereo, set this to
0. To force mono, set this to 127. Default value is banddependent (either 8 or 7).
0x0008
0x0007
0x4000
RX_VOLUME
Sets the output volume.
0x003F
18
Rev. 1.0
Si4844-B20
Table 12. Si4844-B20 FM Receiver Property Summary (Continued)
0x4001
RX_HARD_MUTE
Mutes the audio output. L and R audio outputs may be
muted independently.
0x0000
0x4002
RX_BASS_TREBLE
Sets the output bass/treble level.
0x0004
0x4003
RX_ACTUAL_VOLUME
Reads the actual output volume.
0x003F
Table 13. Si4844-B20 AM/SW Receiver Command Summary
Cmd
Name
Description
0xE0
ATDD_GET_STATUS
0xE1
ATDD_POWER_UP
0xE2
ATDD_AUDIO_MODE
0x10
GET_REV
0x11
POWER_DOWN
Power down device.
0x12
SET_PROPERTY
Sets the value of a property.
0x13
GET_PROPERTY
Retrieve a property's value.
Get tune freq, band and etc status of the device.
Power up device, band selection and band properties setup
Audio output mode: get/set audio mode settings.
Returns the revision information of the device.
Note: The Si4844-B has its own power up and get status commands which are different from previous Si47xx tuner parts. To
differentiate, we use “ATDD_POWER_UP” and “ATDD_GET_STATUS” to denote the ATDD-specific commands
instead of the general Si47xx “POWER_UP” and “STATUS” commands.
Table 14. Si4844-B20 AM/SW Receiver Property Summary
Prop
Name
0x0201
REFCLK_FREQ
0x0202
REFCLK_PRESCALE
0x4000
RX_VOLUME
0x4001
RX_HARD_MUTE
0x4002
RX_BASS_TREBLE
0x4003
Description
Default
Sets frequency of reference clock in Hz. The range is
31330 to 34406 Hz, or 0 to disable the AFC. Default is
32768 Hz.
0x8000
Sets the prescaler value for RCLK input.
0x0001
Sets the output volume.
0x003F
Mutes the audio output. L and R audio outputs may be
muted independently.
0x0000
Sets the output bass/treble level.
0x0003
RX_ACTUAL_VOLUME
Read the actual output volume
0x003F
0x3300
AM_SOFT_MUTE_RATE
Sets the attack and decay rates when entering and leaving
soft mute.
0x0040
0x3301
AM_SOFT_MUTE_SLOPE
Configures attenuation slope during soft mute in dB attenuation per dB SNR below the soft mute SNR threshold.
0x0002
0x3302
AM_SOFT_MUTE_
MAX_ATTENUATION
Sets maximum attenuation during soft mute (dB). Set to 0
to disable soft mute.
0x0010
0x3303
AM_SOFT_MUTE_
SNR_THRESHOLD
Sets SNR threshold to engage soft mute.
0x0008
Rev. 1.0
19
Si4844-B20
6. Pin Description: Si4844-B
20
LNA_EN
1
24
LOUT
IRQ
2
23
ROUT
TUNE1
3
22
DBYP
TUNE2
4
21
VDD2
BAND
5
20
VDD1
NC
6
19
XTALI
NC
7
18
XTALO
FMI
8
17
SCLK
RFGND
9
16
SDIO
NC
10
15
RST
NC
11
14
GND
AMI
12
13
GND
Pin Number(s)
Name
Description
1
LNA_EN
2
IRQ
Interrupt Request
3
TUNE1
Frequency tuning
4
TUNE2
Frequency tuning
5
BAND
Band selection and De-emphasis/Stereo separation selection
6,7
NC
No connect. Leave floating.
8
FMI
FM RF inputs. FMI should be connected to the antenna trace.
9
RFGND
10, 11
NC
Unused. Tie these pins to GND.
12
AMI
AM RF input. AMI should be connected to the AM antenna.
13, 14
GND
Ground. Connect to ground plane on PCB.
15
/RST
Device reset (active low) input
16
SDIO
Serial data input/output
17
SCLK
Serial clock input
18
XTALO
Crystal oscillator output
19
XTALI
Crystal oscillator input /external reference clock input.
20
VDD1
Supply voltage. May be connected directly to battery.
21
VDD2
Supply voltage. May be connected directly to battery.
22
DBYP
Dedicated bypass for VDD
23
ROUT
Right audio output
24
LOUT
Left audio output
Enabling SW external LNA
RF ground. Connect to ground plane on PCB.
Rev. 1.0
Si4844-B20
7. Ordering Guide
Part Number*
Si4844-B20-GU
Description
AM/FM/SW Broadcast Radio Receiver
Package Type
Operating
Temperature/Voltage
24L SSOP Pb-free
–15 to 85 °C
2.0 to 3.6 V
*Note: Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at
25 °C with degraded specifications for VDD voltage ramped down to 2.0 V.
Rev. 1.0
21
Si4844-B20
8. Package Outline: Si4844-B20
The 24-pin SSOP illustrates the package details for the Si4844-B20. Table 15 lists the values for the dimensions
shown in the illustration.
Figure 6. 24-Pin SSOP
Table 15. Package Dimensions
Dimension
A
A1
b
c
D
E
E1
e
L
θ
aaa
bbb
ccc
ddd
Min
—
0.10
0.20
0.10
Nom
—
—
—
—
8.65 BSC
6.00 BSC
3.90 BSC
0.635 BSC
—
—
0.20
0.18
0.10
0.10
0.40
0°
Max
1.75
0.25
0.30
0.25
1.27
8°
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-137, Variation AE.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
22
Rev. 1.0
Si4844-B20
9. PCB Land Pattern: Si4844-B20
Figure 7 illustrates the PCB land pattern details for the Si4844-B20-GU SSOP. Table 16 lists the values for the
dimensions shown in the illustration.
Figure 7. PCB Land Pattern
Table 16. PCB Land Pattern Dimensions
Dimension
Min
C
5.20
E
Max
5.40
0.635 BSC
X1
0.35
0.45
Y1
1.55
1.75
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut, and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
Rev. 1.0
23
Si4844-B20
10. Top Marking: Si4844-B20
4844B20GU
YYWWTTTTTT
Mark Method:
YAG Laser
Line 1 Marking:
Device identifier
Line 2 Marking:
YY = Year
WW = Work week
Assigned by the Assembly House.
TTTTTT = Manufacturing code
24
4844B20GU = Si4844-B20
Rev. 1.0
Si4844-B20
11. Additional Reference Resources
Contact your local sales representatives for more information or to obtain copies of the following references:
EN55020 Compliance Test Certificate
AN602: Si4822/26/27/40/44 Antenna, Schematic, Layout, and Design Guidelines
 AN603: Si4822/26/27/40/44 DEMO Board Test Procedure
 Si4844-DEMO Board User’s Guide
 AN610: Si48xx-ATDD Programming Guide


Rev. 1.0
25
Si4844-B20
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 1.0







26
Updated “Features”
Updated Table 3. "Reset Timing Characteristics"
Updated Table 5. “FM Receiver Characteristics”
Updated Table 6. “AM/SW Receiver Characteristics”
Updated Section 4.3. “AM Receiver”
Inserted Section 4.13. "Reset, Powerup, and
Powerdown"
Updated Section 6. “Pin Description: Si4844-B”
Rev. 1.0
Smart.
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