Datasheet Serial EEPROM Series Standard EEPROM WLCSP EEPROM BRCB016GWL-3 General Description BRCB016GWL-3 is a serial EEPROM of I2C BUS Interface Method Package W(Typ) x D(Typ) x H(Max) Features 2 Completely conforming to the world standard I C BUS. All controls available by 2 ports of serial clock (SCL) and serial data (SDA) 1.7V to 3.6V single power source operation most suitable for battery use 1.7V to 3.6V wide limit of operating voltage, possible FAST MODE 400KHz operation 16byte Page Write Mode useful for initial value write at factory shipment Self-timed Programming Cycle Low Current Consumption Prevention of Write Mistake at Low Voltage More than 1 million write cycles More than 40 years of data retention Noise Filter built in SCL / SDA terminal Initial delivery state FFh UCSP50L1 1.10mm x 1.15mm x 0.55mm BRCB016GWL-3 Capacity Bit Format Type Power Source Voltage Package 16Kbit 2K×8 BRCB016GWL-3 1.7V to 3.6V UCSP50L1 ○Product structure:Silicon monolithic integrated circuit www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 ○This product has no designed protection against radioactive rays 1/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Absolute Maximum Ratings (Ta=25°C) Parameter Symbol Rating Unit Supply Voltage VCC -0.3 to +6.5 V Power Dissipation Pd 220 (UCSP50L1) mW Storage Temperature Tstg -65 to +125 °C Operating Temperature Topr -40 to +85 °C ‐ -0.3 to Vcc+1.0 V Tjmax 150 °C Input Voltage/ Output Voltage Junction Temperature Remark Derate by 2.2mW/°C when operating above Ta=25°C The Max value of Input Voltage / Output Voltage is not over 6.5V. When the pulse width is 50ns or less, the Min value of Input Voltage / Output Voltage is not below -1.0V. Junction temperature at the storage condition Memory Cell Characteristics (Ta=25°C, Vcc=1.7V to 3.6V) Limit Parameter Unit Write Cycles (1) Data Retention (1) Min Typ Max 1,000,000 - - Times 40 - - Years (1) Not 100% TESTED Recommended Operating Ratings Parameter Symbol Rating Power Source Voltage Vcc 1.7 to 3.6 Input Voltage VIN 0 to Vcc Unit V DC Characteristics (Unless otherwise specified, Ta=-40℃ to +85℃, Vcc=1.7V to 3.6V) Limit Parameter Symbol Unit Min Typ Max Conditions Input High Voltage VIH 0.7Vcc - Vcc+1.0 V 1.7V≦Vcc≦3.6V Input Low Voltage VIL -0.3(2) - +0.3Vcc V 1.7V≦Vcc≦3.6V Output Low Voltage1 VOL1 - - 0.4 V IOL=3.0mA, 2.5V≦Vcc≦3.6V (SDA) Output Low Voltage2 VOL2 - - 0.2 V IOL=0.7mA, 1.7V≦Vcc<2.5V (SDA) Input Leakage Current ILI -1 - +1 µA VIN=0 to Vcc Output Leakage Current ILO -1 - +1 µA VOUT=0 to Vcc (SDA) Supply Current (Write) ICC1 - - 2.0 mA Supply Current (Read) ICC2 - - 0.5 mA Standby Current ISB - - 2.0 µA Vcc=3.6V, fSCL=400kHz, tWR=5ms, Byte Write, Page Write Vcc=3.6V, fSCL=400kHz Random Read, Current Read, Sequential Read Vcc=3.6V, SDA・SCL=Vcc, WP=GND (2) When the pulse width is 50ns or less, it is -1.0V. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 AC Characteristics (Unless otherwise specified, Ta=-40℃ to +85℃, Vcc=1.7V to 3.6V) Parameter Limits Symbol Min Typ Max Unit Clock Frequency fSCL - - 400 kHz Data Clock High Period tHIGH 0.6 - - µs tLOW 1.2 - - µs Data Clock Low Period SDA and SCL Rise Time (1) tR - - 0.3 µs SDA and SCL Fall Time (1) tF - - 0.3 µs Start Condition Hold Time tHD:STA 0.6 - - µs Start Condition Setup Time tSU:STA 0.6 - - µs Input Data Hold Time tHD:DAT 0 - - ns Input Data Setup Time tSU:DAT 100 - - ns Output Data Delay Time tPD 0.1 - 0.9 µs Output Data Hold Time tDH 0.1 - - µs Stop Condition Setup Time tSU:STO 0.6 - - µs Bus Free Time tBUF 1.2 - - µs Write Cycle Time tWR - - 5 ms tI - - 0.1 µs tHD:WP 1.0 - - µs Noise Spike Width (SDA and SCL) WP Hold Time WP Setup Time tSU:WP 0.1 - - µs WP High Period tHIGH:WP 1.0 - - µs (1) Not 100% TESTED. Condition: Input Data Level: VIL=0.2×Vcc VIH=0.8×Vcc Input Data Timing Reference Level: 0.3×Vcc/0.7×Vcc Output Data Timing Reference Level: 0.3×Vcc/0.7×Vcc Rise/Fall Time : ≦20ns Serial Input / Output Timing tR tF tHIGH 70% SCL 30% 70% 70% 70% 70% 30% 30% SCL 30% tLOW 70% SDA (input) 70% SDA (input) 70% DATA(n) DATA(1) tHD:DAT tSU:DAT D0 D1 tWR 70% 30% tPD tBUF tDH WP SDA (output) 70% 70% 30% 30% 30% 30% tSU:WP tHD:WP STOP CONDITION ○Input Read at the rise edge of SCL ○Data Output in sync with the fall of SCL Figure 1-(d). WP Timing at Write Execution Figure 1-(a).Serial Input / Output Timing 70% 70% SCL 70% DATA(n) DATA(1) SCL tSU:STA SDA (input) 70% ACK ACK tHD:STA SDA (input) tSU:STO D1 D0 ACK ACK tWR tHIGH:WP 70% 30% 30% 70% STOP CONDITION START CONDITION 70% 70% WP Figure 1-(b). Start-Stop Bit Timing Figure 1-(e). WP Timing at Write Cancel SCL SDA (input) D0 write data (n-th address) ACK 70% 70% tWR STOP CONDITION START CONDITION Figure 1-(c). Write Cycle Timing www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Block Diagram 16Kbit EEPROM GND ARRAY VCC Vcc 8bit 11bit ADDRESS 11bit DECODER SLAVE W ORD DATA ADDRESS REGISTER REGISTER START CONTROL WP STOP SCL LOGIC ACK HIGH VOLTAGE GEN . SDA VCC LEVEL DETECT Figure 2. Block Diagram Pin Configuration C ○ WP B A ○ SCL C3 C1 ○ SDA B2 ○ VCC 1 ○ GND A3 A1 3 2 BOTTOM VIEW Pin Descriptions Land No. Terminal Name Input / Output Descriptions A1 VCC - Power supply A3 GND - Reference voltage of all input / output, 0V B2 SDA Input / Output C1 WP Input Write protect terminal C3 SCL Input Serial clock input www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Slave and word address Serial data input serial data output 4/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves 6 6 Ta=-40℃ Ta= 25℃ Ta= 85℃ Ta=-40℃ Ta= 25℃ Ta= 85℃ 5 Input Low Voltage: VIL(V) Input High Voltage: VIH(V) 5 4 3 SPEC 2 1 4 3 2 1 SPEC 0 0 0 1 2 3 4 5 6 0 1 2 Supply Voltage: Vcc(V) 4 5 6 Supply Voltage: Vcc(V) Figure 4. Input Low Voltage vs Supply Voltage (SCL,SDA) Figure 3. Input High Voltage vs Supply Voltage (SCL,SDA) 0.6 1 Output Low Voltage2 : VOL2(V) Ta=-40 ℃ Ta= 25℃ Ta= 85℃ 0.5 Output Low Voltage1 : VOL1(V) 3 0.4 SPEC 0.3 0.2 0.1 0 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.8 0.6 0.4 SPEC 0.2 0 0 1 2 3 4 5 6 7 8 0 2 3 4 5 6 Output Low Current : IOL(mA) Output Low Current : IOL(mA) Figure 5. Output Low Voltage1 vs Output Low Current (Vcc=2.5V) www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 5/26 Figure 6. Output Low Voltage2 vs Output Low Current (Vcc=1.7V) TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves‐Continued 1.2 1.2 SPEC Output Leakage Current : ILO(uA) Input Leakage Current : ILI(uA) 1 0.8 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 SPEC 1 0.8 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 0 0 0 1 2 3 4 5 0 6 1 3 4 5 6 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 7. Input Leakage Current vs Supply Voltage (SCL) Figure 8. Output Leakage Current vs Supply Voltage (SDA) 0.6 2.5 Supply Current (Read) : Icc2(mA) SPEC Supply Current (Write) : Icc1(mA) 2 2 Ta=-40℃ Ta= 25℃ Ta= 85℃ 1.5 1 0.5 SPEC 0.5 0.4 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.3 0.2 0.1 0 0 0 1 2 3 4 5 0 6 Supply Voltage : Vcc(V) 2 3 4 Supply Voltage : Vcc(V) 5 6 Figure 10. Supply Current (Read) vs Supply Voltage (fSCL=400kHz) Figure 9. Supply Current (Write) vs Supply Voltage (fSCL=400kHz) www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 6/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves‐Continued 10000 2.5 SPEC 1000 Clock Frequency : fscl(kHZ) Standby Current : ISB(uA) 2 1.5 1 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.5 SPEC 100 10 Ta=-40 ℃ Ta= 25℃ Ta= 85℃ 1 0.1 0 0 1 2 3 4 5 0 6 1 3 4 5 6 Supply Voltage : Vcc(V) Supply Voltage : Vcc(V) Figure 12. Clock Frequency vs Supply Voltage Figure 11. Standby Current vs Supply Voltage 5 6 5 Ta=-40 ℃ Ta= 25 ℃ Ta= 85 ℃ 4 Data Clock Low Period : tLOW(us) Data Clock High Period : tHIGH(uA) 2 3 2 1 4 Ta=-40 ℃ Ta= 25 ℃ Ta= 85 ℃ 3 2 SPEC 1 SPEC 0 0 0 1 2 3 4 5 0 6 2 3 4 5 6 Supply Voltage: Vcc(V) Supply Voltage: Vcc(V) Figure 14. Data Clock Low Period vs Supply Voltage Figure 13. Data Clock High Period vs Supply Voltage www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 7/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves‐Continued 0.7 Start Condition Setup Time : t SU:STA(us) Start Condition Hold Time : t HD : STA(us) 6 5 Ta=-40℃ Ta= 25℃ Ta= 85℃ 4 3 2 1 SPEC 0 0.6 SPEC 0.5 0.4 0.3 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.2 0.1 0 -0.1 0 1 2 3 4 5 6 0 1 Supply Voltage: Vcc(V) 3 4 5 6 Supply Voltage : Vcc(V) Figure 15. Start Condition Hold Time vs Supply Voltage Figure 16. Start Condition Setup Time vs Supply Voltage 300 50 SPEC 0 Input Data Setup Time : t SU: DAT(ns) Input Data Hold Time : t HD: DAT(ns) 2 -50 -100 Ta=-40℃ Ta= 25 ℃ Ta= 85 ℃ -150 200 SPEC 100 0 Ta=-40 ℃ Ta= 25℃ Ta= 85℃ -100 -200 -200 0 1 2 3 4 5 0 6 2 3 4 5 6 Supply Voltage: Vcc(V) Supply Voltage: Vcc(V) Figure 17. Input Data Hold Time vs Supply Voltage www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 Figure 18. Input Data Setup Time vs Supply Voltage 8/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves‐Continued 4 Ta=-40℃ Ta= 25℃ Ta= 85℃ 3 Output Data Delay Time : tPD(us) Output Data Delay Time : tPD(us) 4 2 SPEC 1 Ta=-40℃ Ta= 25℃ Ta= 85℃ 3 2 SPEC 1 0 0 0 1 2 3 4 5 0 6 1 3 4 5 6 Supply Voltage: Vcc(V) Supply Voltage: Vcc(V) Figure 20. Output Data Delay Time vs Supply Voltage (HIGH) Figure 19. Output Data Delay Time vs Supply Voltage (LOW) 5 2 Ta=-40℃ Ta= 25 ℃ Ta= 85 ℃ 1.5 1 SPEC 0.5 3 2 SPEC 0 1 -0.5 0 0 1 Ta=-40℃ Ta= 25℃ Ta= 85℃ 4 Bus Free Time : t BUF(us) Stop Condition Setup Time : tsu: STO(us) 2 2 3 4 5 0 6 2 3 4 5 6 Supply Voltage: Vcc(V) Supply Voltage: Vcc(V) Figure 21. Stop Condition Setup Time vs Supply Voltage www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 1 Figure 22. Bus Free Time vs Supply Voltage 9/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves‐Continued 6 1 Write Cycle Time : tWR(ms) Noise Spike Width (SCL HIGH) : t l (us) SPEC 5 4 3 Ta=-40℃ Ta= 25℃ Ta= 85℃ 2 1 0.8 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.6 0.4 0.2 SPEC 0 0 0 1 2 3 4 5 6 0 1 Supply Voltage: Vcc(V) 3 4 5 6 Supply Voltage : Vcc(V) Figure 23. Write Cycle Time vs Supply Voltage Figure 24. Noise Spike Width vs Supply Voltage (SCL HIGH) 1.2 0.6 SPEC 1 0.5 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0.4 WP Hold Time : t HD : WP(us) Noise Spike Width (SDA HIGH) : tl(us) 2 0.3 0.2 SPEC 0.1 Ta=-40℃ Ta= 25 ℃ Ta= 85 ℃ 0.8 0.6 0.4 0.2 0 0 0 1 2 3 4 5 6 1 2 3 4 5 6 Supply Voltage: Vcc(V) Supply Voltage: Vcc(V) Figure 25. Noise Spike Width vs Supply Voltage (SDA HIGH) www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 Figure 26. WP Hold Time vs Supply Voltage 10/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Typical Performance Curves‐Continued 1.2 0.2 SPEC SPEC 1 WP High Period : tHIGH : WP(us) WP Setup Time : t SU : WP(us) 0.1 Ta=-40℃ Ta= 25℃ Ta= 85℃ 0 -0.1 -0.2 -0.3 -0.4 Ta=-40 ℃ Ta= 25℃ Ta= 85℃ 0.8 0.6 0.4 0.2 -0.5 0 -0.6 0 1 2 3 4 5 6 1 2 3 4 5 6 Supply Voltage: Vcc(V) Supply Voltage : Vcc(V) Figure 28. WP High Period vs Supply Voltage Figure 27. WP Setup Time vs Supply Voltage www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 0 11/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Timing Chart 1. I2C BUS Data Communication I2C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long, and 2 acknowledge is always required after each byte. I C BUS data communication with several devices is possible by connecting with 2 communication lines; serial data (SDA) and serial clock (SCL). Among the devices, there should be a “master” that generates clock and control communication start and end. The rest become “slave” which are controlled by an address peculiar to each device, like this EEPROM. The device that outputs data to the bus during data communication is called “transmitter”, and the device that receives data is called “receiver”. SDA 1-7 SCL S START ADDRESS condition 1-7 8 9 R/W ACK 8 DATA 9 1-7 ACK 8 9 DATA ACK P STOP condition Figure 29. Data Transfer Timing 2. Start Condition (Start Bit Recognition) (1) Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when SCL is 'HIGH' is necessary. (2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition is satisfied, any command cannot be executed. 3. Stop Condition (Stop Bit Recognition) (1) Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is 'HIGH'. 4. Acknowledge (ACK) Signal (1) The acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not. In a master-slave communication, the device (Ex. µ-COM sends slave address input for write or read command to this IC) at the transmitter (sending) side releases the bus after output of 8bit data. (2) The device (Ex. This IC receives the slave address input for write or read command from the µ-COM) at the receiver (receiving) side sets SDA 'LOW' during the 9th clock cycle, and outputs acknowledge signal (ACK signal) showing that it has received the 8bit data. (3) This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal) 'LOW'. (4) After receiving 8bit data (word adress and write data) during each write operation, this IC outputs acknowledge signal (ACK signal) 'LOW'. (5) During read operation, this IC outputs 8bit data (read data), and detects acknowledge signal (ACK signal) 'LOW'. When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM) side, this IC continues to output data. When acknowledge signal (ACK signal) is not detected, this IC stops data transfer, and recognizes stop condition (stop bit), and ends read operation. Then this IC becomes ready for another transmission. 5. Device Addressing (1) Slave address comes after start condition from master. (2) The significant 4 bits of slave address are used for recognizing a device type. The device code of this IC is fixed to '1010'. (3) Next slave addresses (P2, P1, P0 --- page select) are for selecting page addresses. (4) The most insignificant bit ( R / W --- READ / WRITE ) of slave address is used for designating write or read action, and is as shown below. Setting R / W to 0 ------- write (setting 0 to word address setting of Random Read) Setting R / W to 1 ------- read Type BRCB016GWL-3 www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Slave Address 1 0 1 0 P2 P1 P0 12/26 ―― R/W TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Write Command 1. Write Cycle (1) Arbitrary data can be written to this EEPROM. When writing only 1 byte, Byte Write is normally used, and when writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. Up to 16 arbitrary bytes can be written. S T A R T SDA LINE W R I T E SLAVE ADDRESS WORD ADDRESS WA 7 1 0 1 0 P2 P1 P0 S T O P DATA WA 0 D7 D0 A C K R A / C W K A C K Figure 30. Byte Write Cycle S T A R T SDA LINE SLAVE ADDRESS 1 0 1 W R I T E WORD ADDRESS(n) WA 7 0 P2 P1 P0 R A / C W K DATA(n) WA 0 D7 A C K S T O P DATA(n+15) D0 D0 A C K A C K Figure 31. Page Write Cycle (2) (3) (4) (5) (6) (7) During internal write execution, all input commands are ignored, therefore ACK is not returned. Data is written to the address designated by word address (n-th address) By issuing stop bit after 8bit data input, internal write to memory cell starts. When internal write is started, command is not accepted for tWR (5ms at maximum). Using page write cycle, writing in bulk is done as follows: When data of more than 16 bytes is sent, the bytes in excess overwrites the data already sent first. (Refer to "Internal Address Increment") As for page write command, where 2 or more bytes of data is intended to be written, after page select bit ‘P0,P1,P2’ of slave address are designated arbitrarily, only the value of 4 least significant bits in the address is incremented internally, so that data up to 16 addresses of memory only can be written. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 13/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 2. Notes on Page Write Cycle 1 page=16bytes, but the page Write Cycle Time is 5ms at maximum for 16byte bulk write. It does not stand 5ms at maximum × 16byte=80ms (Max) 3. Internal Address Increment Page Write Mode 0Eh WA7 WA4 WA3 WA2 WA1 WA0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 1 0 1 1 0 1 1 0 0 1 0 Increment For example, when it is started from address 0Eh, then, increment is made as below, 0Eh→0Fh→00h→01h・・・ please take note. ※0Eh・・・0E in hexadecimal, therefore, 00001110 becomes a binary number. Significant bit is fixed. No digit up 4. Write Protect (WP) Terminal Write Protect (WP) Function When WP terminal is set at Vcc (H level), data rewrite of all addresses is prohibited. When it is set at GND (L level), data rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level. Do not use it open. In case of using it as a ROM, it is recommended to connect it to pull up or Vcc. At extremely low voltage at power ON / OFF, by setting the WP terminal 'H', write error can be prevented. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Read Command 1. Read Cycle Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a command to read data of internal address register without designating an address, and is used when to verify just after write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in succession. S T A R T SDA LINE W R I T E SLAVE ADDRESS S T A R T WORD ADDRESS(n) WA 7 1 0 1 0 P2P1P0 WA 0 RA / C WK R E A D SLAVE ADDRESS 1 0 1 0 P2P1P0 S T O P DATA(n) D0 D7 A C K R A / C WK A C K Figure 32. Random Read Cycle S T A R T SDA LINE R E A D SLAVE ADDRESS S T O P DATA(n) 1 0 1 0 P2P1P0 D7 D0 A C K R A / C WK Figure 33. Current Read Cycle S T A R T SDA LINE SLAVE ADDRESS R E A D 1 0 1 0 P2 P1P0 DATA(n) D7 R A / C W K S T O P DATA(n+x) D7 D0 A C K A C K D0 A C K Figure 34. Sequential Read Cycle (in the case of Current Read Cycle) (1) In Random Read Cycle, data of designated word address can be read. (2) When the command just before current read cycle is random read cycle, current read cycle (each including sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output. (3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (µ-COM) side, the next address data can be read in succession. (4) Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goes from ‘L’ to ‘H’ while SCL signal is 'H' . (5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output. Therefore, read command cycle cannot be ended. To end the read command cycle, be sure to input 'H' to ACK signal after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'. (6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is asserted from ‘L’ to ‘H’ while SCL signal is 'H'. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 15/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Software Reset Software reset is executed to avoid malfunction after power on, and during command input. Software reset has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Figure 35-(a), Figure 35-(b), and Figure 35-(c).) Within the dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output and read data '0' (both 'L' level) may be output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. Dummy clock×14 SCL 1 2 Start×2 13 Normal command 14 SDA Normal command Figure 35-(a). The case of dummy clock×14 + START+START+ command input SCL Start Dummy clock×9 Start 1 2 8 Normal command 9 SDA Normal command Figure 35-(b). The case of START + dummy clock×9 + START + command input Start×9 SCL 1 2 3 7 8 Normal command 9 SDA Normal command Figure 35-(c). START×9 + command input ※Start command from START input. Acknowledge Polling During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic write execution after write cycle input, next command (slave address) is sent. If the first ACK signal sends back 'L', then it means end of write operation, else 'H' is returned, which means writing is still on progress. By the use of acknowledge polling, next command can be executed without waiting for tWR = 5ms. To write continuously, R / W = 0, then to carry out current read cycle after write, slave address with R / W = 1 is sent. If ACK signal sends back 'L', then execute word address input and data output and so forth. During internal write, ACK = HIGH is returned. First write command S T A R T Write command S T O P S T Slave A R address T S T Slave A R address T A C K H A C K H … tWR Second Write Command … S T Slave A R address T A C K H S T Slave A R address T A C K L Word address A C K L Data A C K L S T O P tWR After completion of internal write, ACK=LOW is returned, so input next word address and data in succession. Figure 36. Case of continuous write by Acknowledge Polling www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 16/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 WP Valid Timing (Write Cancel) WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so on, pay attention to the following WP valid timing. During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in D0 of data(in page write cycle, the first byte data) is the cancel invalid area. WP input in this area becomes Don't care. The area from the rise of SCL to take in D0 to the stop condition input is the cancel valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status. ・Rise of SDA ・Rise of D0 taken clock SCL SDA SCL D0 D1 ACK SDA Enlarged View SDA S T Slave A R address T A C Word K address L D0 ACK Enlarged View A C D7 D6 D5 D4 D3 D2 D1 D0 K L WP cancel invalid area A C K L Data A C K L S T O P WP cancel valid area tWR WP cancel invalid area WP Data is not written. Figure 37. WP Valid Timing Command Cancel by Start Condition and Stop Condition During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure 38) However, within ACK output area and during data read, SDA bus may output 'L'. In this case, start condition and stop condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined. Therefore, it is not possible to carry out current read cycle in succession. To carry out read cycle in succession, carry out random read cycle. SCL SDA 1 0 1 0 Start Condition Stop Condition Figure 38. Case of Cancel by Start, Stop Condition during Slave Address Input www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 17/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 I/O Peripheral Circuit 1. Pull-up Resistance of SDA Terminal SDA is NMOS open drain, so it requires a pull up resistor. As for this resistance value (RPU), select an appropriate value from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The smaller the RPU, the larger is the supply current (Read). 2. Maximum Value of RPU The maximum value of RPU is determined by the following factors: (1) SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower. Furthermore, AC timing should be satisfied even when SDA rise time is slow. A to be determined by the input current leak total (IL) of the device connected to the bus (2)The bus electric potential ○ with output of 'H' to the SDA line and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and EEPROM including recommended noise margin of 0.2Vcc. Vcc-ILRPU-0.2 Vcc ≧ VIH ∴ RPU≦ 0.8Vcc-VIH IL Microcontroller BRCB016GWL-3 RPU Ex.) Vcc =3V IL=10µA VIH=0.7 Vcc From(2) 0.8×3-0.7×3 RPU≦ 10×10-6 SDA terminal A IL ≦ 30 [kΩ] IL Bus line Capacity CBUS Figure 39. I/O circuit diagram 3. Minimum Value of RPU The minimum value of RPU is determined by the following factors. (1) When IC outputs LOW, it should be satisfied that VOLMAX=0.4V and IOLMAX=3mA. Vcc-VOL ≦IOL RPU Vcc-VOL ∴ RPU≧ IOL (2)VOLMAX=0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM including the recommended noise margin of 0.1Vcc. VOLMAX ≦ VIL-0.1 Vcc Ex.) Vcc =3V, VOL=0.4V, IOL=3mA, microcontroller, EEPROM VIL=0.3Vcc from (1) 3-0.4 RPU≧ 3×10-3 ≧ And 867[Ω] VOL=0.4[V] VIL=0.3×3 =0.9[V] Therefore, the condition (2) is satisfied. 4. Pull-up Resistance of SCL Terminal When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time where SCL becomes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several kΩ to several ten kΩ is recommended in consideration of drive performance of output port of microcontroller. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 18/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Cautions on Microcontroller Connection 1. RS In I2C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input / output of tri state to SDA port, insert a series resistance RS between the pull up resistor RPU and the SDA terminal of EEPROM. This is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON simultaneously. RS also plays the role of protecting the SDA terminal against surge. Therefore, even when SDA port is open drain input/output, Rs can be used. ACK SCL RPU RS SDA 'H' output of microcontroller 'L' output of EEPROM Microcontroller EEPROM Over current flows to SDA line by 'H' output of microcontroller and 'L' output of EEPROM. Figure 40. I/O Circuit Diagram Figure 41. Input / Output Collision Timing 2. Maximum Value of RS The maximum value of Rs is determined by the following relations: (1) SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower. Furthermore And AC timing should be satisfied even when SDA rise time is slow. (2) The bus electric potential ○ A to be determined by RPU and RS the moment when EEPROM outputs 'L' to SDA bus should sufficiently secure the input 'L' level (VIL) of microcontroller including recommended noise margin of 0.1Vcc. (Vcc-VOL)×RS +VOL+0.1Vcc≦VIL RPU+RS VCC RPU A RS ∴ RS≦ VOL Ex)Vcc=3V IOL Bus line capacity CBUS VIL VIL-VOL-0.1Vcc 1.1Vcc-VIL RS≦ ×RPU VIL=0.3VCC VOL=0.4V RPU=20kΩ 0.3×3-0.4-0.1×3 3 ×20×10 1.1×3-0.3×3 EEPROM Micro controller ≦1.67[kΩ] Figure 42. I/O Circuit Diagram 3. Minimum Value of RS The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source line and instantaneous power failure of power source may occur. When allowable over current is defined as I, the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power source line in set and so forth. Set the over current to EEPROM at 10mA or lower. Vcc RS ≦I RPU 'L'output ∴ RS≧ RS Vcc I EX) VCC=3V I=10mA Over current I RS≧ 'H' output 3 10×10-3 ≧300[Ω] Microcontroller EEPROM Figure 43. I/O Circuit Diagram www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 19/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 I/O Equivalence Circuit 1. Input (SCL, WP) Figure 44. Input Pin Circuit Diagram 2. Input / Output (SDA) Figure 45. Input / Output Pin Circuit Diagram www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 20/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Power-Up/Down Conditions At power on, the IC’s internal circuits may go through unstable low voltage area as the Vcc rises, making the IC’s internal logic circuit not completely reset, hence malfunction may occur. To prevent this, the IC is equipped with POR circuit and LVCC circuit. To assure the operation, observe the following conditions at power on. 1. Set SDA = 'H' and SCL ='L' or 'H’ 2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit. tR Recommended conditions of tR, tOFF,Vbot VCC tOFF tR tOFF Vbot 0 Vbot 10ms or below 10ms or larger 0.3V or below 100ms or below 10ms or larger 0.2V or below Figure 46. Rise Waveform Diagram 3. Set SDA and SCL so as not to become 'Hi-Z'. When the above conditions 1 and 2 cannot be observed, take the following countermeasures. (1) In the case when the above condition 1 cannot be observed such that SDA becomes 'L' at power on. →Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'. VCC tLOW SCL SDA After Vcc becomes stable After Vcc becomes stable tDH tSU:DAT tSU:DAT Figure 48. When SCL='L' and SDA='L' Figure 47. When SCL= 'H' and SDA= 'L' (2) In the case when the above condition 2 cannot be observed. →After power source becomes stable, execute software reset(Page 16). (3) In the case when the above conditions 1 and 2 cannot be observed. →Carry out (1), and then carry out (2). Low Voltage Malfunction Prevention Function LVCC circuit prevents data rewrite operation at low power and prevents write error.. At LVCC voltage (Typ =1.2V) or below, data rewrite is prevented. Noise Countermeasures 1. Bypass Capacitor When noise or surge gets in the power source line, malfunction may occur, therefore, it is recommended to connect a bypass capacitor (0.1µF) between the IC’s Vcc and GND pins. Connect the capacitor as close to the IC as possible. In addition, it is also recommended to attach a bypass capacitor between the board’s Vcc and GND. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 21/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Operational Notes 1. Described numeric values and data are design representative values only and the values are not guaranteed. 2. We believe that the application circuit examples in this document are recommendable. However, in actual use, confirm characteristics further sufficiently. If changing the fixed number of external parts is desired, make your decision with sufficient margin in consideration of static characteristics, transient characteristics, and fluctuations of external parts and our LSI. 3. Absolute maximum ratings If the absolute maximum ratings such as supply voltage, operating temperature range and so on are exceeded, LSI may be destroyed. Do not supply voltage or subject the IC to temperatures exceeding the absolute maximum ratings. In the case of fear of exceeding the absolute maximum ratings, take physical safety countermeasures such as adding fuses, and see to it that conditions exceeding the absolute maximum ratings should not be supplied to the LSI. 4. GND electric potential Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower than that of GND terminal. 5. Thermal design Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in actual operating conditions. 6. Short between pins and mounting errors Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins. 7. Operating the IC in the presence of strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 22/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Part Numbering B R C B 0 1 6 G W L - 3 E 2 BUS type C:I2C Revision Capacity 016=16K Package GWL:UCSP50L1 Process Code Packaging and forming specification E2:: Embossed tape and reel www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 23/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Physical Dimensions Tape and Reel Information UCSP50L1 1PIN MARK A GND 1.15±0.05 Vcc SDA B C WP (top view) SCL 1 2 3 0.55MAX 0.1±0.05 1.10±0.05 S 0.06 0.346±0.05 5-φ0.25±0.05 A 0.05 0.229±0.05 S A B WP SCL B SDA B 0.693±0.05 C (bottom view) A Vcc 1 0.35±0.05 GND 3 2 P = 0.4 × 1 <Tape and Reel information> Tape Embossed carrier tape Quantity 3000pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand Direction of feed 1pin Reel www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 ) ∗ Order quantity needs to be multiple of the minimum quantity. 24/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Marking Diagram UCSP 50L1(TOP VIEW) 1PIN MARK Part Number Marking B 9 LOT NO. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 25/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet BRCB016GWL-3 Revision History Date Revision 30.Aug.2012 001 New Release 25.Feb.2013 002 Update some English words, sentences’ descriptions, grammar and formatting. Add WP Hold Time, WP Setup Time, WP High Period in AC Characteristics. Update Part Numbering. www.rohm.com ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Changes 26/26 TSZ02201-0R2R0G100260-1-2 25.Feb.2013 Rev.002 Datasheet Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) , transport intend to use our Products in devices requiring extremely high reliability (such as medical equipment equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice - GE © 2014 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. 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The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice - GE © 2014 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2014 ROHM Co., Ltd. All rights reserved. Rev.001