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HSP series portfolio overview
High-speed port ESD protection
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Overview
Basic
In depth
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ESD protection is needed for
Advanced technology with very thin lithography
and gate oxide highly vulnerable to ESD
Integrated electronics systems with PCBs
having a high component density facilitate
ESD coupling and propagation
Core ICs such as microcontrollers,
micro-processors, transceivers, etc.
IC manufacturers reluctant to make robust
embedded ESD protection diodes that would
require a significant active area of their
advanced and expensive technology.
When the application uses RF (Wi-Fi or Bluetooth), a common-mode filter
is required, in addition to ESD protection, to avoid RF performance decrease
due to the EMI generated by the high-speed link.
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Dedicated to high-speed ports
Ultra-low capacitance
• The parasitic capacitance of ESD protection devices must be low enough to allow highspeed signals to be transmitted without degradation.
• A high parasitic capacitance of the ESD protection devices would increase too much
the signal rise/fall time and prevent the communication.
Example of the impact of parasitic capacitance on an HDMI signal simulated with discrete capacitance
Time domain
Fall time
too HIGH
Rise time
too HIGH
Frequency domain
Bandwidth is too narrow
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Dedicated to high-speed ports
Flow-through layout
• To make the design and PCB layout easier and simpler
• To preserve the symmetry between the 2 lines of the differential lane
 High-speed port protection must be flow-through
HSP protection
D+
D+
D-
DVia to
GND
Via to
GND
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Clamping voltage
ESD response to IEC 61000-4-2 (+8 kV contact discharge)
Example of HSP051-4M10
• The quality of protection lies in the
clamping voltage of the ESD diodes
• It is measured after 30 ns (the first
peak voltage is in the nanosecond
range; too fast to be significant)
• HSP protection devices can clamp
8000 V ESD strikes down to 13 V !
IC to
protect
Clamping voltage
13 V after 30 ns
8000 V ESD
IEC 61000-4-2
ESD diode of
HSP series
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Main selection criteria
• VBR Breakdown voltage higher than operating signal
Above this voltage, the ESD protection devices will enter Clamping mode
• fc Cut-off frequency higher than high-speed signal bandwidth defined by the rise time value
• CI/O to GND Low parasitic capacitance (a consequence of high bandwidth) minimizing the
impact on transmission line impedance
Example of HSP051-4M10
• Rd Dynamic resistance & VCL Clamping voltage to keep the protected IC safe
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High-speed port protection package offer
1 mm²
2 mm²
5 mm²
2-line packages
0.8 mm²
1.45 mm²
2.56 mm²
4-line packages
0.72 mm²
1.9 mm²
2.5 mm²
8-line package
4.95 mm²
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8 lines
4 lines
2 lines
High-speed port protection portfolio
HSP061-2N4
µQFN-4L 400-µm pitch
Size: 1 x 0.8 x 0.5 mm
HSP062-2M6
µQFN-6L 500-µm pitch
Size: 1 x 1.45 x 0.55 mm
HSP062-2P6
SOT-666
Size: 1.6 x 1.6 x 0.52 mm
HSP061-4F4
Flip Chip / WLCSP
6 bumps – 300-µm pitch
Size: 0.6 x 1.2 x 0.38 mm
HSP051-4N10
DFN-10L 400-µm pitch
Size: 1 x 1.9 x 0.3 mm
HSP051-4M10
DFN-10L 500-µm pitch
Size: 1 x 2.5 x 0.48 mm
HSP061-8M16
DFN-16L 400-µm pitch
Size: 1.5 x 3.3 x 0.55 mm
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Let’s go further
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Intermediate product presentation soon available:
‘Understanding ST’s HSP series specification’
Basic presentation
Application Notes:
In-depth information
Selection

HSP06x-2 high-speed line protection on HDMI 1.4 link (AN4138)

HSP061-8M16 high-speed line protection on HDMI 1.4 link (AN3357)

TVS short-pulse dynamic resistance measurement ... (AN4022)

IEC 61000-4-2 standard testing (AN3353)
 Selection guide [pdf]
 www.st.com/hsp-protection
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Thank you