ES_LPC15xx Errata sheet LPC15xx Rev. 2.1 — 20 November 2015 Errata sheet Document information Info Content Keywords LPC1549JBD100; LPC1549JBD64; LPC1549JBD48; LPC1548JBD100; LPC1548JBD64; LPC1547JBD64; LPC1547JBD48; LPC1519JBD100; LPC1519JBD64; LPC1518JBD100; LPC1518JBD64; LPC1517JBD64; LPC1517JBD48 Abstract LPC15xx errata ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx Revision history Rev Date 2.1 20151120 2 20150417 1 20140224 Description • • • Added DPD.1 Added UART.1 Initial version Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 2 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 1. Product identification The LPC15xx devices typically have the following top-side marking: LPC15xxxxxxx xxxxxxx xxxYYWWxR The last letter in the last line (field ‘R’) will identify the device revision. This Errata Sheet covers the following revisions of the LPC15xx: Table 1. Device revision table Revision identifier (R) Revision description ‘A’ Initial device revision Field ‘YY’ states the year the device was manufactured. Field ‘WW’ states the week the device was manufactured during that year. 2. Errata overview Table 2. Functional problems table Functional problems Short description Revision identifier Detailed description USB.1 USB controller is unable to generate STALL on EP0_OUT. ‘A’ Section 3.1 I2C_ROM.1 Slave transmit ROM API functions not working. ‘A’ Section 3.2 UART.1 The UART controller sets the Idle status bits for receive ‘A’ and transmit before the transmission of the stop bit is complete. Section 3.3 DPD.1 Deep power-down mode is not functional outside certain voltage and temperature ranges. ‘A’ Section 3.4 Table 3. AC/DC deviations table AC/DC deviations Short description Revision identifier Detailed description n/a n/a n/a n/a Table 4. Errata notes Note Short description Revision identifier Detailed description n/a n/a n/a n/a ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 3 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 3. Functional problems detail 3.1 USB.1: USB controller is unable to generate STALL on EP0_OUT Introduction: The LPC15xx have a full-speed USB device controller with support for 10 physical endpoints. Problem: The USB device controller is unable to return a STALL handshake on an OUT data packet to endpoint zero. An NAK handshake is returned instead. Work-around: Endpoint zero is the control endpoint. All requests sent to the control endpoint consist of three stages (SETUP / DATA / STATUS). When an unsupported ControlWrite request (with data phase) is sent by the host to the device, the device is unable to STALL the data phase of this request. To solve this problem, the device firmware must accept the data transmitted during the data phase of this ControlWrite request and return a STALL handshake when the IN token for the STATUS stage is received. ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 4 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 3.2 I2C_ROM.1: Slave transmit ROM API functions not working Introduction: The LPC15XX provide a ROM API for transmitting data via the I2C-bus interface in slave mode using the interrupt or polling method. Problem: The following I2C ROM API functions transmit 0xFF instead of the provided data: • ErrorCode_t i2c_slave_transmit_intr( I2C_HANDLE_T* h_i2c, I2C_PARAM* ptp, I2C_RESULT* ptr) • ErrorCode_t i2c_slave_transmit_poll( I2C_HANDLE_T* h_i2c, I2C_PARAM* ptp, I2C_RESULT* ptr) Work-around: Do not use the I2C slave transmit ROM API functions. The I2C register interface allows direct programming of the data transmit operation in slave mode. ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 5 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 3.3 UART.1 Introduction: In receive mode, the UART controller provides a status bit (the RXIDLE bit in the UART STAT register) to check whether the receiver is currently receiving data. If RXIDLE is set, the receiver indicates it is idle and does not receive data. In transmit mode, the UART controller provides two status bits (TXIDLE and TXDISSTAT bits in the UART STAT register) to indicate whether the transmitter is currently transmitting data. The TXIDLE bit is set by the controller after the last stop bit has been transmitted. The TXDISSTAT bit is set by the controller after the transmitter has sent the last stop bit and has become fully idle following a transmit disable executed by setting the TXDIS bit in the UART CTRL register. The status bits can be used to implement software flow control, but their setting does not affect normal UART operation. ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 6 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx Problem: The RXIDLE bit is incorrectly set for a fraction of the clock cycle between the reception of the last data bit and the reception of the start bit of the next word, that is while the stop bit is received. RXIDLE is cleared at the beginning of the start bit. parity bit stop bit (optional) logic 1 start bit logic 0 data word 1 START D0 D1 D2 D3 data word 2 D4 D5 D6 D7 PB STOP D0 START not correct: RXIDLE set Fig 1. Incorrect setting of RXIDLE during UART receive Both, TXIDLE and TXDISSTAT are set incorrectly between the last data bit and the stop bit while the transfer is still ongoing. parity bit stop bit (optional) logic 1 start bit logic 0 data word START D0 D1 D2 D3 D4 D5 D6 D7 PB STOP not correct: TXIDLE, TXDISSTAT set correct: TXIDLE, TXDISSTAT set Fig 2. Incorrect setting of TXIDLE and TXDISSTAT during UART transmit Work-around: When writing code that checks for the setting of any of the status bits RXIDLE, TXIDLE, TXDISSTAT, check the value of the status bit in the STAT register: • If status bit = 1, add a delay of one UART bit time (if STOPLEN = 0, one stop bit) or two bit times (if STOPLEN = 1, two stop bits) and check the value of the status bit again: – If status bit = 1, the receiver is idle. – If status bit = 0, the receiver is receiving data. – If the status bit = 0, the receiver is receiving data. ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 7 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 3.4 DPD.1 Introduction: The LPC15xx has a supply voltage (VDD) from 2.4 V to 3.6 V and can operate from -40 °C to 105 °C. The LPC15xx supports four reduced power modes (sleep, deep-sleep, power-down, and deep power-down mode). Deep power-down mode allows for maximal power savings where the entire system is shut down except for the general purpose registers in the PMU and the self wake-up timer. Only the general purpose registers in the PMU maintain their internal states in deep power-down mode. Problem: At temperatures 25 °C, the deep power-down mode is not functional if the VDD supply voltage is > 3.4 V. At temperatures > 25 °C, the deep power-down mode is not functional if the VDD supply voltage is > 3.35 V. Work-around: Deep power-down mode operates correctly for the entire temperature range (-40 °C to 105 °C) if the VDD supply is between 2.4 V and 3.35 V. For temperatures 25 °C, ensure that the supply voltage is not > 3.4 V (VDD = 2.4 V to 3.4 V) when using deep power-down mode. For temperatures > 25 °C, ensure that the supply voltage is not > 3.35 V (VDD = 2.4 V to 3.35 V) when using deep power-down mode. ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 8 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 4. AC/DC deviations detail No known errata. 5. Errata notes No known errata. ES_LPC15XX Errata sheet All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 9 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 6. Legal information 6.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 6.2 Disclaimers Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. ES_LPC15XX Errata sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 6.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 2.1 — 20 November 2015 © NXP B.V. 2015. All rights reserved. 10 of 11 ES_LPC15xx NXP Semiconductors Errata sheet LPC15xx 7. Contents 1 2 3 3.1 3.2 3.3 3.4 4 5 6 6.1 6.2 6.3 7 Product identification . . . . . . . . . . . . . . . . . . . . 3 Errata overview . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional problems detail . . . . . . . . . . . . . . . . 4 USB.1: USB controller is unable to generate STALL on EP0_OUT. . . . . . . . . . . . . . . . . . . . . 4 I2C_ROM.1: Slave transmit ROM API functions not working . . . . . . . . . . . . . . . . . . . . 5 UART.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 DPD.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 AC/DC deviations detail . . . . . . . . . . . . . . . . . . 9 Errata notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 November 2015 Document identifier: ES_LPC15XX